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@ -140,9 +140,8 @@ Temp7 EQU R6 |
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Temp8 EQU R7 |
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;**** **** **** **** **** |
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; Register definitions |
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DSEG AT 20h ; Variables segment |
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; RAM definitions |
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DSEG AT 20h ; Ram data segment, bit-addressable |
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Bit_Access: DS 1 ; MUST BE AT THIS ADDRESS. Variable at bit accessible address (for non interrupt routines) |
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Bit_Access_Int: DS 1 ; Variable at bit accessible address (for interrupts) |
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@ -192,8 +191,6 @@ CLOCK_SET_AT_48MHZ EQU 4 ; Set if 48MHz MCUs run at 48MHz |
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Tlm_Data_L: DS 1 ; DShot telemetry data low byte |
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Tlm_Data_H: DS 1 ; DShot telemetry data high byte |
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;**** **** **** **** **** |
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; RAM definitions |
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DSEG AT 30h ; Ram data segment, direct addressing |
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Power_On_Wait_Cnt_L: DS 1 ; Power on wait counter (lo byte) |
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Power_On_Wait_Cnt_H: DS 1 ; Power on wait counter (hi byte) |
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@ -1008,15 +1005,15 @@ IF FETON_DELAY != 0 ; HI/LO enable style drivers |
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mov A, Current_Power_Pwm_Reg_H |
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jnb ACC.PWR_H_BIT, pca_int_hi_pwm |
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mov A, PCA0H |
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jb ACC.PCA_BIT, pca_int_exit ; Power below 50%, update pca in the 0x00-0x0F range |
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mov A, PCA0H ; Power below 50%, update pca in the 0x00-0x0F range |
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jb ACC.PCA_BIT, pca_int_exit ; PWM edge selection bit (continue if up edge) |
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jb ACC.(PCA_BIT-1), pca_int_exit |
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sjmp pca_int_set_pwm |
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pca_int_hi_pwm: |
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mov A, PCA0H |
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jnb ACC.PCA_BIT, pca_int_exit ; Power above 50%, update pca in the 0x20-0x2F range |
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mov A, PCA0H ; Power above 50%, update pca in the 0x20-0x2F range |
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jnb ACC.PCA_BIT, pca_int_exit ; PWM edge selection bit (continue if down edge) |
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jb ACC.(PCA_BIT-1), pca_int_exit |
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pca_int_set_pwm: |
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@ -1098,6 +1095,7 @@ dshot_gcr_encode_0_11001: |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_1 |
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mov B, DShot_GCR_Pulse_Time_1 |
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ret |
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dshot_gcr_encode_1_11011: |
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Push_Reg Temp1, B |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_1 |
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@ -1105,18 +1103,21 @@ dshot_gcr_encode_1_11011: |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_1 |
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mov B, DShot_GCR_Pulse_Time_1 |
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ret |
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dshot_gcr_encode_2_10010: |
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DShot_GCR_Get_Time |
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Push_Reg Temp1, A |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_3 |
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mov B, DShot_GCR_Pulse_Time_1 |
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ret |
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dshot_gcr_encode_3_10011: |
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Push_Reg Temp1, B |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_1 |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_3 |
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mov B, DShot_GCR_Pulse_Time_1 |
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ret |
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dshot_gcr_encode_4_11101: |
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Push_Reg Temp1, B |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_2 |
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@ -1124,12 +1125,14 @@ dshot_gcr_encode_4_11101: |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_1 |
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mov B, DShot_GCR_Pulse_Time_1 |
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ret |
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dshot_gcr_encode_5_10101: |
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Push_Reg Temp1, B |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_2 |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_2 |
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mov B, DShot_GCR_Pulse_Time_1 |
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ret |
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dshot_gcr_encode_6_10110: |
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DShot_GCR_Get_Time |
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Push_Reg Temp1, A |
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@ -1137,6 +1140,7 @@ dshot_gcr_encode_6_10110: |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_2 |
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mov B, DShot_GCR_Pulse_Time_1 |
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ret |
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dshot_gcr_encode_7_10111: |
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Push_Reg Temp1, B |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_1 |
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@ -1144,6 +1148,7 @@ dshot_gcr_encode_7_10111: |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_2 |
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mov B, DShot_GCR_Pulse_Time_1 |
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ret |
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dshot_gcr_encode_8_11010: |
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DShot_GCR_Get_Time |
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Push_Reg Temp1, A |
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@ -1151,23 +1156,27 @@ dshot_gcr_encode_8_11010: |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_1 |
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mov B, DShot_GCR_Pulse_Time_1 |
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ret |
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dshot_gcr_encode_9_01001: |
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Push_Reg Temp1, B |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_3 |
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mov B, DShot_GCR_Pulse_Time_2 |
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ret |
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dshot_gcr_encode_A_01010: |
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DShot_GCR_Get_Time |
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Push_Reg Temp1, A |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_2 |
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mov B, DShot_GCR_Pulse_Time_2 |
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ret |
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dshot_gcr_encode_B_01011: |
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Push_Reg Temp1, B |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_1 |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_2 |
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mov B, DShot_GCR_Pulse_Time_2 |
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ret |
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dshot_gcr_encode_C_11110: |
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DShot_GCR_Get_Time |
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Push_Reg Temp1, A |
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@ -1176,12 +1185,14 @@ dshot_gcr_encode_C_11110: |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_1 |
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mov B, DShot_GCR_Pulse_Time_1 |
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ret |
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dshot_gcr_encode_D_01101: |
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Push_Reg Temp1, B |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_2 |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_1 |
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mov B, DShot_GCR_Pulse_Time_2 |
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ret |
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dshot_gcr_encode_E_01110: |
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DShot_GCR_Get_Time |
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Push_Reg Temp1, A |
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@ -1189,6 +1200,7 @@ dshot_gcr_encode_E_01110: |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_1 |
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mov B, DShot_GCR_Pulse_Time_2 |
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ret |
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dshot_gcr_encode_F_01111: |
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Push_Reg Temp1, B |
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Push_Reg Temp1, DShot_GCR_Pulse_Time_1 |
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@ -1304,8 +1316,8 @@ dshot_12bit_encode: |
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dshot_packet_stage_1: |
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; Read commutation period |
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clr IE_EA |
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mov Tlm_Data_H, Comm_Period4x_H |
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mov Tlm_Data_L, Comm_Period4x_L |
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mov Tlm_Data_H, Comm_Period4x_H |
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setb IE_EA |
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; Multiply period by 3/4 (1/2 + 1/4) |
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