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Merge pull request #30 from mathiasvr/pca-optimize 

Optimize PWM updates
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Mathias Rasmussen 3 years ago
committed by GitHub
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443f376592 17a7a22f64
commit
09c729dd1a
No known key found for this signature in database GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 17 additions and 126 deletions
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  1. 100
      Bluejay.asm
  2. 43
      Common.inc

100
Bluejay.asm
View File

@ -167,7 +167,6 @@ Flag_Motor_Running BIT Flags1.3
Flag_Motor_Started BIT Flags1.4 ; Set when motor is started
Flag_Dir_Change_Brake BIT Flags1.5 ; Set when braking before direction change
Flag_High_Rpm BIT Flags1.6 ; Set when motor rpm is high (Comm_Period4x_H less than 2)
Flag_Low_Pwm_Power BIT Flags1.7 ; Set when pwm duty cycle is below 50%
Flags2: DS 1 ; State flags. NOT reset upon motor_start
; BIT Flags2.0
@ -223,11 +222,6 @@ Wt_Zc_Tout_Start_H: DS 1 ; Timer 3 start point for zero cross scan timeout (hi
Wt_Comm_Start_L: DS 1 ; Timer 3 start point from zero cross to commutation (lo byte)
Wt_Comm_Start_H: DS 1 ; Timer 3 start point from zero cross to commutation (hi byte)
Power_Pwm_Reg_L: DS 1 ; Power pwm register setting (lo byte)
Power_Pwm_Reg_H: DS 1 ; Power pwm register setting (hi byte)
Damp_Pwm_Reg_L: DS 1 ; Damping pwm register setting (lo byte)
Damp_Pwm_Reg_H: DS 1 ; Damping pwm register setting (hi byte)
Pwm_Limit: DS 1 ; Maximum allowed pwm (8-bit)
Pwm_Limit_By_Rpm: DS 1 ; Maximum allowed pwm for low or high rpm (8-bit)
Pwm_Limit_Beg: DS 1 ; Initial pwm limit (8-bit)
@ -665,7 +659,6 @@ t0_int_dshot_tlm_finish:
mov TL0, #0 ; Reset timer 0 count
setb IE_EX0 ; Enable int0 interrupts
setb IE_EX1 ; Enable int1 interrupts
Enable_PCA_Interrupt ; Enable pca interrupts
clr Flag_Telemetry_Pending ; Mark that new telemetry packet may be created
@ -1043,12 +1036,24 @@ ENDIF
t1_int_set_pwm_damp_set:
ENDIF
mov Power_Pwm_Reg_L, Temp2
mov Power_Pwm_Reg_H, Temp3
; Note: Interrupts (of higher priority) are not explicitly disabled because
; int0 is already disabled and timer 0 is assumed to be disabled at this point
IF PWM_BITS_H != 0
; Set power pwm auto-reload registers
Set_Power_Pwm_Reg_L Temp2
Set_Power_Pwm_Reg_H Temp3
ELSE
Set_Power_Pwm_Reg_H Temp2
ENDIF
IF DEADTIME != 0
mov Damp_Pwm_Reg_L, Temp4
mov Damp_Pwm_Reg_H, Temp5
; Set damp pwm auto-reload registers
IF PWM_BITS_H != 0
Set_Damp_Pwm_Reg_L Temp4
Set_Damp_Pwm_Reg_H Temp5
ELSE
Set_Damp_Pwm_Reg_H Temp4
ENDIF
ENDIF
mov Rcp_Timeout_Cntd, #10 ; Set timeout count
@ -1079,7 +1084,6 @@ t1_int_exit_no_tlm:
mov TL0, #0 ; Reset timer 0
setb IE_EX0 ; Enable int0 interrupts
setb IE_EX1 ; Enable int1 interrupts
Enable_PCA_Interrupt ; Enable pca interrupts
t1_int_exit_no_int:
pop B ; Restore preserved registers
@ -1210,76 +1214,6 @@ reti
;
;**** **** **** **** **** **** **** **** **** **** **** **** ****
pca_int:
clr IE_EA ; Disable all interrupts
push ACC
IF DEADTIME != 0 ; HI/LO enable style drivers
mov A, PCA0L ; Read low byte first, to transfer high byte to holding register
mov A, PCA0H
jnb Flag_Low_Pwm_Power, pca_int_hi_pwm
; Power below 50%, update pca in the 0x00-0x0F range
jb ACC.PWM_BITS_H, pca_int_exit ; PWM edge selection bit (continue if up edge)
sjmp pca_int_set_pwm
pca_int_hi_pwm:
; Power above 50%, update pca in the 0x20-0x2F range
jnb ACC.PWM_BITS_H, pca_int_exit ; PWM edge selection bit (continue if down edge)
pca_int_set_pwm:
IF PWM_BITS_H != 0
jb ACC.(PWM_BITS_H-1), pca_int_exit
ELSE
mov A, PCA0L
jb ACC.7, pca_int_exit
ENDIF
ENDIF
; Set power pwm auto-reload registers
IF PWM_BITS_H != 0
Set_Power_Pwm_Reg_L Power_Pwm_Reg_L
Set_Power_Pwm_Reg_H Power_Pwm_Reg_H
ELSE
Set_Power_Pwm_Reg_H Power_Pwm_Reg_L
ENDIF
IF DEADTIME != 0
; Set damp pwm auto-reload registers
IF PWM_BITS_H != 0
Set_Damp_Pwm_Reg_L Damp_Pwm_Reg_L
Set_Damp_Pwm_Reg_H Damp_Pwm_Reg_H
ELSE
Set_Damp_Pwm_Reg_H Damp_Pwm_Reg_L
ENDIF
ENDIF
setb Flag_Low_Pwm_Power
IF PWM_BITS_H != 0
mov A, Power_Pwm_Reg_H
jb ACC.(PWM_BITS_H - 1), ($+5)
ELSE
mov A, Power_Pwm_Reg_L
jb ACC.7, ($+5)
ENDIF
clr Flag_Low_Pwm_Power
Disable_COVF_Interrupt
IF DEADTIME == 0 ; EN/PWM style drivers
Disable_CCF_Interrupt
ENDIF
anl EIE1, #0EFh ; Pwm updated, disable pca interrupts
pca_int_exit:
Clear_COVF_Interrupt
IF DEADTIME == 0
Clear_CCF_Interrupt
ENDIF
pop ACC ; Restore preserved registers
setb IE_EA ; Enable all interrupts
reti
@ -3775,7 +3709,7 @@ setup_dshot:
; Setup interrupts for DShot
clr Flag_Telemetry_Pending ; Clear DShot telemetry flag
mov IE, #2Dh ; Enable timer 1/2 interrupts and INT0/1 interrupts
mov EIE1, #90h ; Enable timer 3 and PCA0 interrupts
mov EIE1, #80h ; Enable timer 3 interrupts
mov IP, #03h ; High priority to timer 0 and INT0 interrupts
setb IE_EA ; Enable all interrupts

43
Common.inc
View File

@ -165,49 +165,6 @@ ELSE
ENDIF
ENDM
Clear_COVF_Interrupt MACRO
anl PCA0PWM, #0DFh ;; Clear PCA cycle overflow flag
ENDM
Enable_COVF_Interrupt MACRO
orl PCA0PWM, #40h ;; Enable PCA interrupt on cycle overflow
ENDM
Disable_COVF_Interrupt MACRO
anl PCA0PWM, #0BFh ;; Disable PCA interrupt on cycle overflow
ENDM
IF DEADTIME == 0 ; CCF interrupt is only used for DEADTIME == 0
Clear_CCF_Interrupt MACRO
anl PCA0CN0, #0FEh ;; Clear PCA capture/compare flag
ENDM
Enable_CCF_Interrupt MACRO
orl PCA0CPM0, #01h ;; Enable PCA interrupt on capture/compare
ENDM
Disable_CCF_Interrupt MACRO
anl PCA0CPM0, #0FEh ;; Disable PCA interrupt on capture/compare
ENDM
ENDIF
Enable_PCA_Interrupt MACRO
LOCAL pca_enabled set_pca_int_hi_pwm
IF DEADTIME != 0
Enable_COVF_Interrupt
ELSE
jnb Flag_Low_Pwm_Power, set_pca_int_hi_pwm
Enable_COVF_Interrupt
sjmp pca_enabled
set_pca_int_hi_pwm:
Enable_CCF_Interrupt
pca_enabled:
ENDIF
orl EIE1, #10h ;; Enable pca interrupts
ENDM
Set_MCU_Clk_24MHz MACRO
mov CLKSEL, #13h ;; Set clock to 24MHz (Oscillator 1 divided by 2)

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