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188 lines
4.6 KiB
188 lines
4.6 KiB
;**** **** **** **** ****
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;
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; Bluejay digital ESC firmware for controlling brushless motors in multirotors
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;
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; Copyright 2020, 2021 Mathias Rasmussen
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; Copyright 2011, 2012 Steffen Skaug
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;
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; This file is part of Bluejay.
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;
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; Bluejay is free software: you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation, either version 3 of the License, or
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; (at your option) any later version.
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;
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; Bluejay is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with Bluejay. If not, see <http://www.gnu.org/licenses/>.
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;
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;**** **** **** **** ****
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;
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; Hardware definition file "W". This is for tristate input style FET driver chips
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; RC MC MB X CC MA X X X Ap Bp Cp X X X X
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;
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;**** **** **** **** ****
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PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted
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COM_ACTIVE_HIGH EQU 1 ; Damping inverted
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COMPARATOR_PORT EQU 0 ; All comparator (mux) pins must be on the same port
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IF DEADTIME == 0
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PCA0CPM_POWER EQU PCA0CPM0
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PCA0CPL_POWER EQU PCA0CPL0
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PCA0CPH_POWER EQU PCA0CPH0
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PCA0CPM_DAMP EQU PCA0CPM1
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PCA0CPL_DAMP EQU PCA0CPL1
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PCA0CPH_DAMP EQU PCA0CPH1
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ELSE
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PCA0CPM_POWER EQU PCA0CPM1
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PCA0CPL_POWER EQU PCA0CPL1
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PCA0CPH_POWER EQU PCA0CPH1
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PCA0CPM_DAMP EQU PCA0CPM0
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PCA0CPL_DAMP EQU PCA0CPL0
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PCA0CPH_DAMP EQU PCA0CPH0
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ENDIF
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;*********************
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; PORT 0 definitions *
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;*********************
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RTX_PIN EQU 7
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C_Mux EQU 6
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B_Mux EQU 5
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; EQU 4
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V_Mux EQU 3
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A_Mux EQU 2
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; EQU 1
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; EQU 0
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P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux))
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P0_INIT EQU 0FFh
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P0_PUSHPULL EQU 0
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P0_SKIP EQU 0FFh
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;*********************
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; PORT 1 definitions *
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;*********************
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; EQU 7
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A_Pwm EQU 6
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B_Pwm EQU 5
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C_Pwm EQU 4
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; EQU 3
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; EQU 2
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; EQU 1
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; EQU 0
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; pwm outputs start as analog in -> floating
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; this ensures all mosfet drivers start with floating outputs
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P1_DIGITAL EQU NOT((1 SHL A_Pwm) + (1 SHL B_Pwm) + (1 SHL C_Pwm))
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P1_INIT EQU 00h
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P1_PUSHPULL EQU ((1 SHL A_Pwm) + (1 SHL B_Pwm) + (1 SHL C_Pwm))
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P1_SKIP EQU 0FFh
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A_Pwm_Fet_On MACRO
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setb P1.A_Pwm ; set pin to high
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orl P1MDIN, #(1 SHL A_Pwm) ; enable pin driver
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ENDM
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A_Pwm_Fet_Off MACRO
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anl P1MDIN, #(NOT(1 SHL A_Pwm)) ; analog in -> pullup, driver and digital in is disable = floating
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ENDM
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B_Pwm_Fet_On MACRO
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setb P1.B_Pwm ; set pin to high
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orl P1MDIN, #(1 SHL B_Pwm) ; enable pin driver
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ENDM
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B_Pwm_Fet_Off MACRO
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anl P1MDIN, #(NOT(1 SHL B_Pwm)) ; analog in -> pullup, driver and digital in is disable = floating
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ENDM
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C_Pwm_Fet_On MACRO
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setb P1.C_Pwm ; set pin to high
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orl P1MDIN, #(1 SHL C_Pwm) ; enable pin driver
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ENDM
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C_Pwm_Fet_Off MACRO
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anl P1MDIN, #(NOT(1 SHL C_Pwm)) ; analog in -> pullup, driver and digital in is disable = floating
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ENDM
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All_Pwm_Fets_Off MACRO
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anl P1MDIN, #(NOT((1 SHL A_Pwm) + (1 SHL B_Pwm) + (1 SHL C_Pwm))) ; analog in -> pullup, driver and digital in is disable = floating
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ENDM
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A_Com_Fet_On MACRO
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clr P1.A_Pwm ; set pin to low
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orl P1MDIN, #(1 SHL A_Pwm) ; enable pin driver
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ENDM
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A_Com_Fet_Off MACRO
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anl P1MDIN, #(NOT(1 SHL A_Pwm)) ; analog in -> pullup, driver and digital in is disable = floating
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ENDM
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B_Com_Fet_On MACRO
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clr P1.B_Pwm ; set pin to low
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orl P1MDIN, #(1 SHL B_Pwm) ; enable pin driver
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ENDM
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B_Com_Fet_Off MACRO
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anl P1MDIN, #(NOT(1 SHL B_Pwm)) ; analog in -> pullup, driver and digital in is disable = floating
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ENDM
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C_Com_Fet_On MACRO
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clr P1.C_Pwm ; set pin to low
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orl P1MDIN, #(1 SHL C_Pwm) ; enable pin driver
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ENDM
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C_Com_Fet_Off MACRO
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anl P1MDIN, #(NOT(1 SHL C_Pwm)) ; analog in -> pullup, driver and digital in is disable = floating
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ENDM
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All_Com_Fets_Off MACRO
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anl P1MDIN, #(NOT((1 SHL A_Pwm) + (1 SHL B_Pwm) + (1 SHL C_Pwm))) ; analog in -> pullup, driver and digital in is disable = floating
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ENDM
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Set_Pwm_Phase_A MACRO
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mov P1SKIP, #(NOT(1 SHL A_Pwm));
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orl P1MDIN, #(1 SHL A_Pwm) ; enable pin driver
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ENDM
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Set_Pwm_Phase_B MACRO
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mov P1SKIP, #(NOT(1 SHL B_Pwm));
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orl P1MDIN, #(1 SHL B_Pwm) ; enable pin driver
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ENDM
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Set_Pwm_Phase_C MACRO
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mov P1SKIP, #(NOT(1 SHL C_Pwm));
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orl P1MDIN, #(1 SHL C_Pwm) ; enable pin driver
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ENDM
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Set_All_Pwm_Phases_Off MACRO
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mov P1SKIP, #P1_SKIP;
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ENDM
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;*********************
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; PORT 2 definitions *
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;*********************
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DebugPin EQU 0
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P2_DIGITAL EQU (1 SHL DebugPin)
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P2_PUSHPULL EQU (1 SHL DebugPin)
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P2_SKIP EQU (1 SHL DebugPin)
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;**** **** **** **** ****
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; Inherit base layout
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;**** **** **** **** ****
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$set(CUSTOM_PWM_PHASE, CUSTOM_FET_TOGGLING)
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$include (Base.inc)
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