Fork from bluejay at github and modified for my custom ESC. I need to modify it because some mistake design on my ESC hardware.
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  1. ;**** **** **** **** ****
  2. ;
  3. ; Bluejay digital ESC firmware for controlling brushless motors in multirotors
  4. ;
  5. ; Copyright 2020 Mathias Rasmussen
  6. ; Copyright 2011, 2012 Steffen Skaug
  7. ;
  8. ; This file is part of Bluejay.
  9. ;
  10. ; Bluejay is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; Bluejay is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with Bluejay. If not, see <http://www.gnu.org/licenses/>.
  22. ;
  23. ;**** **** **** **** ****
  24. ;
  25. ; Common definitions for EFM8BB1x/2x based ESCs
  26. ;
  27. ;**** **** **** **** ****
  28. ;*********************
  29. ; Device SiLabs EFM8BB1x/2x
  30. ;*********************
  31. IF MCU_48MHZ == 0
  32. $include (SI_EFM8BB1_Defs.inc)
  33. ELSE
  34. $include (SI_EFM8BB2_Defs.inc)
  35. ENDIF
  36. ;**** **** **** **** ****
  37. ; Uses internal calibrated oscillator set to 24/48Mhz
  38. ;**** **** **** **** ****
  39. ;**** **** **** **** ****
  40. ; ESC selection statements
  41. IF ESCNO == A_
  42. $include (targets/A.inc) ; Select pinout A
  43. ENDIF
  44. IF ESCNO == B_
  45. $include (targets/B.inc) ; Select pinout B
  46. ENDIF
  47. IF ESCNO == C_
  48. $include (targets/C.inc) ; Select pinout C
  49. ENDIF
  50. IF ESCNO == D_
  51. $include (targets/D.inc) ; Select pinout D
  52. ENDIF
  53. IF ESCNO == E_
  54. $include (targets/E.inc) ; Select pinout E
  55. ENDIF
  56. IF ESCNO == F_
  57. $include (targets/F.inc) ; Select pinout F
  58. ENDIF
  59. IF ESCNO == G_
  60. $include (targets/G.inc) ; Select pinout G
  61. ENDIF
  62. IF ESCNO == H_
  63. $include (targets/H.inc) ; Select pinout H
  64. ENDIF
  65. IF ESCNO == I_
  66. $include (targets/I.inc) ; Select pinout I
  67. ENDIF
  68. IF ESCNO == J_
  69. $include (targets/J.inc) ; Select pinout J
  70. ENDIF
  71. IF ESCNO == K_
  72. $include (targets/K.inc) ; Select pinout K
  73. ENDIF
  74. IF ESCNO == L_
  75. $include (targets/L.inc) ; Select pinout L
  76. ENDIF
  77. IF ESCNO == M_
  78. $include (targets/M.inc) ; Select pinout M
  79. ENDIF
  80. IF ESCNO == N_
  81. $include (targets/N.inc) ; Select pinout N
  82. ENDIF
  83. IF ESCNO == O_
  84. $include (targets/O.inc) ; Select pinout O
  85. ENDIF
  86. IF ESCNO == P_
  87. $include (targets/P.inc) ; Select pinout P
  88. ENDIF
  89. IF ESCNO == Q_
  90. $include (targets/Q.inc) ; Select pinout Q
  91. ENDIF
  92. IF ESCNO == R_
  93. $include (targets/R.inc) ; Select pinout R
  94. ENDIF
  95. IF ESCNO == S_
  96. $include (targets/S.inc) ; Select pinout S
  97. ENDIF
  98. IF ESCNO == T_
  99. $include (targets/T.inc) ; Select pinout T
  100. ENDIF
  101. IF ESCNO == U_
  102. $include (targets/U.inc) ; Select pinout U
  103. ENDIF
  104. IF ESCNO == V_
  105. $include (targets/V.inc) ; Select pinout V
  106. ENDIF
  107. IF ESCNO == W_
  108. $include (targets/W.inc) ; Select pinout W
  109. ENDIF
  110. ;**** **** **** **** ****
  111. ; Constant definitions
  112. ;**** **** **** **** ****
  113. ESC_LETTER EQU 40h + ESCNO
  114. IF MCU_48MHZ == 0
  115. MCU_MHZ_LETTER EQU "L"
  116. ELSE
  117. MCU_MHZ_LETTER EQU "H"
  118. ENDIF
  119. CSEG AT 1A40h
  120. IF FETON_DELAY == 0
  121. Eep_ESC_Layout: DB "#",ESC_LETTER,"_",MCU_MHZ_LETTER,"_00# " ; ESC layout tag
  122. ELSEIF FETON_DELAY == 5
  123. Eep_ESC_Layout: DB "#",ESC_LETTER,"_",MCU_MHZ_LETTER,"_05# "
  124. ELSEIF FETON_DELAY == 10
  125. Eep_ESC_Layout: DB "#",ESC_LETTER,"_",MCU_MHZ_LETTER,"_10# "
  126. ELSEIF FETON_DELAY == 15
  127. Eep_ESC_Layout: DB "#",ESC_LETTER,"_",MCU_MHZ_LETTER,"_15# "
  128. ELSEIF FETON_DELAY == 20
  129. Eep_ESC_Layout: DB "#",ESC_LETTER,"_",MCU_MHZ_LETTER,"_20# "
  130. ELSEIF FETON_DELAY == 25
  131. Eep_ESC_Layout: DB "#",ESC_LETTER,"_",MCU_MHZ_LETTER,"_25# "
  132. ELSEIF FETON_DELAY == 30
  133. Eep_ESC_Layout: DB "#",ESC_LETTER,"_",MCU_MHZ_LETTER,"_30# "
  134. ELSEIF FETON_DELAY == 40
  135. Eep_ESC_Layout: DB "#",ESC_LETTER,"_",MCU_MHZ_LETTER,"_40# "
  136. ELSEIF FETON_DELAY == 50
  137. Eep_ESC_Layout: DB "#",ESC_LETTER,"_",MCU_MHZ_LETTER,"_50# "
  138. ELSEIF FETON_DELAY == 70
  139. Eep_ESC_Layout: DB "#",ESC_LETTER,"_",MCU_MHZ_LETTER,"_70# "
  140. ELSEIF FETON_DELAY == 90
  141. Eep_ESC_Layout: DB "#",ESC_LETTER,"_",MCU_MHZ_LETTER,"_90# "
  142. ENDIF
  143. IF MCU_48MHZ == 0
  144. CSEG AT 1A50h
  145. Eep_ESC_MCU: DB "#BLHELI$EFM8B10#" ; Project and MCU tag (16 Bytes)
  146. ELSE
  147. CSEG AT 1A50h
  148. Eep_ESC_MCU: DB "#BLHELI$EFM8B21#" ; Project and MCU tag (16 Bytes)
  149. ENDIF
  150. Interrupt_Table_Definition MACRO
  151. CSEG AT 0 ; Code segment start
  152. jmp reset
  153. CSEG AT 03h ; Int0 interrupt
  154. jmp int0_int
  155. IF MCU_48MHZ == 1
  156. CSEG AT 0Bh ; Timer0 overflow interrupt
  157. jmp t0_int
  158. ENDIF
  159. CSEG AT 13h ; Int1 interrupt
  160. jmp int1_int
  161. CSEG AT 1Bh ; Timer1 overflow interrupt
  162. jmp t1_int
  163. CSEG AT 2Bh ; Timer2 overflow interrupt
  164. jmp t2_int
  165. CSEG AT 5Bh ; Pca interrupt
  166. jmp pca_int
  167. CSEG AT 73h ; Timer3 overflow/compare interrupt
  168. jmp t3_int
  169. ENDM
  170. Decode_DShot_2Bit MACRO dest, decode_fail
  171. movx A, @DPTR
  172. mov Temp6, A
  173. clr C
  174. subb A, Temp5 ; Subtract previous timestamp
  175. clr C
  176. subb A, Temp1
  177. jc decode_fail ; Check that bit is longer than minimum
  178. subb A, Temp1 ; Check if bit is zero or one
  179. mov A, dest ; Shift bit into data byte
  180. rlc A
  181. mov dest, A
  182. inc DPL ; Next bit
  183. movx A, @DPTR
  184. mov Temp5, A
  185. clr C
  186. subb A, Temp6
  187. clr C
  188. subb A, Temp1
  189. jc decode_fail
  190. subb A, Temp1
  191. mov A, dest
  192. rlc A
  193. mov dest, A
  194. inc DPL
  195. ENDM
  196. Initialize_PCA MACRO
  197. mov PCA0CN0, #40h ; PCA enabled
  198. mov PCA0MD, #08h ; PCA clock is system clock
  199. IF FETON_DELAY == 0
  200. IF MCU_48MHZ == 0
  201. mov PCA0PWM, #82h ; PCA ARSEL set and 10bits pwm
  202. ELSE
  203. mov PCA0PWM, #83h ; PCA ARSEL set and 11bits pwm
  204. ENDIF
  205. mov PCA0CENT, #00h ; Edge aligned pwm
  206. ELSE
  207. IF MCU_48MHZ == 0
  208. mov PCA0PWM, #81h ; PCA ARSEL set and 9bits pwm
  209. ELSE
  210. mov PCA0PWM, #82h ; PCA ARSEL set and 10bits pwm
  211. ENDIF
  212. mov PCA0CENT, #03h ; Center aligned pwm
  213. ENDIF
  214. ENDM
  215. Enable_Power_Pwm_Module MACRO
  216. IF FETON_DELAY == 0
  217. mov PCA0_POWER_MODULE, #4Ah ; Enable comparator of module, enable match, set pwm mode
  218. ELSE
  219. mov PCA0_POWER_MODULE, #42h ; Enable comparator of module, set pwm mode
  220. ENDIF
  221. ENDM
  222. Enable_Damp_Pwm_Module MACRO
  223. IF FETON_DELAY == 0
  224. mov PCA0_DAMP_MODULE, #00h ; Disable
  225. ELSE
  226. mov PCA0_DAMP_MODULE, #42h ; Enable comparator of module, set pwm mode
  227. ENDIF
  228. ENDM
  229. Set_Power_Pwm_Regs MACRO
  230. IF FETON_DELAY == 0
  231. mov PCA0_POWER_L, Power_Pwm_Reg_L
  232. mov PCA0_POWER_H, Power_Pwm_Reg_H
  233. ELSE
  234. clr C
  235. mov A, Power_Pwm_Reg_H
  236. rrc A
  237. mov Temp1, A
  238. mov A, Power_Pwm_Reg_L
  239. rrc A
  240. mov PCA0_POWER_L, A
  241. mov PCA0_POWER_H, Temp1
  242. ENDIF
  243. ENDM
  244. Set_Damp_Pwm_Regs MACRO
  245. IF FETON_DELAY == 0
  246. mov PCA0_DAMP_L, Damp_Pwm_Reg_L
  247. mov PCA0_DAMP_H, Damp_Pwm_Reg_H
  248. ELSE
  249. clr C
  250. mov A, Damp_Pwm_Reg_H
  251. rrc A
  252. mov Temp1, A
  253. mov A, Damp_Pwm_Reg_L
  254. rrc A
  255. mov PCA0_DAMP_L, A
  256. mov PCA0_DAMP_H, Temp1
  257. ENDIF
  258. ENDM
  259. Clear_COVF_Interrupt MACRO
  260. anl PCA0PWM, #0DFh
  261. ENDM
  262. Enable_COVF_Interrupt MACRO
  263. orl PCA0PWM, #40h
  264. ENDM
  265. Disable_COVF_Interrupt MACRO
  266. anl PCA0PWM, #0BFh
  267. ENDM
  268. ; CCF interrupt is only used for FETON_DELAY == 0
  269. Clear_CCF_Interrupt MACRO
  270. anl PCA0CN0, #0FEh
  271. ENDM
  272. Enable_CCF_Interrupt MACRO
  273. orl PCA0CPM0,#01h
  274. ENDM
  275. Disable_CCF_Interrupt MACRO
  276. anl PCA0CPM0,#0FEh
  277. ENDM
  278. Set_MCU_Clk_24MHz MACRO
  279. mov CLKSEL, #13h ; Set clock to 24MHz
  280. mov SFRPAGE, #10h
  281. mov PFE0CN, #00h ; Set flash timing for 24MHz
  282. mov SFRPAGE, #00h
  283. clr Flags3.CLOCK_SET_AT_48MHZ
  284. ENDM
  285. Set_MCU_Clk_48MHz MACRO
  286. mov SFRPAGE, #10h
  287. mov PFE0CN, #30h ; Set flash timing for 48MHz
  288. mov SFRPAGE, #00h
  289. mov CLKSEL, #03h ; Set clock to 48MHz
  290. setb Flags3.CLOCK_SET_AT_48MHZ
  291. ENDM