From 39209c73a3991a40a0cdda938fb6982038ac3e60 Mon Sep 17 00:00:00 2001 From: Martin Budden Date: Fri, 26 Aug 2016 14:33:20 +0100 Subject: [PATCH 1/2] Stack watermarking --- Makefile | 1 + src/main/drivers/stack_check.c | 64 ++++++++++++++++++++++++++++ src/main/main.c | 5 ++- src/main/scheduler/scheduler.h | 3 ++ src/main/scheduler/scheduler_tasks.c | 9 ++++ src/main/scheduler/scheduler_tasks.h | 1 + src/main/target/CJMCU/target.h | 3 ++ src/main/target/stm32_flash.ld | 5 ++- 8 files changed, 89 insertions(+), 2 deletions(-) create mode 100644 src/main/drivers/stack_check.c diff --git a/Makefile b/Makefile index d66da024f..c6dd2234e 100644 --- a/Makefile +++ b/Makefile @@ -391,6 +391,7 @@ COMMON_SRC = \ drivers/serial.c \ drivers/serial_uart.c \ drivers/sound_beeper.c \ + drivers/stack_check.c \ drivers/system.c \ drivers/timer.c \ flight/failsafe.c \ diff --git a/src/main/drivers/stack_check.c b/src/main/drivers/stack_check.c new file mode 100644 index 000000000..fed81d177 --- /dev/null +++ b/src/main/drivers/stack_check.c @@ -0,0 +1,64 @@ +/* + * stack_check.c + * + * Created on: 23 Aug 2016 + * Author: martinbudden + */ + +#include +#include +#include + +#include "platform.h" + +#ifdef STACK_CHECK + +#include "build/debug.h" + +#define STACK_FILL_CHAR 0xa5 + +extern char _estack; // end of stack, declared in .LD file +extern char _Min_Stack_Size; // declared in .LD file + +/* + * The ARM processor uses a full descending stack. This means the stack pointer holds the address + * of the last stacked item in memory. When the processor pushes a new item onto the stack, + * it decrements the stack pointer and then writes the item to the new memory location. + * + * + * RAM layout is generally as below, although some targets vary + * + * F1 Boards + * RAM is origin 0x20000000 length 20K that is: + * 0x20000000 to 0x20005000 + * + * F3 Boards + * RAM is origin 0x20000000 length 40K that is: + * 0x20000000 to 0x2000a000 + * + * F4 Boards + * RAM is origin 0x20000000 length 128K that is: + * 0x20000000 to 0x20020000 + * + */ +void taskStackCheck(void) +{ + char * const stackHighMem = &_estack; + const uint32_t stackSize = (uint32_t)&_Min_Stack_Size; + char * const stackLowMem = stackHighMem - stackSize; + const char * const stackCurrent = (char *)&stackLowMem; + + char *p; + for (p = stackLowMem; p < stackCurrent; ++p) { + if (*p != STACK_FILL_CHAR) { + break; + } + } +#ifdef DEBUG_STACK + debug[0] = (uint32_t)stackHighMem & 0xffff; + debug[1] = (uint32_t)stackLowMem & 0xffff; + debug[2] = (uint32_t)stackCurrent & 0xffff; + debug[3] = (uint32_t)p & 0xffff; // watermark +#endif +} +#endif diff --git a/src/main/main.c b/src/main/main.c index a0e3767fd..294a2c585 100644 --- a/src/main/main.c +++ b/src/main/main.c @@ -608,6 +608,9 @@ int main(void) #ifdef LED_STRIP setTaskEnabled(TASK_LEDSTRIP, feature(FEATURE_LED_STRIP)); #endif +#ifdef STACK_CHECK + setTaskEnabled(TASK_STACK_CHECK, true); +#endif while (true) { scheduler(); @@ -699,4 +702,4 @@ void HardFault_Handler(void) } } -#endif \ No newline at end of file +#endif diff --git a/src/main/scheduler/scheduler.h b/src/main/scheduler/scheduler.h index 2bd7b47e2..5e82a3daa 100755 --- a/src/main/scheduler/scheduler.h +++ b/src/main/scheduler/scheduler.h @@ -68,6 +68,9 @@ typedef enum { #ifdef LED_STRIP TASK_LEDSTRIP, #endif +#ifdef STACK_CHECK + TASK_STACK_CHECK, +#endif /* Count of real tasks */ TASK_COUNT, diff --git a/src/main/scheduler/scheduler_tasks.c b/src/main/scheduler/scheduler_tasks.c index d58235a11..ca9a80add 100755 --- a/src/main/scheduler/scheduler_tasks.c +++ b/src/main/scheduler/scheduler_tasks.c @@ -129,4 +129,13 @@ cfTask_t cfTasks[TASK_COUNT] = { .staticPriority = TASK_PRIORITY_IDLE, }, #endif + +#ifdef STACK_CHECK + [TASK_STACK_CHECK] = { + .taskName = "STACKCHECK", + .taskFunc = taskStackCheck, + .desiredPeriod = 1000000 / 10, // 10 Hz + .staticPriority = TASK_PRIORITY_IDLE, + }, +#endif }; diff --git a/src/main/scheduler/scheduler_tasks.h b/src/main/scheduler/scheduler_tasks.h index 995e2b303..6d1c86228 100644 --- a/src/main/scheduler/scheduler_tasks.h +++ b/src/main/scheduler/scheduler_tasks.h @@ -33,4 +33,5 @@ void taskUpdateDisplay(void); void taskTelemetry(void); void taskLedStrip(void); void taskSystem(void); +void taskStackCheck(void); diff --git a/src/main/target/CJMCU/target.h b/src/main/target/CJMCU/target.h index 2c71de593..8590c0311 100644 --- a/src/main/target/CJMCU/target.h +++ b/src/main/target/CJMCU/target.h @@ -109,6 +109,9 @@ #undef BLACKBOX #endif +#define STACK_CHECK +#define DEBUG_STACK + // Number of available PWM outputs #define MAX_PWM_OUTPUT_PORTS 4 diff --git a/src/main/target/stm32_flash.ld b/src/main/target/stm32_flash.ld index 40bc9965b..883dc7c41 100644 --- a/src/main/target/stm32_flash.ld +++ b/src/main/target/stm32_flash.ld @@ -110,6 +110,9 @@ SECTIONS } >RAM /* User_heap_stack section, used to check that there is enough RAM left */ + _heap_stack_end = ORIGIN(RAM)+LENGTH(RAM) - 8; /* 8 bytes to allow for alignment */ + _heap_stack_begin = _heap_stack_end - _Min_Stack_Size - _Min_Heap_Size; + . = _heap_stack_begin; ._user_heap_stack : { . = ALIGN(4); @@ -118,7 +121,7 @@ SECTIONS . = . + _Min_Heap_Size; . = . + _Min_Stack_Size; . = ALIGN(4); - } >RAM + } >RAM = 0xa5 /* MEMORY_bank1 section, code must be located here explicitly */ /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ From 7cc049a3c690dc3e1bfbd2a457b3b82316445c82 Mon Sep 17 00:00:00 2001 From: "Konstantin Sharlaimov (DigitalEntity)" Date: Sun, 2 Oct 2016 22:56:05 +1000 Subject: [PATCH 2/2] Add actual stack watermarking to startup code; add stack status to CLI status --- src/main/drivers/stack_check.c | 17 +- src/main/drivers/stack_check.h | 23 + src/main/io/serial_cli.c | 5 + src/main/startup/startup_stm32f10x_hd_gcc.S | 25 +- src/main/startup/startup_stm32f10x_md_gcc.S | 25 +- src/main/startup/startup_stm32f30x_md_gcc.S | 13 + .../startup_stm32f3_debug_hardfault_handler.S | 13 + src/main/startup/startup_stm32f40xx.s | 567 +++++++++--------- src/main/startup/startup_stm32f411xe.s | 377 ++++++------ 9 files changed, 593 insertions(+), 472 deletions(-) create mode 100755 src/main/drivers/stack_check.h diff --git a/src/main/drivers/stack_check.c b/src/main/drivers/stack_check.c index fed81d177..242b6ffbb 100644 --- a/src/main/drivers/stack_check.c +++ b/src/main/drivers/stack_check.c @@ -19,6 +19,7 @@ extern char _estack; // end of stack, declared in .LD file extern char _Min_Stack_Size; // declared in .LD file +static uint32_t _Used_Stack_Size; /* * The ARM processor uses a full descending stack. This means the stack pointer holds the address @@ -54,11 +55,25 @@ void taskStackCheck(void) break; } } + + _Used_Stack_Size = (uint32_t)stackHighMem - (uint32_t)p; + #ifdef DEBUG_STACK debug[0] = (uint32_t)stackHighMem & 0xffff; debug[1] = (uint32_t)stackLowMem & 0xffff; debug[2] = (uint32_t)stackCurrent & 0xffff; - debug[3] = (uint32_t)p & 0xffff; // watermark + debug[3] = (uint32_t)p & 0xffff; #endif } + +uint32_t getTotalStackSize(void) +{ + return (uint32_t)&_Min_Stack_Size; +} + +uint32_t getUsedStackSize(void) +{ + return _Used_Stack_Size; +} + #endif diff --git a/src/main/drivers/stack_check.h b/src/main/drivers/stack_check.h new file mode 100755 index 000000000..7df3f6016 --- /dev/null +++ b/src/main/drivers/stack_check.h @@ -0,0 +1,23 @@ +/* + * This file is part of Cleanflight. + * + * Cleanflight is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * Cleanflight is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Cleanflight. If not, see . + */ + +#pragma once + +#ifdef STACK_CHECK +uint32_t getTotalStackSize(void); +uint32_t getUsedStackSize(void); +#endif \ No newline at end of file diff --git a/src/main/io/serial_cli.c b/src/main/io/serial_cli.c index 4e657b3e9..057cc9353 100644 --- a/src/main/io/serial_cli.c +++ b/src/main/io/serial_cli.c @@ -52,6 +52,7 @@ #include "drivers/timer.h" #include "drivers/pwm_rx.h" #include "drivers/sdcard.h" +#include "drivers/stack_check.h" #include "drivers/buf_writer.h" @@ -2817,6 +2818,10 @@ static void cliStatus(char *cmdline) const uint16_t i2cErrorCounter = 0; #endif +#ifdef STACK_CHECK + cliPrintf("Used stack: %d, Total stack: %d\r\n", getUsedStackSize(), getTotalStackSize()); +#endif + cliPrintf("Cycle Time: %d, I2C Errors: %d, config size: %d\r\n", cycleTime, i2cErrorCounter, sizeof(master_t)); } diff --git a/src/main/startup/startup_stm32f10x_hd_gcc.S b/src/main/startup/startup_stm32f10x_hd_gcc.S index a828691b6..c2422c20f 100644 --- a/src/main/startup/startup_stm32f10x_hd_gcc.S +++ b/src/main/startup/startup_stm32f10x_hd_gcc.S @@ -98,6 +98,19 @@ LoopFillZerobss: cmp r2, r3 bcc FillZerobss +/* Mark the heap and stack */ + ldr r2, =_heap_stack_begin + b LoopMarkHeapStack + +MarkHeapStack: + movs r3, 0xa5a5a5a5 + str r3, [r2], #4 + +LoopMarkHeapStack: + ldr r3, = _heap_stack_end + cmp r2, r3 + bcc MarkHeapStack + /* Call the clock system intitialization function.*/ bl SystemInit /* Call the application's entry point.*/ @@ -105,7 +118,7 @@ LoopFillZerobss: /* Atollic update, branch LoopForever */ LoopForever: b LoopForever - + .equ RCC_APB2ENR, 0x40021018 // HJI - TC bootloader entry on reset mod .equ GPIO_AFIO_MASK, 0x00000009 // HJI - TC bootloader entry on reset mod .equ GPIOB_CRL, 0x40010C00 // HJI - TC bootloader entry on reset mod @@ -117,27 +130,27 @@ Reboot_Loader: // HJI - TC bootloader entry on reset mod ldr r6, =RCC_APB2ENR // HJI - TC bootloader entry on reset mod ldr r0, =GPIO_AFIO_MASK // HJI - TC bootloader entry on reset mod str R0, [r6]; // HJI - TC bootloader entry on reset mod - + // MAPR pt1 // HJI - TC bootloader entry on reset mod ldr r0, =AFIO_MAPR // HJI - TC bootloader entry on reset mod ldr r1, [r0] // HJI - TC bootloader entry on reset mod bic r1, r1, #0x0F000000 // HJI - TC bootloader entry on reset mod str r1, [r0] // HJI - TC bootloader entry on reset mod - + // MAPR pt2 // HJI - TC bootloader entry on reset mod lsls r1, r0, #9 // HJI - TC bootloader entry on reset mod str r1, [r0] // HJI - TC bootloader entry on reset mod - + // BRR // HJI - TC bootloader entry on reset mod ldr r4, =GPIOB_BRR // HJI - TC bootloader entry on reset mod movs r0, #0x18 // HJI - TC bootloader entry on reset mod str r0, [r4] // HJI - TC bootloader entry on reset mod - + // CRL // HJI - TC bootloader entry on reset mod ldr r1, =GPIOB_CRL // HJI - TC bootloader entry on reset mod ldr r0, =0x44433444 // HJI - TC bootloader entry on reset mod str r0, [r1] // HJI - TC bootloader entry on reset mod - + // Reboot to ROM // HJI - TC bootloader entry on reset mod ldr r0, =0x1FFFF000 // HJI - TC bootloader entry on reset mod ldr sp,[r0, #0] // HJI - TC bootloader entry on reset mod diff --git a/src/main/startup/startup_stm32f10x_md_gcc.S b/src/main/startup/startup_stm32f10x_md_gcc.S index 4bd8b2b73..946bf5bfd 100644 --- a/src/main/startup/startup_stm32f10x_md_gcc.S +++ b/src/main/startup/startup_stm32f10x_md_gcc.S @@ -97,6 +97,19 @@ LoopFillZerobss: cmp r2, r3 bcc FillZerobss +/* Mark the heap and stack */ + ldr r2, =_heap_stack_begin + b LoopMarkHeapStack + +MarkHeapStack: + movs r3, 0xa5a5a5a5 + str r3, [r2], #4 + +LoopMarkHeapStack: + ldr r3, = _heap_stack_end + cmp r2, r3 + bcc MarkHeapStack + /* Call the clock system intitialization function.*/ bl SystemInit /* Call the application's entry point.*/ @@ -104,7 +117,7 @@ LoopFillZerobss: /* Atollic update, branch LoopForever */ LoopForever: b LoopForever - + .equ RCC_APB2ENR, 0x40021018 // HJI - TC bootloader entry on reset mod .equ GPIO_AFIO_MASK, 0x00000009 // HJI - TC bootloader entry on reset mod .equ GPIOB_CRL, 0x40010C00 // HJI - TC bootloader entry on reset mod @@ -116,27 +129,27 @@ Reboot_Loader: // HJI - TC bootloader entry on reset mod ldr r6, =RCC_APB2ENR // HJI - TC bootloader entry on reset mod ldr r0, =GPIO_AFIO_MASK // HJI - TC bootloader entry on reset mod str R0, [r6]; // HJI - TC bootloader entry on reset mod - + // MAPR pt1 // HJI - TC bootloader entry on reset mod ldr r0, =AFIO_MAPR // HJI - TC bootloader entry on reset mod ldr r1, [r0] // HJI - TC bootloader entry on reset mod bic r1, r1, #0x0F000000 // HJI - TC bootloader entry on reset mod str r1, [r0] // HJI - TC bootloader entry on reset mod - + // MAPR pt2 // HJI - TC bootloader entry on reset mod lsls r1, r0, #9 // HJI - TC bootloader entry on reset mod str r1, [r0] // HJI - TC bootloader entry on reset mod - + // BRR // HJI - TC bootloader entry on reset mod ldr r4, =GPIOB_BRR // HJI - TC bootloader entry on reset mod movs r0, #0x18 // HJI - TC bootloader entry on reset mod str r0, [r4] // HJI - TC bootloader entry on reset mod - + // CRL // HJI - TC bootloader entry on reset mod ldr r1, =GPIOB_CRL // HJI - TC bootloader entry on reset mod ldr r0, =0x44433444 // HJI - TC bootloader entry on reset mod str r0, [r1] // HJI - TC bootloader entry on reset mod - + // Reboot to ROM // HJI - TC bootloader entry on reset mod ldr r0, =0x1FFFF000 // HJI - TC bootloader entry on reset mod ldr sp,[r0, #0] // HJI - TC bootloader entry on reset mod diff --git a/src/main/startup/startup_stm32f30x_md_gcc.S b/src/main/startup/startup_stm32f30x_md_gcc.S index e1387cbc0..b0dc20a65 100644 --- a/src/main/startup/startup_stm32f30x_md_gcc.S +++ b/src/main/startup/startup_stm32f30x_md_gcc.S @@ -105,6 +105,19 @@ LoopFillZerobss: cmp r2, r3 bcc FillZerobss +/* Mark the heap and stack */ + ldr r2, =_heap_stack_begin + b LoopMarkHeapStack + +MarkHeapStack: + movs r3, 0xa5a5a5a5 + str r3, [r2], #4 + +LoopMarkHeapStack: + ldr r3, = _heap_stack_end + cmp r2, r3 + bcc MarkHeapStack + /* Call the clock system intitialization function.*/ bl SystemInit /* Call the application's entry point.*/ diff --git a/src/main/startup/startup_stm32f3_debug_hardfault_handler.S b/src/main/startup/startup_stm32f3_debug_hardfault_handler.S index 65ee39a67..13a8487d2 100644 --- a/src/main/startup/startup_stm32f3_debug_hardfault_handler.S +++ b/src/main/startup/startup_stm32f3_debug_hardfault_handler.S @@ -108,6 +108,19 @@ LoopFillZerobss: cmp r2, r3 bcc FillZerobss +/* Mark the heap and stack */ + ldr r2, =_heap_stack_begin + b LoopMarkHeapStack + +MarkHeapStack: + movs r3, 0xa5a5a5a5 + str r3, [r2], #4 + +LoopMarkHeapStack: + ldr r3, = _heap_stack_end + cmp r2, r3 + bcc MarkHeapStack + /* Call the clock system intitialization function.*/ bl SystemInit /* Call the application's entry point.*/ diff --git a/src/main/startup/startup_stm32f40xx.s b/src/main/startup/startup_stm32f40xx.s index fa98fff96..680ec28dd 100644 --- a/src/main/startup/startup_stm32f40xx.s +++ b/src/main/startup/startup_stm32f40xx.s @@ -4,14 +4,14 @@ * @author MCD Application Team * @version V1.6.1 * @date 21-October-2015 - * @brief STM32F40xxx/41xxx Devices vector table for Atollic TrueSTUDIO toolchain. - * Same as startup_stm32f40_41xxx.s and maintained for legacy purpose + * @brief STM32F40xxx/41xxx Devices vector table for Atollic TrueSTUDIO toolchain. + * Same as startup_stm32f40_41xxx.s and maintained for legacy purpose * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address - * - Configure the clock system and the external SRAM mounted on - * STM324xG-EVAL board to be used as data memory (optional, + * - Configure the clock system and the external SRAM mounted on + * STM324xG-EVAL board to be used as data memory (optional, * to be enabled by user) * - Branches to main in the C library (which eventually * calls main()). @@ -28,15 +28,15 @@ * * http://www.st.com/software_license_agreement_liberty_v2 * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * ****************************************************************************** */ - + .syntax unified .cpu cortex-m4 .fpu softvfp @@ -46,10 +46,10 @@ .global Default_Handler .global irq_stack -/* start address for the initialization values of the .data section. +/* start address for the initialization values of the .data section. defined in linker script */ .word _sidata -/* start address for the .data section. defined in linker script */ +/* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata @@ -63,7 +63,7 @@ defined in linker script */ * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application - * supplied main() routine is called. + * supplied main() routine is called. * @param None * @retval : None */ @@ -71,7 +71,7 @@ defined in linker script */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function -Reset_Handler: +Reset_Handler: ldr r0, =0x2001FFFC // mj666 ldr r1, =0xDEADBEEF // mj666 ldr r2, [r0, #0] // mj666 @@ -79,7 +79,7 @@ Reset_Handler: cmp r2, r1 // mj666 beq Reboot_Loader // mj666 -/* Copy the data segment initializers from flash to SRAM */ +/* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit @@ -88,7 +88,7 @@ CopyDataInit: ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 - + LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata @@ -97,16 +97,29 @@ LoopCopyDataInit: bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss -/* Zero fill the bss segment. */ +/* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 - + LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss +/* Mark the heap and stack */ + ldr r2, =_heap_stack_begin + b LoopMarkHeapStack + +MarkHeapStack: + movs r3, 0xa5a5a5a5 + str r3, [r2], #4 + +LoopMarkHeapStack: + ldr r3, = _heap_stack_end + cmp r2, r3 + bcc MarkHeapStack + /*FPU settings*/ ldr r0, =0xE000ED88 /* Enable CP10,CP11 */ ldr r1,[r0] @@ -114,11 +127,11 @@ LoopFillZerobss: str r1,[r0] /* Call the clock system intitialization function.*/ - bl SystemInit + bl SystemInit /* Call the application's entry point.*/ bl main - bx lr + bx lr LoopForever: b LoopForever @@ -134,11 +147,11 @@ Reboot_Loader: // mj666 .size Reset_Handler, .-Reset_Handler /** - * @brief This is the code that gets called when the processor receives an + * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. - * @param None - * @retval None + * @param None + * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: @@ -150,7 +163,7 @@ Infinite_Loop: * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. -* +* *******************************************************************************/ .section .irqstack,"aw",%progbits irq_stack: @@ -159,8 +172,8 @@ Infinite_Loop: .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors - - + + g_pfnVectors: .word irq_stack+1024 .word Reset_Handler @@ -178,107 +191,107 @@ g_pfnVectors: .word 0 .word PendSV_Handler .word SysTick_Handler - + /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_IRQHandler /* PVD through EXTI Line detection */ - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ - .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ - .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ - .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ - .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ - .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ - .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ - .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ - .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ - .word CAN1_TX_IRQHandler /* CAN1 TX */ - .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ - .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ - .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word CAN1_TX_IRQHandler /* CAN1 TX */ + .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /* CAN1 SCE */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ - .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ - .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ - .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ - .word FSMC_IRQHandler /* FSMC */ - .word SDIO_IRQHandler /* SDIO */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word FSMC_IRQHandler /* FSMC */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word UART4_IRQHandler /* UART4 */ + .word UART5_IRQHandler /* UART5 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ - .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ - .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ - .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ - .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ - .word ETH_IRQHandler /* Ethernet */ - .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ - .word CAN2_TX_IRQHandler /* CAN2 TX */ - .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ - .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ - .word CAN2_SCE_IRQHandler /* CAN2 SCE */ - .word OTG_FS_IRQHandler /* USB OTG FS */ - .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ - .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ - .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ - .word USART6_IRQHandler /* USART6 */ - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ - .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ - .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ - .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ - .word OTG_HS_IRQHandler /* USB OTG HS */ - .word DCMI_IRQHandler /* DCMI */ - .word CRYP_IRQHandler /* CRYP crypto */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word ETH_IRQHandler /* Ethernet */ + .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ + .word CAN2_TX_IRQHandler /* CAN2 TX */ + .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /* CAN2 SCE */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .word OTG_HS_IRQHandler /* USB OTG HS */ + .word DCMI_IRQHandler /* DCMI */ + .word CRYP_IRQHandler /* CRYP crypto */ .word HASH_RNG_IRQHandler /* Hash and Rng */ .word FPU_IRQHandler /* FPU */ - + /******************************************************************************* * -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override * this definition. -* +* *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler - + .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler - + .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler - + .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler @@ -295,252 +308,252 @@ g_pfnVectors: .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler + + .weak TAMP_STAMP_IRQHandler .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler + + .weak RTC_WKUP_IRQHandler .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler + + .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler + + .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler + + .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - .weak EXTI3_IRQHandler + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler + + .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Stream0_IRQHandler + + .weak DMA1_Stream0_IRQHandler .thumb_set DMA1_Stream0_IRQHandler,Default_Handler - - .weak DMA1_Stream1_IRQHandler + + .weak DMA1_Stream1_IRQHandler .thumb_set DMA1_Stream1_IRQHandler,Default_Handler - - .weak DMA1_Stream2_IRQHandler + + .weak DMA1_Stream2_IRQHandler .thumb_set DMA1_Stream2_IRQHandler,Default_Handler - - .weak DMA1_Stream3_IRQHandler - .thumb_set DMA1_Stream3_IRQHandler,Default_Handler - .weak DMA1_Stream4_IRQHandler + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler .thumb_set DMA1_Stream4_IRQHandler,Default_Handler - - .weak DMA1_Stream5_IRQHandler + + .weak DMA1_Stream5_IRQHandler .thumb_set DMA1_Stream5_IRQHandler,Default_Handler - - .weak DMA1_Stream6_IRQHandler + + .weak DMA1_Stream6_IRQHandler .thumb_set DMA1_Stream6_IRQHandler,Default_Handler - - .weak ADC_IRQHandler + + .weak ADC_IRQHandler .thumb_set ADC_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler + + .weak CAN1_TX_IRQHandler .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler + + .weak CAN1_RX0_IRQHandler .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler + + .weak CAN1_RX1_IRQHandler .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler + + .weak CAN1_SCE_IRQHandler .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler + + .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM9_IRQHandler + + .weak TIM1_BRK_TIM9_IRQHandler .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM10_IRQHandler + + .weak TIM1_UP_TIM10_IRQHandler .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM11_IRQHandler + + .weak TIM1_TRG_COM_TIM11_IRQHandler .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler + + .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler + + .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler + + .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler + + .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler + + .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler + + .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler + + .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler + + .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler + + .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler + + .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler + + .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler + + .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler + + .weak USART3_IRQHandler .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler + + .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler + + .weak RTC_Alarm_IRQHandler .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak OTG_FS_WKUP_IRQHandler + + .weak OTG_FS_WKUP_IRQHandler .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - - .weak TIM8_BRK_TIM12_IRQHandler + + .weak TIM8_BRK_TIM12_IRQHandler .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler - - .weak TIM8_UP_TIM13_IRQHandler + + .weak TIM8_UP_TIM13_IRQHandler .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_TIM14_IRQHandler + + .weak TIM8_TRG_COM_TIM14_IRQHandler .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler + + .weak TIM8_CC_IRQHandler .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak DMA1_Stream7_IRQHandler + + .weak DMA1_Stream7_IRQHandler .thumb_set DMA1_Stream7_IRQHandler,Default_Handler - - .weak FSMC_IRQHandler + + .weak FSMC_IRQHandler .thumb_set FSMC_IRQHandler,Default_Handler - - .weak SDIO_IRQHandler + + .weak SDIO_IRQHandler .thumb_set SDIO_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler + + .weak TIM5_IRQHandler .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler + + .weak SPI3_IRQHandler .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler + + .weak UART4_IRQHandler .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler + + .weak UART5_IRQHandler .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler + + .weak TIM6_DAC_IRQHandler .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler + + .weak TIM7_IRQHandler .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Stream0_IRQHandler + + .weak DMA2_Stream0_IRQHandler .thumb_set DMA2_Stream0_IRQHandler,Default_Handler - - .weak DMA2_Stream1_IRQHandler + + .weak DMA2_Stream1_IRQHandler .thumb_set DMA2_Stream1_IRQHandler,Default_Handler - - .weak DMA2_Stream2_IRQHandler + + .weak DMA2_Stream2_IRQHandler .thumb_set DMA2_Stream2_IRQHandler,Default_Handler - - .weak DMA2_Stream3_IRQHandler + + .weak DMA2_Stream3_IRQHandler .thumb_set DMA2_Stream3_IRQHandler,Default_Handler - - .weak DMA2_Stream4_IRQHandler + + .weak DMA2_Stream4_IRQHandler .thumb_set DMA2_Stream4_IRQHandler,Default_Handler - - .weak ETH_IRQHandler + + .weak ETH_IRQHandler .thumb_set ETH_IRQHandler,Default_Handler - - .weak ETH_WKUP_IRQHandler + + .weak ETH_WKUP_IRQHandler .thumb_set ETH_WKUP_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler + + .weak CAN2_TX_IRQHandler .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler + + .weak CAN2_RX0_IRQHandler .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler + + .weak CAN2_RX1_IRQHandler .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler + + .weak CAN2_SCE_IRQHandler .thumb_set CAN2_SCE_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler + + .weak OTG_FS_IRQHandler .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Stream5_IRQHandler + + .weak DMA2_Stream5_IRQHandler .thumb_set DMA2_Stream5_IRQHandler,Default_Handler - - .weak DMA2_Stream6_IRQHandler + + .weak DMA2_Stream6_IRQHandler .thumb_set DMA2_Stream6_IRQHandler,Default_Handler - - .weak DMA2_Stream7_IRQHandler + + .weak DMA2_Stream7_IRQHandler .thumb_set DMA2_Stream7_IRQHandler,Default_Handler - - .weak USART6_IRQHandler + + .weak USART6_IRQHandler .thumb_set USART6_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler + + .weak I2C3_EV_IRQHandler .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler + + .weak I2C3_ER_IRQHandler .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_OUT_IRQHandler + + .weak OTG_HS_EP1_OUT_IRQHandler .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_IN_IRQHandler + + .weak OTG_HS_EP1_IN_IRQHandler .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler - - .weak OTG_HS_WKUP_IRQHandler + + .weak OTG_HS_WKUP_IRQHandler .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler - - .weak OTG_HS_IRQHandler + + .weak OTG_HS_IRQHandler .thumb_set OTG_HS_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler + + .weak DCMI_IRQHandler .thumb_set DCMI_IRQHandler,Default_Handler - - .weak CRYP_IRQHandler + + .weak CRYP_IRQHandler .thumb_set CRYP_IRQHandler,Default_Handler - - .weak HASH_RNG_IRQHandler - .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler - + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/main/startup/startup_stm32f411xe.s b/src/main/startup/startup_stm32f411xe.s index f8c460a54..4714dfe71 100644 --- a/src/main/startup/startup_stm32f411xe.s +++ b/src/main/startup/startup_stm32f411xe.s @@ -36,7 +36,7 @@ * ****************************************************************************** */ - + .syntax unified .cpu cortex-m4 .fpu softvfp @@ -46,10 +46,10 @@ .global Default_Handler .global irq_stack -/* start address for the initialization values of the .data section. +/* start address for the initialization values of the .data section. defined in linker script */ .word _sidata -/* start address for the .data section. defined in linker script */ +/* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata @@ -63,7 +63,7 @@ defined in linker script */ * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application - * supplied main() routine is called. + * supplied main() routine is called. * @param None * @retval : None */ @@ -71,7 +71,7 @@ defined in linker script */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function -Reset_Handler: +Reset_Handler: ldr r0, =0x2001FFFC // mj666 ldr r1, =0xDEADBEEF // mj666 ldr r2, [r0, #0] // mj666 @@ -79,7 +79,7 @@ Reset_Handler: cmp r2, r1 // mj666 beq Reboot_Loader // mj666 -/* Copy the data segment initializers from flash to SRAM */ +/* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit @@ -88,7 +88,7 @@ CopyDataInit: ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 - + LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata @@ -97,16 +97,29 @@ LoopCopyDataInit: bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss -/* Zero fill the bss segment. */ +/* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 - + LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss +/* Mark the heap and stack */ + ldr r2, =_heap_stack_begin + b LoopMarkHeapStack + +MarkHeapStack: + movs r3, 0xa5a5a5a5 + str r3, [r2], #4 + +LoopMarkHeapStack: + ldr r3, = _heap_stack_end + cmp r2, r3 + bcc MarkHeapStack + /*FPU settings*/ ldr r0, =0xE000ED88 /* Enable CP10,CP11 */ ldr r1,[r0] @@ -114,11 +127,11 @@ LoopFillZerobss: str r1,[r0] /* Call the clock system intitialization function.*/ - bl SystemInit + bl SystemInit /* Call the application's entry point.*/ bl main - bx lr + bx lr LoopForever: b LoopForever @@ -133,11 +146,11 @@ Reboot_Loader: // mj666 .size Reset_Handler, .-Reset_Handler /** - * @brief This is the code that gets called when the processor receives an + * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. - * @param None - * @retval None + * @param None + * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: @@ -149,7 +162,7 @@ Infinite_Loop: * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. -* +* *******************************************************************************/ .section .irqstack,"aw",%progbits irq_stack: @@ -158,7 +171,7 @@ Infinite_Loop: .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors - + g_pfnVectors: .word irq_stack+1024 @@ -177,82 +190,82 @@ g_pfnVectors: .word 0 .word PendSV_Handler .word SysTick_Handler - + /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_IRQHandler /* PVD through EXTI Line detection */ - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ - .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ - .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ - .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ - .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ - .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ - .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ - .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ .word 0 /* CAN1 TX */ .word 0 /* CAN1 RX0 */ .word 0 /* CAN1 RX1 */ .word 0 /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ - .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ - .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ .word 0 /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ - .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ .word 0 /* TIM8 Break and TIM12 */ .word 0 /* TIM8 Update and TIM13 */ .word 0 /* TIM8 Trigger and Commutation and TIM14 */ .word 0 /* TIM8 Capture Compare */ - .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ .word 0 /* FSMC */ - .word SDIO_IRQHandler /* SDIO */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ .word 0 /* UART4 */ .word 0 /* UART5 */ .word 0 /* TIM6 and DAC1&2 underrun errors */ .word 0 /* TIM7 */ - .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ - .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ - .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ - .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ - .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ .word 0 /* Ethernet */ .word 0 /* Ethernet Wakeup through EXTI line */ .word 0 /* CAN2 TX */ .word 0 /* CAN2 RX0 */ .word 0 /* CAN2 RX1 */ .word 0 /* CAN2 SCE */ - .word OTG_FS_IRQHandler /* USB OTG FS */ - .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ - .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ - .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ - .word USART6_IRQHandler /* USART6 */ - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ .word 0 /* USB OTG HS End Point 1 Out */ .word 0 /* USB OTG HS End Point 1 In */ .word 0 /* USB OTG HS Wakeup through EXTI */ @@ -267,20 +280,20 @@ g_pfnVectors: .word SPI5_IRQHandler /* SPI5 */ /******************************************************************************* * -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override * this definition. -* +* *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler - + .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler - + .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler - + .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler @@ -297,172 +310,172 @@ g_pfnVectors: .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler + + .weak TAMP_STAMP_IRQHandler .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler + + .weak RTC_WKUP_IRQHandler .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler + + .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler + + .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler + + .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - .weak EXTI3_IRQHandler + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler + + .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Stream0_IRQHandler + + .weak DMA1_Stream0_IRQHandler .thumb_set DMA1_Stream0_IRQHandler,Default_Handler - - .weak DMA1_Stream1_IRQHandler + + .weak DMA1_Stream1_IRQHandler .thumb_set DMA1_Stream1_IRQHandler,Default_Handler - - .weak DMA1_Stream2_IRQHandler + + .weak DMA1_Stream2_IRQHandler .thumb_set DMA1_Stream2_IRQHandler,Default_Handler - - .weak DMA1_Stream3_IRQHandler - .thumb_set DMA1_Stream3_IRQHandler,Default_Handler - .weak DMA1_Stream4_IRQHandler + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler .thumb_set DMA1_Stream4_IRQHandler,Default_Handler - - .weak DMA1_Stream5_IRQHandler + + .weak DMA1_Stream5_IRQHandler .thumb_set DMA1_Stream5_IRQHandler,Default_Handler - - .weak DMA1_Stream6_IRQHandler + + .weak DMA1_Stream6_IRQHandler .thumb_set DMA1_Stream6_IRQHandler,Default_Handler - - .weak ADC_IRQHandler + + .weak ADC_IRQHandler .thumb_set ADC_IRQHandler,Default_Handler - .weak EXTI9_5_IRQHandler + .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM9_IRQHandler + + .weak TIM1_BRK_TIM9_IRQHandler .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM10_IRQHandler + + .weak TIM1_UP_TIM10_IRQHandler .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM11_IRQHandler + + .weak TIM1_TRG_COM_TIM11_IRQHandler .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler + + .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler + + .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler + + .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler + + .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler + + .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler + + .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler + + .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler + + .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler + + .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler + + .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler + + .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler + + .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler - .weak EXTI15_10_IRQHandler + .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler + + .weak RTC_Alarm_IRQHandler .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak OTG_FS_WKUP_IRQHandler + + .weak OTG_FS_WKUP_IRQHandler .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - .weak DMA1_Stream7_IRQHandler + .weak DMA1_Stream7_IRQHandler .thumb_set DMA1_Stream7_IRQHandler,Default_Handler - .weak SDIO_IRQHandler + .weak SDIO_IRQHandler .thumb_set SDIO_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler + + .weak TIM5_IRQHandler .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler + + .weak SPI3_IRQHandler .thumb_set SPI3_IRQHandler,Default_Handler - .weak DMA2_Stream0_IRQHandler + .weak DMA2_Stream0_IRQHandler .thumb_set DMA2_Stream0_IRQHandler,Default_Handler - - .weak DMA2_Stream1_IRQHandler + + .weak DMA2_Stream1_IRQHandler .thumb_set DMA2_Stream1_IRQHandler,Default_Handler - - .weak DMA2_Stream2_IRQHandler + + .weak DMA2_Stream2_IRQHandler .thumb_set DMA2_Stream2_IRQHandler,Default_Handler - - .weak DMA2_Stream3_IRQHandler + + .weak DMA2_Stream3_IRQHandler .thumb_set DMA2_Stream3_IRQHandler,Default_Handler - - .weak DMA2_Stream4_IRQHandler + + .weak DMA2_Stream4_IRQHandler .thumb_set DMA2_Stream4_IRQHandler,Default_Handler - .weak OTG_FS_IRQHandler + .weak OTG_FS_IRQHandler .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Stream5_IRQHandler + + .weak DMA2_Stream5_IRQHandler .thumb_set DMA2_Stream5_IRQHandler,Default_Handler - - .weak DMA2_Stream6_IRQHandler + + .weak DMA2_Stream6_IRQHandler .thumb_set DMA2_Stream6_IRQHandler,Default_Handler - - .weak DMA2_Stream7_IRQHandler + + .weak DMA2_Stream7_IRQHandler .thumb_set DMA2_Stream7_IRQHandler,Default_Handler - - .weak USART6_IRQHandler + + .weak USART6_IRQHandler .thumb_set USART6_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler + + .weak I2C3_EV_IRQHandler .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler + + .weak I2C3_ER_IRQHandler .thumb_set I2C3_ER_IRQHandler,Default_Handler - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler .weak SPI4_IRQHandler .thumb_set SPI4_IRQHandler,Default_Handler