bkleiner
4 years ago
2 changed files with 129 additions and 1 deletions
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/* |
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* This file is part of Cleanflight and Betaflight. |
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* |
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* Cleanflight and Betaflight are free software. You can redistribute |
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* this software and/or modify this software under the terms of the |
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* GNU General Public License as published by the Free Software |
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* Foundation, either version 3 of the License, or (at your option) |
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* any later version. |
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* |
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* Cleanflight and Betaflight are distributed in the hope that they |
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied |
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
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* See the GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this software. |
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* |
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* If not, see <http://www.gnu.org/licenses/>. |
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*/ |
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|
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#include <stdbool.h> |
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#include <stdint.h> |
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#include <string.h> |
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#include <platform.h> |
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#include "common/utils.h" |
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#include "drivers/nvic.h" |
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#include "drivers/dma.h" |
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#include "drivers/rcc.h" |
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|
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/* |
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* DMA descriptors. |
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*/ |
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static dmaChannelDescriptor_t dmaDescriptors[] = { |
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[0] = DEFINE_DMA_CHANNEL(1, 0, 0), // DMA1_ST0 |
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[1] = DEFINE_DMA_CHANNEL(1, 1, 6), // DMA1_ST1 |
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[2] = DEFINE_DMA_CHANNEL(1, 2, 16), // DMA1_ST2 |
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[3] = DEFINE_DMA_CHANNEL(1, 3, 22), // DMA1_ST3 |
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[4] = DEFINE_DMA_CHANNEL(1, 4, 32), // DMA1_ST4 |
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[5] = DEFINE_DMA_CHANNEL(1, 5, 38), // DMA1_ST5 |
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[6] = DEFINE_DMA_CHANNEL(1, 6, 48), // DMA1_ST6 |
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[7] = DEFINE_DMA_CHANNEL(1, 7, 54), // DMA1_ST7 |
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[8] = DEFINE_DMA_CHANNEL(2, 0, 0), // DMA2_ST0 |
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[9] = DEFINE_DMA_CHANNEL(2, 1, 6), // DMA2_ST1 |
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[10] = DEFINE_DMA_CHANNEL(2, 2, 16), // DMA2_ST2 |
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[11] = DEFINE_DMA_CHANNEL(2, 3, 22), // DMA2_ST3 |
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[12] = DEFINE_DMA_CHANNEL(2, 4, 32), // DMA2_ST4 |
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[13] = DEFINE_DMA_CHANNEL(2, 5, 38), // DMA2_ST5 |
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[14] = DEFINE_DMA_CHANNEL(2, 6, 48), // DMA2_ST6 |
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[15] = DEFINE_DMA_CHANNEL(2, 7, 54), // DMA2_ST7 |
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}; |
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|
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/* |
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* DMA IRQ Handlers |
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*/ |
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DEFINE_DMA_IRQ_HANDLER(1, 0, 0) // DMA1_ST0 |
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DEFINE_DMA_IRQ_HANDLER(1, 1, 1) // DMA1_ST1 |
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DEFINE_DMA_IRQ_HANDLER(1, 2, 2) // DMA1_ST2 |
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DEFINE_DMA_IRQ_HANDLER(1, 3, 3) // DMA1_ST3 |
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DEFINE_DMA_IRQ_HANDLER(1, 4, 4) // DMA1_ST4 |
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DEFINE_DMA_IRQ_HANDLER(1, 5, 5) // DMA1_ST5 |
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DEFINE_DMA_IRQ_HANDLER(1, 6, 6) // DMA1_ST6 |
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DEFINE_DMA_IRQ_HANDLER(1, 7, 7) // DMA1_ST7 |
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DEFINE_DMA_IRQ_HANDLER(2, 0, 8) // DMA2_ST0 |
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DEFINE_DMA_IRQ_HANDLER(2, 1, 9) // DMA2_ST1 |
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DEFINE_DMA_IRQ_HANDLER(2, 2, 10) // DMA2_ST2 |
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DEFINE_DMA_IRQ_HANDLER(2, 3, 11) // DMA2_ST3 |
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DEFINE_DMA_IRQ_HANDLER(2, 4, 12) // DMA2_ST4 |
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DEFINE_DMA_IRQ_HANDLER(2, 5, 13) // DMA2_ST5 |
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DEFINE_DMA_IRQ_HANDLER(2, 6, 14) // DMA2_ST6 |
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DEFINE_DMA_IRQ_HANDLER(2, 7, 15) // DMA2_ST7 |
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|
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DMA_t dmaGetByTag(dmaTag_t tag) |
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{ |
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for (unsigned i = 0; i < ARRAYLEN(dmaDescriptors); i++) { |
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if (DMATAG_GET_DMA(dmaDescriptors[i].tag) == DMATAG_GET_DMA(tag) && DMATAG_GET_STREAM(dmaDescriptors[i].tag) == DMATAG_GET_STREAM(tag)) { |
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return (DMA_t)&dmaDescriptors[i]; |
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} |
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} |
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return (DMA_t) NULL; |
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} |
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void dmaEnableClock(DMA_t dma) |
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{ |
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if (dma->dma == DMA1) { |
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RCC_ClockCmd(RCC_AHB1(DMA1), ENABLE); |
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} |
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else { |
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RCC_ClockCmd(RCC_AHB1(DMA2), ENABLE); |
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} |
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} |
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resourceOwner_e dmaGetOwner(DMA_t dma) |
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{ |
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return dma->owner; |
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} |
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void dmaInit(DMA_t dma, resourceOwner_e owner, uint8_t resourceIndex) |
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{ |
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dmaEnableClock(dma); |
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dma->owner = owner; |
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dma->resourceIndex = resourceIndex; |
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} |
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void dmaSetHandler(DMA_t dma, dmaCallbackHandlerFuncPtr callback, uint32_t priority, uint32_t userParam) |
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{ |
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dmaEnableClock(dma); |
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dma->irqHandlerCallback = callback; |
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dma->userParam = userParam; |
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HAL_NVIC_SetPriority(dma->irqNumber, priority, 0); |
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HAL_NVIC_EnableIRQ(dma->irqNumber); |
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} |
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DMA_t dmaGetByRef(const DMA_Stream_TypeDef* ref) |
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{ |
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for (unsigned i = 0; i < (sizeof(dmaDescriptors) / sizeof(dmaDescriptors[0])); i++) { |
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if (ref == dmaDescriptors[i].ref) { |
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return &dmaDescriptors[i]; |
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} |
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} |
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return NULL; |
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} |
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