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@ -75,6 +75,8 @@ static const TIM_TypeDef *timers[MAX_TIMERS] = { |
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TIM1, TIM2, TIM3, TIM4 |
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}; |
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4) |
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB) |
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#endif |
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#if (defined(STM32F303xC) || defined(STM32F3DISCOVERY)) && !(defined(CHEBUZZF3) || defined(NAZE32PRO)) |
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@ -100,6 +102,11 @@ const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = { |
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static const TIM_TypeDef *timers[MAX_TIMERS] = { |
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TIM1, TIM2, TIM3, TIM4, TIM8, TIM16, TIM17 |
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}; |
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4) |
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM8 | RCC_APB2Periph_TIM16 | RCC_APB2Periph_TIM17) |
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#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB | RCC_AHBPeriph_GPIOC | RCC_AHBPeriph_GPIOD) |
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#endif |
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#if defined(CHEBUZZF3) |
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@ -132,6 +139,11 @@ const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = { |
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static const TIM_TypeDef *timers[MAX_TIMERS] = { |
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TIM1, TIM2, TIM3, TIM4, TIM8, TIM15, TIM16, TIM17 |
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}; |
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4) |
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM8 | RCC_APB2Periph_TIM15 | RCC_APB2Periph_TIM16 | RCC_APB2Periph_TIM17) |
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#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB | RCC_AHBPeriph_GPIOC | RCC_AHBPeriph_GPIOD | RCC_AHBPeriph_GPIOF) |
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#endif |
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#ifdef NAZE32PRO |
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@ -158,6 +170,11 @@ const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = { |
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static const TIM_TypeDef *timers[MAX_TIMERS] = { |
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TIM1, TIM2, TIM3, TIM4, TIM15, TIM16, TIM17 |
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}; |
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4) |
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15 | RCC_APB2Periph_TIM16 | RCC_APB2Periph_TIM17) |
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#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB) |
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#endif |
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@ -363,4 +380,51 @@ void TIM1_TRG_COM_TIM17_IRQHandler(void) |
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void timerInit(void) |
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{ |
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memset(timerConfig, 0, sizeof (timerConfig)); |
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#ifdef TIMER_APB1_PERIPHERALS |
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RCC_APB1PeriphClockCmd(TIMER_APB1_PERIPHERALS, ENABLE); |
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#endif |
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#ifdef TIMER_APB2_PERIPHERALS |
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RCC_APB2PeriphClockCmd(TIMER_APB2_PERIPHERALS, ENABLE); |
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#endif |
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#ifdef TIMER_AHB_PERIPHERALS |
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RCC_AHBPeriphClockCmd(TIMER_AHB_PERIPHERALS, ENABLE); |
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#endif |
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#ifdef STM32F303xC |
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource8, GPIO_AF_6); |
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource8, GPIO_AF_1); |
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource9, GPIO_AF_1); |
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GPIO_PinAFConfig(GPIOC, GPIO_PinSource6, GPIO_AF_4); |
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GPIO_PinAFConfig(GPIOC, GPIO_PinSource7, GPIO_AF_4); |
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GPIO_PinAFConfig(GPIOC, GPIO_PinSource8, GPIO_AF_4); |
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#ifdef CHEBUZZF3 |
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GPIO_PinAFConfig(GPIOF, GPIO_PinSource9, GPIO_AF_3); |
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GPIO_PinAFConfig(GPIOF, GPIO_PinSource10, GPIO_AF_3); |
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#endif |
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GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_2); |
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GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_2); |
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GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_2); |
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GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_2); |
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource1, GPIO_AF_1); |
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_1); |
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource0, GPIO_AF_2); |
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource1, GPIO_AF_2); |
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource4, GPIO_AF_2); |
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#endif |
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#ifdef NAZE32PRO |
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_6); |
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_6); |
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource4, GPIO_AF_2); |
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource6, GPIO_AF_2); |
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource7, GPIO_AF_2); |
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource8, GPIO_AF_2); |
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource9, GPIO_AF_2); |
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#endif |
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} |