From a0b857db92b5cb54542fea05e0a8a57818eb893f Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Fri, 22 Jan 2021 05:57:05 +0100 Subject: [PATCH 01/19] refactor: Simplify layouts by preprocessing configuration --- Common.inc | 35 ++++++++ Makefile | 2 +- targets/A.inc | 206 ++++++++------------------------------------ targets/B.inc | 204 ++++++++----------------------------------- targets/Base.inc | 200 +++++++++++++++++++++++++++++++++++++++++++ targets/C.inc | 214 ++++++++++++--------------------------------- targets/D.inc | 206 ++++++++------------------------------------ targets/E.inc | 206 +++++++------------------------------------- targets/F.inc | 204 ++++++++----------------------------------- targets/G.inc | 204 ++++++++----------------------------------- targets/H.inc | 205 ++++++++------------------------------------ targets/I.inc | 196 ++++++++++-------------------------------- targets/J.inc | 196 ++++++++++-------------------------------- targets/K.inc | 205 ++++++++------------------------------------ targets/L.inc | 196 ++++++++++-------------------------------- targets/M.inc | 205 ++++++++------------------------------------ targets/N.inc | 204 ++++++++----------------------------------- targets/O.inc | 203 +++++++------------------------------------ targets/P.inc | 205 ++++++++------------------------------------ targets/Q.inc | 212 +++++++++++---------------------------------- targets/R.inc | 204 ++++++++----------------------------------- targets/S.inc | 203 +++++++------------------------------------ targets/T.inc | 204 ++++++++----------------------------------- targets/U.inc | 205 ++++++++------------------------------------ targets/V.inc | 219 ++++++++++++----------------------------------- targets/W.inc | 32 +------ 26 files changed, 1070 insertions(+), 3705 deletions(-) create mode 100644 targets/Base.inc diff --git a/Common.inc b/Common.inc index 8e21f5d..efcc56e 100644 --- a/Common.inc +++ b/Common.inc @@ -89,6 +89,13 @@ ELSEIF ESCNO == W_ $include (targets/W.inc) ; Select pinout W ENDIF +SIGNATURE_001 EQU 0E8h ; Device signature +IF MCU_48MHZ == 0 +SIGNATURE_002 EQU 0B1h +ELSE +SIGNATURE_002 EQU 0B2h +ENDIF + ;**** **** **** **** **** ; Constant definitions ;**** **** **** **** **** @@ -225,3 +232,31 @@ Set_MCU_Clk_48MHz MACRO setb Flag_Clock_At_48MHz ENDM + +Initialize_Adc MACRO + mov REF0CN, #0Ch ;; Set vdd (3.3V) as reference. Enable temp sensor and bias +IF MCU_48MHZ == 0 + mov ADC0CF, #59h ;; ADC clock 2MHz, PGA gain 1 +ELSE + mov ADC0CF, #0B9h ;; ADC clock 2MHz, PGA gain 1 +ENDIF + mov ADC0MX, #10h ;; Select temp sensor input + mov ADC0CN0, #80h ;; ADC enabled + mov ADC0CN1, #01h ;; Common mode buffer enabled +ENDM + +Start_Adc MACRO + mov ADC0CN0, #90h ;; ADC start +ENDM + +Read_Adc_Result MACRO + mov Temp1, ADC0L + mov Temp2, ADC0H +ENDM + +Stop_Adc MACRO +ENDM +Set_RPM_Out MACRO +ENDM +Clear_RPM_Out MACRO +ENDM diff --git a/Makefile b/Makefile index 25aad9e..2335923 100644 --- a/Makefile +++ b/Makefile @@ -38,7 +38,7 @@ LX51_FLAGS = # Source files ASM_SRC = Bluejay.asm -ASM_INC = $(LAYOUTS:%=targets/%.inc) Common.inc BLHeliBootLoad.inc Silabs/SI_EFM8BB1_Defs.inc Silabs/SI_EFM8BB2_Defs.inc +ASM_INC = $(LAYOUTS:%=targets/%.inc) targets/Base.inc Common.inc BLHeliBootLoad.inc Silabs/SI_EFM8BB1_Defs.inc Silabs/SI_EFM8BB2_Defs.inc # Check that wine/simplicity studio is available EXECUTABLES = $(WINE_BIN) $(AX51_BIN) $(LX51_BIN) $(OX51_BIN) diff --git a/targets/A.inc b/targets/A.inc index 07f512b..f490cb7 100644 --- a/targets/A.inc +++ b/targets/A.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* ; PORT 0 definitions * @@ -63,8 +50,16 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO - mov PCA0POL, #02h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -98,135 +93,34 @@ BpwmFET EQU 2 ;o AcomFET EQU 1 ;o ApwmFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL + + + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #3Eh -ELSE - mov P1SKIP, #3Ch -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #3Bh -ELSE - mov P1SKIP, #33h -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #2Fh -ELSE - mov P1SKIP, #0Fh -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #3Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #10h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #20h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #30h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -240,38 +134,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/B.inc b/targets/B.inc index c56445c..7fd20b3 100644 --- a/targets/B.inc +++ b/targets/B.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* @@ -64,11 +51,19 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO IF FETON_DELAY == 0 mov PCA0POL, #00h ; Pwm noninverted ELSE - mov PCA0POL, #01h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDIF ENDM @@ -103,135 +98,32 @@ BcomFET EQU 2 ;o CpwmFET EQU 1 ;o CcomFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #1Fh -ELSE - mov P1SKIP, #0Fh -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #37h -ELSE - mov P1SKIP, #33h -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #3Dh -ELSE - mov P1SKIP, #3Ch -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #3Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #10h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #20h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #30h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -245,38 +137,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/Base.inc b/targets/Base.inc new file mode 100644 index 0000000..fc7987d --- /dev/null +++ b/targets/Base.inc @@ -0,0 +1,200 @@ + + + +;**** **** **** **** **** +; Bootloader definitions +;**** **** **** **** **** +RTX_PORT EQU P0 ; Receive/Transmit port +RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL +RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL +RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP +RTX_PIN EQU Rcp_In ; RTX pin + + + + +IF PWM_ACTIVE_HIGH == 1 ; fet active high +pON LIT 'setb' +pOFF LIT 'clr' +ELSE ; fet active low +pON LIT 'clr' +pOFF LIT 'setb' +ENDIF + +IF COMPWM_ACTIVE_HIGH == 1 ; comfet active high +cON LIT 'setb' +cOFF LIT 'clr' +ELSE ; comfet active low +cON LIT 'clr' +cOFF LIT 'setb' +ENDIF + + +IF COMP_PORT == 0 +CMP_CN0 EQU CMP0CN0 +CMP_MD EQU CMP0MD +CMP_MX EQU CMP0MX +ELSE +CMP_CN0 EQU CMP1CN0 +CMP_MD EQU CMP1MD +CMP_MX EQU CMP1MX +ENDIF + +Initialize_Xbar MACRO + mov XBR2, #40h ;; Xbar enabled + mov XBR1, #02h ;; CEX0 and CEX1 routed to pins +IF ESCNO = E_ + All_pwmFETs_off ; For unlocking of HIP2103/4 driver circuits + call wait100ms + AcomFET_on + BcomFET_on + CcomFET_on + call wait1ms + All_comFETs_off +ENDIF +ENDM + +Initialize_Comparator MACRO + mov CMP_CN0, #80h ;; Comparator enabled, no hysteresis + mov CMP_MD, #00h ;; Comparator response time 100ns +ENDM + + +Read_Comp_Out MACRO + mov A, CMP_CN0 ;; Read comparator output +IF ESCNO == O_ + cpl A +ENDIF +ENDM + +; Set comparator multiplexer to phase A +Set_Comp_Phase_A MACRO + mov CMP_MX, #((Mux_A SHL 4) + Comp_Com) +ENDM + +; Set comparator multiplexer to phase B +Set_Comp_Phase_B MACRO + mov CMP_MX, #((Mux_B SHL 4) + Comp_Com) +ENDM + +; Set comparator multiplexer to phase C +Set_Comp_Phase_C MACRO + mov CMP_MX, #((Mux_C SHL 4) + Comp_Com) +ENDM + + + + +ApwmFET_on MACRO + pON P_ApwmFET +IF FETON_DELAY == 0 + cON P_AcomFET +ENDIF +ENDM +ApwmFET_off MACRO +IF FETON_DELAY != 0 + pOFF P_ApwmFET +ELSE + cOFF P_AcomFET +ENDIF +ENDM +BpwmFET_on MACRO + pON P_BpwmFET +IF FETON_DELAY == 0 + cON P_BcomFET +ENDIF +ENDM +BpwmFET_off MACRO +IF FETON_DELAY != 0 + pOFF P_BpwmFET +ELSE + cOFF P_BcomFET +ENDIF +ENDM +CpwmFET_on MACRO + pON P_CpwmFET +IF FETON_DELAY == 0 + cON P_CcomFET +ENDIF +ENDM +CpwmFET_off MACRO +IF FETON_DELAY != 0 + pOFF P_CpwmFET +ELSE + cOFF P_CcomFET +ENDIF +ENDM +All_pwmFETs_Off MACRO + ApwmFET_off + BpwmFET_off + CpwmFET_off +ENDM + +AcomFET_on MACRO +IF FETON_DELAY == 0 + pOFF P_ApwmFET +ENDIF + cON P_AcomFET +ENDM +AcomFET_off MACRO + cOFF P_AcomFET +ENDM +BcomFET_on MACRO +IF FETON_DELAY == 0 + pOFF P_BpwmFET +ENDIF + cON P_BcomFET +ENDM +BcomFET_off MACRO + cOFF P_BcomFET +ENDM +CcomFET_on MACRO +IF FETON_DELAY == 0 + pOFF P_CpwmFET +ENDIF + cON P_CcomFET +ENDM +CcomFET_off MACRO + cOFF P_CcomFET +ENDM +All_comFETs_Off MACRO + AcomFET_off + BcomFET_off + CcomFET_off +ENDM + + +IF ALL_FETS_ON_PORT1 == 1 + +Set_Pwm_A MACRO +IF FETON_DELAY == 0 + cON P_AcomFET + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL ApwmFET))) +ELSE + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL ApwmFET) + (1 SHL AcomFET)))) +ENDIF +ENDM + +Set_Pwm_B MACRO +IF FETON_DELAY == 0 + cON P_BcomFET + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BpwmFET))) +ELSE + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL BpwmFET) + (1 SHL BcomFET)))) +ENDIF +ENDM + +Set_Pwm_C MACRO +IF FETON_DELAY == 0 + cON P_CcomFET + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) +ELSE + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL CpwmFET) + (1 SHL CcomFET)))) +ENDIF +ENDM + +Set_Pwms_Off MACRO + mov P1SKIP, #P1_SKIP_ALL +ENDM + +ENDIF diff --git a/targets/C.inc b/targets/C.inc index c182ded..e6b7148 100644 --- a/targets/C.inc +++ b/targets/C.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 0 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* ; PORT 0 definitions * @@ -58,13 +45,23 @@ Comp_Com EQU 2 ;i ; EQU 1 ;i Rcp_In EQU 0 ;i +P0_SKIP_ALL EQU 0FFh + P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) P0_INIT EQU NOT((1 SHL ApwmFET)+(1 SHL AcomFET)) P0_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL AcomFET) -P0_SKIP EQU 0FFh +P0_SKIP EQU P0_SKIP_ALL + +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 Set_Pwm_Polarity MACRO - mov PCA0POL, #02h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -98,142 +95,65 @@ CpwmFET EQU 2 ;o BcomFET EQU 1 ;o BpwmFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P0.ApwmFET +P_AcomFET EQU P0.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 0 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 0Fh +P1_SKIP EQU P1_SKIP_ALL -ApwmFET_on MACRO - setb P0.ApwmFET -IF FETON_DELAY == 0 - setb P0.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P0.ApwmFET -ELSE - clr P0.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P0.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P0.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P0.ApwmFET -ENDIF - setb P0.AcomFET -ENDM -AcomFET_off MACRO - clr P0.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P0.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM Set_Pwm_A MACRO IF FETON_DELAY == 0 - setb P0.AcomFET - mov P0SKIP, #0BFh - mov P1SKIP, #0Fh + cON P_AcomFET + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL ApwmFET))) + mov P1SKIP, #P1_SKIP_ALL ELSE - mov P0SKIP, #03Fh - mov P1SKIP, #0Fh + mov P0SKIP, #(P0_SKIP_ALL AND (NOT ((1 SHL ApwmFET)+(1 SHL AcomFET)))) + mov P1SKIP, #P1_SKIP_ALL ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 - setb P1.BcomFET - mov P0SKIP, #0FFh - mov P1SKIP, #0Eh + cON P_BcomFET + mov P0SKIP, #P0_SKIP_ALL + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BpwmFET))) ELSE - mov P0SKIP, #0FFh - mov P1SKIP, #0Ch + mov P0SKIP, #P0_SKIP_ALL + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL BpwmFET)+(1 SHL BcomFET)))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 - setb P1.CcomFET - mov P0SKIP, #0FFh - mov P1SKIP, #0Bh + cON P_CcomFET + mov P0SKIP, #P0_SKIP_ALL + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) ELSE - mov P0SKIP, #0FFh - mov P1SKIP, #03h + mov P0SKIP, #P0_SKIP_ALL + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL CpwmFET)+(1 SHL CcomFET)))) ENDIF ENDM Set_Pwms_Off MACRO - mov P0SKIP, #0FFh - mov P1SKIP, #0Fh + mov P0SKIP, #P0_SKIP_ALL + mov P1SKIP, #P1_SKIP_ALL ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #32h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #42h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #52h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM + ;********************* @@ -247,38 +167,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/D.inc b/targets/D.inc index fcb7c9e..55ef443 100644 --- a/targets/D.inc +++ b/targets/D.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* ; PORT 0 definitions * @@ -63,8 +50,16 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 0 + Set_Pwm_Polarity MACRO - mov PCA0POL, #00h ; Damping noninverted, pwm noninverted + ;mov PCA0POL, #00h ; Damping noninverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -98,135 +93,32 @@ BpwmFET EQU 2 ;o AcomFET EQU 1 ;o ApwmFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU (1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_INIT EQU (1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - clr P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - setb P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - clr P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - setb P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - clr P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - setb P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - setb P1.AcomFET - setb P1.BcomFET - setb P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - clr P1.AcomFET -ENDM -AcomFET_off MACRO - setb P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - clr P1.BcomFET -ENDM -BcomFET_off MACRO - setb P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - clr P1.CcomFET -ENDM -CcomFET_off MACRO - setb P1.CcomFET -ENDM -All_comFETs_Off MACRO - setb P1.AcomFET - setb P1.BcomFET - setb P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - clr P1.AcomFET - mov P1SKIP, #3Eh -ELSE - mov P1SKIP, #3Ch -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - clr P1.BcomFET - mov P1SKIP, #3Bh -ELSE - mov P1SKIP, #33h -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - clr P1.CcomFET - mov P1SKIP, #2Fh -ELSE - mov P1SKIP, #0Fh -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #3Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #23h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #03h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #13h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -240,38 +132,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/E.inc b/targets/E.inc index 5d2e78d..10010a8 100644 --- a/targets/E.inc +++ b/targets/E.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + ;********************* ; PORT 0 definitions * @@ -63,8 +50,16 @@ P0_INIT EQU NOT((1 SHL LED_0)+(1 SHL LED_1)) P0_PUSHPULL EQU (1 SHL LED_0)+(1 SHL LED_1) P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO - mov PCA0POL, #02h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -98,135 +93,32 @@ BpwmFET EQU 2 ;o AcomFET EQU 1 ;o ApwmFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)+(1 SHL LED_2)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET)+(1 SHL LED_2) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET)+(1 SHL LED_2) -P1_SKIP EQU 7Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #7Eh -ELSE - mov P1SKIP, #7Ch -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #7Bh -ELSE - mov P1SKIP, #73h -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #6Fh -ELSE - mov P1SKIP, #4Fh -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #7Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #10h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #20h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #30h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -240,45 +132,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins - All_pwmFETs_off ; For unlocking of HIP2103/4 driver circuits - call wait100ms - AcomFET_on - BcomFET_on - CcomFET_on - call wait1ms - All_comFETs_off -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + Set_LED_0 MACRO setb P0.LED_0 ENDM diff --git a/targets/F.inc b/targets/F.inc index b1f3180..06e62ec 100644 --- a/targets/F.inc +++ b/targets/F.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* ; PORT 0 definitions * @@ -63,8 +50,16 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO - mov PCA0POL, #02h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -98,135 +93,32 @@ BpwmFET EQU 2 ;o AcomFET EQU 1 ;o ApwmFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #3Eh -ELSE - mov P1SKIP, #3Ch -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #3Bh -ELSE - mov P1SKIP, #33h -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #2Fh -ELSE - mov P1SKIP, #0Fh -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #3Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #30h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #20h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #10h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -240,38 +132,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/G.inc b/targets/G.inc index 2f0c435..a9a7b0a 100644 --- a/targets/G.inc +++ b/targets/G.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* ; PORT 0 definitions * @@ -63,8 +50,16 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO - mov PCA0POL, #02h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -98,135 +93,32 @@ BpwmFET EQU 2 ;o AcomFET EQU 1 ;o ApwmFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #3Eh -ELSE - mov P1SKIP, #3Ch -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #3Bh -ELSE - mov P1SKIP, #33h -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #2Fh -ELSE - mov P1SKIP, #0Fh -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #3Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #23h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #03h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #13h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -240,38 +132,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/H.inc b/targets/H.inc index 3dd73f9..ff6f968 100644 --- a/targets/H.inc +++ b/targets/H.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 7 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* @@ -64,11 +51,19 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO IF FETON_DELAY == 0 mov PCA0POL, #00h ; Pwm noninverted ELSE - mov PCA0POL, #01h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDIF ENDM @@ -103,135 +98,33 @@ AcomFET EQU 2 ;o BcomFET EQU 1 ;o CcomFET EQU 0 ;o +; todo hack +P1_SKIP_ALL EQU ((1 SHL 3)+(1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 7Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #3Fh -ELSE - mov P1SKIP, #3Bh -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #5Fh -ELSE - mov P1SKIP, #5Dh -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #6Fh -ELSE - mov P1SKIP, #6Eh -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #7Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #31h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #21h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #01h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -245,38 +138,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/I.inc b/targets/I.inc index 846fa3b..33f8183 100644 --- a/targets/I.inc +++ b/targets/I.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* ; PORT 0 definitions * @@ -63,8 +50,16 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO - mov PCA0POL, #02h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -97,135 +92,58 @@ ApwmFET EQU 2 ;o BpwmFET EQU 1 ;o CpwmFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 0 ; yes if fixing discrepancy + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM Set_Pwm_A MACRO IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #3Bh + cON P_AcomFET + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL ApwmFET))) ELSE - mov P1SKIP, #1Bh + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL ApwmFET)+(1 SHL AcomFET)))) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #3Dh + cON P_BcomFET + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BpwmFET))) ELSE - mov P1SKIP, #2Dh + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL BpwmFET)+(1 SHL BcomFET)))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #3Eh + cON P_CcomFET + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) ELSE - mov P1SKIP, #36h + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL CpwmFET)+(1 SHL CcomFET)))) ENDIF ENDM Set_Pwms_Off MACRO - mov P1SKIP, #7Fh + mov P1SKIP, #(P1_SKIP_ALL+(1 SHL 6)) ; hack: extra skip? ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #10h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #20h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #30h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM + ;********************* @@ -239,38 +157,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/J.inc b/targets/J.inc index bee43d5..5a5ec11 100644 --- a/targets/J.inc +++ b/targets/J.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 4 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* ; PORT 0 definitions * @@ -63,8 +50,16 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU (1 SHL LED_0)+(1 SHL LED_1)+(1 SHL LED_2) P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO - mov PCA0POL, #02h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -97,135 +92,58 @@ CpwmFET EQU 2 ;o BpwmFET EQU 1 ;o ApwmFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 0 ; yes if fixing discrepancy + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM Set_Pwm_A MACRO IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #3Eh + cON P_AcomFET + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL ApwmFET))) ELSE - mov P1SKIP, #36h + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL ApwmFET)+(1 SHL AcomFET)))) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #3Dh + cON P_BcomFET + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BpwmFET))) ELSE - mov P1SKIP, #2Dh + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL BpwmFET)+(1 SHL BcomFET)))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #3Bh + cON P_CcomFET + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) ELSE - mov P1SKIP, #1Bh + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL CpwmFET)+(1 SHL CcomFET)))) ENDIF ENDM Set_Pwms_Off MACRO - mov P1SKIP, #7Fh + mov P1SKIP, #(P1_SKIP_ALL+(1 SHL 6)) ; hack: extra skip? ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #03h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #23h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #13h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM + ;********************* @@ -239,38 +157,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO clr P0.LED_0 ENDM diff --git a/targets/K.inc b/targets/K.inc index d5dd1ac..25d96cf 100644 --- a/targets/K.inc +++ b/targets/K.inc @@ -30,21 +30,7 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 0 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + ;********************* @@ -64,8 +50,16 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 0 + Set_Pwm_Polarity MACRO - mov PCA0POL, #00h ; Damping noninverted, pwm noninverted + ;mov PCA0POL, #00h ; Damping noninverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -99,135 +93,32 @@ CcomFET EQU 2 ;o BcomFET EQU 1 ;o AcomFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU (1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_INIT EQU (1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - clr P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - setb P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - clr P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - setb P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - clr P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - setb P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - setb P1.AcomFET - setb P1.BcomFET - setb P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - clr P1.AcomFET -ENDM -AcomFET_off MACRO - setb P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - clr P1.BcomFET -ENDM -BcomFET_off MACRO - setb P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - clr P1.CcomFET -ENDM -CcomFET_off MACRO - setb P1.CcomFET -ENDM -All_comFETs_Off MACRO - setb P1.AcomFET - setb P1.BcomFET - setb P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - clr P1.AcomFET - mov P1SKIP, #1Fh -ELSE - mov P1SKIP, #1Eh -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - clr P1.BcomFET - mov P1SKIP, #2Fh -ELSE - mov P1SKIP, #2Dh -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - clr P1.CcomFET - mov P1SKIP, #37h -ELSE - mov P1SKIP, #33h -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #3Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #12h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #32h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #52h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -241,38 +132,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/L.inc b/targets/L.inc index 94432bb..a02384f 100644 --- a/targets/L.inc +++ b/targets/L.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* ; PORT 0 definitions * @@ -63,8 +50,16 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO - mov PCA0POL, #02h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -97,135 +92,58 @@ ApwmFET EQU 2 ;o BpwmFET EQU 1 ;o CpwmFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 0 ; yes if fixing discrepancy + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM Set_Pwm_A MACRO IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #3Bh + cON P_AcomFET + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL ApwmFET))) ELSE - mov P1SKIP, #1Bh + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL ApwmFET)+(1 SHL AcomFET)))) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #3Dh + cON P_BcomFET + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BpwmFET))) ELSE - mov P1SKIP, #2Dh + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL BpwmFET)+(1 SHL BcomFET)))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #3Eh + cON P_CcomFET + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) ELSE - mov P1SKIP, #36h + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL CpwmFET)+(1 SHL CcomFET)))) ENDIF ENDM Set_Pwms_Off MACRO - mov P1SKIP, #7Fh + mov P1SKIP, #(P1_SKIP_ALL+(1 SHL 6)) ; hack: extra skip? ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #23h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #13h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #03h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM + ;********************* @@ -239,38 +157,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/M.inc b/targets/M.inc index a012602..f60cd9f 100644 --- a/targets/M.inc +++ b/targets/M.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 3 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* @@ -64,8 +51,16 @@ P0_INIT EQU NOT(1 SHL LED_0) P0_PUSHPULL EQU (1 SHL LED_0) P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO - mov PCA0POL, #02h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -100,135 +95,33 @@ BpwmFET EQU 2 ;o ApwmFET EQU 1 ;o ; EQU 0 ;o +; hack: skip index 0 +P1_SKIP_ALL EQU (1+(1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 7Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #7Dh -ELSE - mov P1SKIP, #6Dh -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #7Bh -ELSE - mov P1SKIP, #5Bh -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #77h -ELSE - mov P1SKIP, #37h -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #7Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #75h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #45h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #65h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -242,38 +135,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO setb P0.LED_0 ENDM diff --git a/targets/N.inc b/targets/N.inc index 6c80255..5fd3290 100644 --- a/targets/N.inc +++ b/targets/N.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* @@ -64,11 +51,19 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO IF FETON_DELAY == 0 mov PCA0POL, #00h ; Pwm noninverted ELSE - mov PCA0POL, #01h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDIF ENDM @@ -103,135 +98,32 @@ BcomFET EQU 2 ;o ApwmFET EQU 1 ;o AcomFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #3Dh -ELSE - mov P1SKIP, #3Ch -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #37h -ELSE - mov P1SKIP, #33h -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #1Fh -ELSE - mov P1SKIP, #0Fh -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #3Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #10h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #20h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #30h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -245,38 +137,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/O.inc b/targets/O.inc index e29a78a..f1ae620 100644 --- a/targets/O.inc +++ b/targets/O.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* ; PORT 0 definitions * @@ -63,8 +50,16 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 0 + Set_Pwm_Polarity MACRO - mov PCA0POL, #00h ; Damping noninverted, pwm noninverted +; mov PCA0POL, #00h ; Damping noninverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -98,136 +93,30 @@ BpwmFET EQU 2 ;o AcomFET EQU 1 ;o ApwmFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU (1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - clr P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - setb P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - clr P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - setb P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - clr P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - setb P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - setb P1.AcomFET - setb P1.BcomFET - setb P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - clr P1.AcomFET -ENDM -AcomFET_off MACRO - setb P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - clr P1.BcomFET -ENDM -BcomFET_off MACRO - setb P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - clr P1.CcomFET -ENDM -CcomFET_off MACRO - setb P1.CcomFET -ENDM -All_comFETs_Off MACRO - setb P1.AcomFET - setb P1.BcomFET - setb P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - clr P1.AcomFET - mov P1SKIP, #3Eh -ELSE - mov P1SKIP, #3Ch -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - clr P1.BcomFET - mov P1SKIP, #3Bh -ELSE - mov P1SKIP, #33h -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - clr P1.CcomFET - mov P1SKIP, #2Fh -ELSE - mov P1SKIP, #0Fh -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #3Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #23h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #03h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #13h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output - cpl A -ENDM ;********************* @@ -241,38 +130,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/P.inc b/targets/P.inc index 6502e19..fdd2776 100644 --- a/targets/P.inc +++ b/targets/P.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* @@ -64,8 +51,16 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO - mov PCA0POL, #02h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -100,135 +95,33 @@ BpwmFET EQU 2 ;o ApwmFET EQU 1 ;o ; EQU 0 ;o +; hack: skip index 0 +P1_SKIP_ALL EQU (1+(1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 7Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #7Dh -ELSE - mov P1SKIP, #6Dh -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #7Bh -ELSE - mov P1SKIP, #5Bh -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #77h -ELSE - mov P1SKIP, #37h -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #7Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #43h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #23h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #13h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -242,38 +135,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/Q.inc b/targets/Q.inc index 5340f5c..89bd2af 100644 --- a/targets/Q.inc +++ b/targets/Q.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 1 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* ; PORT 0 definitions * @@ -58,13 +45,23 @@ LED_0 EQU 3 ;i Rcp_In EQU 1 ;i ; EQU 0 ;i +P0_SKIP_ALL EQU 0FFh + P0_DIGITAL EQU 0FFh P0_INIT EQU (1 SHL Rcp_In) P0_PUSHPULL EQU (1 SHL LED_0)+(1 SHL LED_1)+(1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET) -P0_SKIP EQU 0FFh +P0_SKIP EQU P0_SKIP_ALL + +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 Set_Pwm_Polarity MACRO - mov PCA0POL, #02h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -98,142 +95,64 @@ CcomFET EQU 2 ;o BcomFET EQU 1 ;o AcomFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P0.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P0.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P0.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 1 + +ALL_FETS_ON_PORT1 EQU 0 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 07h +P1_SKIP EQU P1_SKIP_ALL -ApwmFET_on MACRO - setb P0.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P0.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P0.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P0.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P0.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P0.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P0.ApwmFET - clr P0.BpwmFET - clr P0.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P0.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P0.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P0.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM Set_Pwm_A MACRO IF FETON_DELAY == 0 - setb P1.AcomFET - mov P0SKIP, #0DFh - mov P1SKIP, #07h + cON P_AcomFET + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL ApwmFET))) + mov P1SKIP, #P1_SKIP_ALL ELSE - mov P0SKIP, #0DFh - mov P1SKIP, #06h + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL ApwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL AcomFET))) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 - setb P1.BcomFET - mov P0SKIP, #0BFh - mov P1SKIP, #07h + cON P_BcomFET + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL BpwmFET))) + mov P1SKIP, #P1_SKIP_ALL ELSE - mov P0SKIP, #0BFh - mov P1SKIP, #05h + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL BpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BcomFET))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 - setb P1.CcomFET - mov P0SKIP, #07Fh - mov P1SKIP, #07h + cON P_CcomFET + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL CpwmFET))) + mov P1SKIP, #P1_SKIP_ALL ELSE - mov P0SKIP, #07Fh - mov P1SKIP, #03h + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL CpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CcomFET))) ENDIF ENDM Set_Pwms_Off MACRO - mov P0SKIP, #0FFh - mov P1SKIP, #07h + mov P0SKIP, #P0_SKIP_ALL + mov P1SKIP, #P1_SKIP_ALL ENDM -Set_Comp_Phase_A MACRO - mov CMP1MX, #63h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP1MX, #53h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP1MX, #43h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP1CN0 ; Read comparator output -ENDM ;********************* @@ -247,38 +166,9 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP1CN0, #80h ; Comparator enabled, no hysteresis - mov CMP1MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + Set_LED_0 MACRO setb P0.LED_0 ENDM diff --git a/targets/R.inc b/targets/R.inc index 7efd605..e01d009 100644 --- a/targets/R.inc +++ b/targets/R.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* ; PORT 0 definitions * @@ -63,8 +50,16 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO - mov PCA0POL, #02h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -97,135 +92,32 @@ ApwmFET EQU 2 ;o BpwmFET EQU 1 ;o CpwmFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #3Bh -ELSE - mov P1SKIP, #1Bh -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #3Dh -ELSE - mov P1SKIP, #2Dh -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #3Eh -ELSE - mov P1SKIP, #36h -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #3Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #10h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #20h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #30h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -239,38 +131,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/S.inc b/targets/S.inc index 9b2f514..7a7951f 100644 --- a/targets/S.inc +++ b/targets/S.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* ; PORT 0 definitions * @@ -63,11 +50,18 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO IF FETON_DELAY == 0 mov PCA0POL, #00h ; Pwm noninverted ELSE - mov PCA0POL, #01h ; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDIF ENDM @@ -102,135 +96,32 @@ BcomFET EQU 2 ;o ApwmFET EQU 1 ;o AcomFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU (0 SHL AcomFET)+(0 SHL BcomFET)+(0 SHL CcomFET) P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #3Dh -ELSE - mov P1SKIP, #3Ch -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #37h -ELSE - mov P1SKIP, #33h -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #1Fh -ELSE - mov P1SKIP, #0Fh -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #3Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #23h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #03h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #13h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -244,38 +135,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/T.inc b/targets/T.inc index 617a58e..0a2df01 100644 --- a/targets/T.inc +++ b/targets/T.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 7 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* @@ -64,11 +51,19 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO IF FETON_DELAY == 0 mov PCA0POL, #00h ; Pwm noninverted ELSE - mov PCA0POL, #01h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDIF ENDM @@ -103,135 +98,32 @@ AcomFET EQU 2 ;o BcomFET EQU 1 ;o CcomFET EQU 0 ;o +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 3Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #37h -ELSE - mov P1SKIP, #33h -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #2Fh -ELSE - mov P1SKIP, #2Dh -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #1Fh -ELSE - mov P1SKIP, #1Eh -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #3Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #52h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #32h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #12h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -245,38 +137,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/U.inc b/targets/U.inc index b86f96a..9dd304f 100644 --- a/targets/U.inc +++ b/targets/U.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 3 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* @@ -64,8 +51,16 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU (1 SHL LED_0)+(1 SHL LED_1)+(1 SHL LED_2) P0_SKIP EQU 0FFh +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 + Set_Pwm_Polarity MACRO - mov PCA0POL, #02h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDM IF FETON_DELAY == 0 @@ -100,135 +95,33 @@ BpwmFET EQU 2 ;o ApwmFET EQU 1 ;o ; EQU 0 ;o +; hack: skip index 0 +P1_SKIP_ALL EQU (1+(1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_SKIP EQU 7Fh +P1_SKIP EQU P1_SKIP_ALL + + -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P1.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P1.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P1.CcomFET -ENDM -CcomFET_off MACRO - clr P1.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P1.CcomFET -ENDM -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - setb P1.AcomFET - mov P1SKIP, #7Dh -ELSE - mov P1SKIP, #6Dh -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - setb P1.BcomFET - mov P1SKIP, #7Bh -ELSE - mov P1SKIP, #5Bh -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - setb P1.CcomFET - mov P1SKIP, #77h -ELSE - mov P1SKIP, #37h -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #7Fh -ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #75h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #45h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #65h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM ;********************* @@ -242,38 +135,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO clr P0.LED_0 ENDM diff --git a/targets/V.inc b/targets/V.inc index 54ddf71..de01139 100644 --- a/targets/V.inc +++ b/targets/V.inc @@ -30,21 +30,8 @@ TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 5 ; RTX pin - -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF + + ;********************* ; PORT 0 definitions * @@ -58,16 +45,26 @@ Comp_Com EQU 2 ;i Mux_B EQU 1 ;i Mux_A EQU 0 ;i +P0_SKIP_ALL EQU 0FFh + P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) P0_INIT EQU NOT(1 SHL CcomFET) P0_PUSHPULL EQU (1 SHL CcomFET) -P0_SKIP EQU 0FFh +P0_SKIP EQU P0_SKIP_ALL + +PWM_ACTIVE_HIGH EQU 1 +COMPWM_ACTIVE_HIGH EQU 1 Set_Pwm_Polarity MACRO IF FETON_DELAY == 0 mov PCA0POL, #00h ; Pwm noninverted ELSE - mov PCA0POL, #01h ; Damping inverted, pwm noninverted +; Damping inverted, pwm noninverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF ENDIF ENDM @@ -102,142 +99,66 @@ BpwmFET EQU 4 ;o BcomFET EQU 1 ;o CpwmFET EQU 0 ;o +; todo: hack +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET) + (1 SHL 2) + (1 SHL 3)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P0.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 0 + +$include (Base.inc) + P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET) -P1_SKIP EQU 7Fh +P1_SKIP EQU P1_SKIP_ALL -ApwmFET_on MACRO - setb P1.ApwmFET -IF FETON_DELAY == 0 - setb P1.AcomFET -ENDIF -ENDM -ApwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET -ELSE - clr P1.AcomFET -ENDIF -ENDM -BpwmFET_on MACRO - setb P1.BpwmFET -IF FETON_DELAY == 0 - setb P1.BcomFET -ENDIF -ENDM -BpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.BpwmFET -ELSE - clr P1.BcomFET -ENDIF -ENDM -CpwmFET_on MACRO - setb P1.CpwmFET -IF FETON_DELAY == 0 - setb P0.CcomFET -ENDIF -ENDM -CpwmFET_off MACRO -IF FETON_DELAY != 0 - clr P1.CpwmFET -ELSE - clr P0.CcomFET -ENDIF -ENDM -All_pwmFETs_Off MACRO -IF FETON_DELAY != 0 - clr P1.ApwmFET - clr P1.BpwmFET - clr P1.CpwmFET -ELSE - clr P1.AcomFET - clr P1.BcomFET - clr P0.CcomFET -ENDIF -ENDM -AcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.ApwmFET -ENDIF - setb P1.AcomFET -ENDM -AcomFET_off MACRO - clr P1.AcomFET -ENDM -BcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.BpwmFET -ENDIF - setb P1.BcomFET -ENDM -BcomFET_off MACRO - clr P1.BcomFET -ENDM -CcomFET_on MACRO -IF FETON_DELAY == 0 - clr P1.CpwmFET -ENDIF - setb P0.CcomFET -ENDM -CcomFET_off MACRO - clr P0.CcomFET -ENDM -All_comFETs_Off MACRO - clr P1.AcomFET - clr P1.BcomFET - clr P0.CcomFET -ENDM Set_Pwm_A MACRO IF FETON_DELAY == 0 - setb P1.AcomFET - mov P0SKIP, #0FFh - mov P1SKIP, #3Fh + cON P_AcomFET + mov P0SKIP, #P0_SKIP_ALL + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL ApwmFET))) ELSE - mov P0SKIP, #0FFh - mov P1SKIP, #1Fh + mov P0SKIP, #P0_SKIP_ALL + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL ApwmFET)+(1 SHL AcomFET)))) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 - setb P1.BcomFET - mov P0SKIP, #0FFh - mov P1SKIP, #6Fh + cON P_BcomFET + mov P0SKIP, #P0_SKIP_ALL + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BpwmFET))) ELSE - mov P0SKIP, #0FFh - mov P1SKIP, #6Dh -endif + mov P0SKIP, #P0_SKIP_ALL + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL BpwmFET)+(1 SHL BcomFET)))) +ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 - setb P0.CcomFET - mov P0SKIP, #0FFh - mov P1SKIP, #7Fh + cON P_CcomFET + mov P0SKIP, #P0_SKIP_ALL + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) ELSE - mov P0SKIP, #7Fh - mov P1SKIP, #7Eh -endif + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL CcomFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) +ENDIF ENDM Set_Pwms_Off MACRO - mov P0SKIP, #0FFh - mov P1SKIP, #7Fh + mov P0SKIP, #P0_SKIP_ALL + mov P1SKIP, #P1_SKIP_ALL ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #02h ; Set comparator multiplexer to phase A -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #12h ; Set comparator multiplexer to phase B -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #32h ; Set comparator multiplexer to phase C -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM + ;********************* @@ -251,38 +172,10 @@ P2_PUSHPULL EQU (1 SHL DebugPin) ;********************** ; MCU specific macros * ;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + + + + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO diff --git a/targets/W.inc b/targets/W.inc index ba44f98..ce89f4e 100644 --- a/targets/W.inc +++ b/targets/W.inc @@ -39,13 +39,6 @@ RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP RTX_PIN EQU 7 ; RTX pin -SIGNATURE_001 EQU 0E8h ; Device signature -IF MCU_48MHZ == 0 -SIGNATURE_002 EQU 0B1h -ELSE -SIGNATURE_002 EQU 0B2h -ENDIF - ;********************* ; PORT 0 definitions * @@ -213,30 +206,7 @@ Initialize_Comparator MACRO mov CMP0CN0, #80h ; Comparator enabled, no hysteresis mov CMP0MD, #00h ; Comparator response time 100ns ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ; Select temp sensor input - mov ADC0CN0, #80h ; ADC enabled - mov ADC0CN1, #01h ; Common mode buffer enabled -ENDM -Start_Adc MACRO - mov ADC0CN0, #90h ; ADC start -ENDM -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM -Stop_Adc MACRO -ENDM -Set_RPM_Out MACRO -ENDM -Clear_RPM_Out MACRO -ENDM + Set_LED_0 MACRO ENDM Clear_LED_0 MACRO From 55eda69689249ce5e3946f223289618eca8d42f2 Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Mon, 25 Jan 2021 17:34:49 +0100 Subject: [PATCH 02/19] feat: Add Z layout --- Bluejay.asm | 3 + Common.inc | 6 ++ Makefile | 2 +- targets/Z.inc | 157 ++++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 167 insertions(+), 1 deletion(-) create mode 100644 targets/Z.inc diff --git a/Bluejay.asm b/Bluejay.asm index 5c3a362..4b148f4 100644 --- a/Bluejay.asm +++ b/Bluejay.asm @@ -84,6 +84,9 @@ T_ EQU 20 ; RC X MA X MB CC MC X X X Cp Bp Ap Ac Bc Cc U_ EQU 21 ; MA MC CC MB RC L0 L1 L2 X Cc Bc Ac Cp Bp Ap X Like M, but with 3 LEDs V_ EQU 22 ; Cc X RC X MC CC MB MA X Ap Ac Bp X X Bc Cp W_ EQU 23 ; RC MC MB X CC MA X X X Ap Bp Cp X X X X Tristate gate driver +X_ EQU 24 +Y_ EQU 25 +Z_ EQU 26 ; X X RC X CC MA MC MB X X Cp Cc Bp Bc Ap Ac ;**** **** **** **** **** ; Select the port mapping to use (or unselect all for use with external batch compile file) diff --git a/Common.inc b/Common.inc index efcc56e..78d14d3 100644 --- a/Common.inc +++ b/Common.inc @@ -87,6 +87,12 @@ ELSEIF ESCNO == V_ $include (targets/V.inc) ; Select pinout V ELSEIF ESCNO == W_ $include (targets/W.inc) ; Select pinout W +;ELSEIF ESCNO == X_ +;$include (targets/X.inc) ; Select pinout X +;ELSEIF ESCNO == Y_ +;$include (targets/Y.inc) ; Select pinout Y +ELSEIF ESCNO == Z_ +$include (targets/Z.inc) ; Select pinout Z ENDIF SIGNATURE_001 EQU 0E8h ; Device signature diff --git a/Makefile b/Makefile index 2335923..5361699 100644 --- a/Makefile +++ b/Makefile @@ -2,7 +2,7 @@ VERSION ?= v0.10 # Target parameters -LAYOUTS = A B C D E F G H I J K L M N O P Q R S T U V W +LAYOUTS = A B C D E F G H I J K L M N O P Q R S T U V W Z MCUS = H L DEADTIMES = 0 5 10 15 20 25 30 40 50 70 90 PWM_FREQS = 24 48 96 diff --git a/targets/Z.inc b/targets/Z.inc new file mode 100644 index 0000000..ca670c0 --- /dev/null +++ b/targets/Z.inc @@ -0,0 +1,157 @@ +;**** **** **** **** **** +; +; Bluejay digital ESC firmware for controlling brushless motors in multirotors +; +; Copyright 2020 Mathias Rasmussen +; Copyright 2011, 2012 Steffen Skaug +; +; This file is part of Bluejay. +; +; Bluejay is free software: you can redistribute it and/or modify +; it under the terms of the GNU General Public License as published by +; the Free Software Foundation, either version 3 of the License, or +; (at your option) any later version. +; +; Bluejay is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with Bluejay. If not, see . +; +;**** **** **** **** **** +; +; Hardware definition file "Z" +; X X RC X CC MA MC MB X X Cp Cc Bp Bc Ap Ac +; +;**** **** **** **** **** + +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC + + + + +;********************* +; PORT 0 definitions * +;********************* +; EQU 7 ;i +; EQU 6 ;i +Rcp_In EQU 5 ;i +; EQU 4 ;i +Comp_Com EQU 3 ;i +Mux_A EQU 2 ;i +Mux_C EQU 1 ;i +Mux_B EQU 0 ;i + +P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_INIT EQU 0FFh +P0_PUSHPULL EQU 0 +P0_SKIP EQU 0FFh + +PWM_ACTIVE_HIGH EQU 0 +COMPWM_ACTIVE_HIGH EQU 1 + +Set_Pwm_Polarity MACRO +IF FETON_DELAY == 0 + mov PCA0POL, #02h ; Pwm inverted +ELSE +; mov PCA0POL, #03h ; Damping inverted, pwm inverted +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF +ENDIF +ENDM + +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM1 + PCA0_POWER_L EQU PCA0CPL1 + PCA0_POWER_H EQU PCA0CPH1 + + PCA0_DAMP_MODULE EQU PCA0CPM0 + PCA0_DAMP_L EQU PCA0CPL0 + PCA0_DAMP_H EQU PCA0CPH0 +ENDIF + + +;********************* +; PORT 1 definitions * +;********************* +; EQU 7 ;i +; EQU 6 ;i +CpwmFET EQU 5 ;o +CcomFET EQU 4 ;o +BpwmFET EQU 3 ;o +BcomFET EQU 2 ;o +ApwmFET EQU 1 ;o +AcomFET EQU 0 ;o + +P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) + +P_ApwmFET EQU P1.ApwmFET +P_AcomFET EQU P1.AcomFET +P_BpwmFET EQU P1.BpwmFET +P_BcomFET EQU P1.BcomFET +P_CpwmFET EQU P1.CpwmFET +P_CcomFET EQU P1.CcomFET + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +ALL_FETS_ON_PORT1 EQU 1 + +$include (Base.inc) + +P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_INIT EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET) +P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_SKIP EQU P1_SKIP_ALL + + + + + + + + +;********************* +; PORT 2 definitions * +;********************* +DebugPin EQU 0 ;o + +P2_PUSHPULL EQU (1 SHL DebugPin) + + +;********************** +; MCU specific macros * +;********************** + + + +Set_LED_0 MACRO +ENDM +Clear_LED_0 MACRO +ENDM +Set_LED_1 MACRO +ENDM +Clear_LED_1 MACRO +ENDM +Set_LED_2 MACRO +ENDM +Clear_LED_2 MACRO +ENDM +Set_LED_3 MACRO +ENDM +Clear_LED_3 MACRO +ENDM From ebb11574c6c232655bdc56c9dbc65839866ac6b2 Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Tue, 26 Jan 2021 02:23:27 +0100 Subject: [PATCH 03/19] refactor: Rename and clean up layout pwm fets --- targets/A.inc | 46 +++++++++++++-------------- targets/B.inc | 46 +++++++++++++-------------- targets/Base.inc | 18 +++++------ targets/C.inc | 58 +++++++++++++++++----------------- targets/D.inc | 46 +++++++++++++-------------- targets/E.inc | 50 ++++++++++++++--------------- targets/F.inc | 48 ++++++++++++++-------------- targets/G.inc | 46 +++++++++++++-------------- targets/H.inc | 42 ++++++++++++------------- targets/I.inc | 60 +++++++++++++++++------------------ targets/J.inc | 62 ++++++++++++++++++------------------ targets/K.inc | 46 +++++++++++++-------------- targets/L.inc | 60 +++++++++++++++++------------------ targets/M.inc | 42 ++++++++++++------------- targets/N.inc | 46 +++++++++++++-------------- targets/O.inc | 46 +++++++++++++-------------- targets/P.inc | 42 ++++++++++++------------- targets/Q.inc | 60 +++++++++++++++++------------------ targets/R.inc | 46 +++++++++++++-------------- targets/S.inc | 46 +++++++++++++-------------- targets/T.inc | 46 +++++++++++++-------------- targets/U.inc | 44 +++++++++++++------------- targets/V.inc | 60 +++++++++++++++++------------------ targets/W.inc | 82 ++++++++++++++++++++++++------------------------ targets/Z.inc | 46 +++++++++++++-------------- 25 files changed, 617 insertions(+), 617 deletions(-) diff --git a/targets/A.inc b/targets/A.inc index f490cb7..a64e940 100644 --- a/targets/A.inc +++ b/targets/A.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -40,12 +40,12 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ; EQU 6 ;i Rcp_In EQU 5 ;i ; EQU 4 ;i -Mux_C EQU 3 ;i -Mux_B EQU 2 ;i -Mux_A EQU 1 ;i +C_Mux EQU 3 ;i +B_Mux EQU 2 ;i +A_Mux EQU 1 ;i Comp_Com EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -86,21 +86,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -CcomFET EQU 5 ;o -CpwmFET EQU 4 ;o -BcomFET EQU 3 ;o -BpwmFET EQU 2 ;o -AcomFET EQU 1 ;o -ApwmFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +C_com EQU 5 ;o +C_pwm EQU 4 ;o +B_com EQU 3 ;o +B_pwm EQU 2 ;o +A_com EQU 1 ;o +A_pwm EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -109,9 +109,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/B.inc b/targets/B.inc index 7fd20b3..19a2c07 100644 --- a/targets/B.inc +++ b/targets/B.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -41,12 +41,12 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ; EQU 6 ;i Rcp_In EQU 5 ;i ; EQU 4 ;i -Mux_C EQU 3 ;i -Mux_B EQU 2 ;i -Mux_A EQU 1 ;i +C_Mux EQU 3 ;i +B_Mux EQU 2 ;i +A_Mux EQU 1 ;i Comp_Com EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -91,21 +91,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -ApwmFET EQU 5 ;o -AcomFET EQU 4 ;o -BpwmFET EQU 3 ;o -BcomFET EQU 2 ;o -CpwmFET EQU 1 ;o -CcomFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +A_pwm EQU 5 ;o +A_com EQU 4 ;o +B_pwm EQU 3 ;o +B_com EQU 2 ;o +C_pwm EQU 1 ;o +C_com EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -114,9 +114,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/Base.inc b/targets/Base.inc index fc7987d..b561f22 100644 --- a/targets/Base.inc +++ b/targets/Base.inc @@ -69,17 +69,17 @@ ENDM ; Set comparator multiplexer to phase A Set_Comp_Phase_A MACRO - mov CMP_MX, #((Mux_A SHL 4) + Comp_Com) + mov CMP_MX, #((A_Mux SHL 4) + Comp_Com) ENDM ; Set comparator multiplexer to phase B Set_Comp_Phase_B MACRO - mov CMP_MX, #((Mux_B SHL 4) + Comp_Com) + mov CMP_MX, #((B_Mux SHL 4) + Comp_Com) ENDM ; Set comparator multiplexer to phase C Set_Comp_Phase_C MACRO - mov CMP_MX, #((Mux_C SHL 4) + Comp_Com) + mov CMP_MX, #((C_Mux SHL 4) + Comp_Com) ENDM @@ -169,27 +169,27 @@ IF ALL_FETS_ON_PORT1 == 1 Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL ApwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL A_pwm))) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL ApwmFET) + (1 SHL AcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL A_pwm) + (1 SHL A_com)))) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_pwm))) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL BpwmFET) + (1 SHL BcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL B_pwm) + (1 SHL B_com)))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL CpwmFET) + (1 SHL CcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL C_pwm) + (1 SHL C_com)))) ENDIF ENDM diff --git a/targets/C.inc b/targets/C.inc index e6b7148..233096e 100644 --- a/targets/C.inc +++ b/targets/C.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -36,20 +36,20 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ;********************* ; PORT 0 definitions * ;********************* -AcomFET EQU 7 ;o -ApwmFET EQU 6 ;o -Mux_C EQU 5 ;i -Mux_B EQU 4 ;i -Mux_A EQU 3 ;i +A_com EQU 7 ;o +A_pwm EQU 6 ;o +C_Mux EQU 5 ;i +B_Mux EQU 4 ;i +A_Mux EQU 3 ;i Comp_Com EQU 2 ;i ; EQU 1 ;i Rcp_In EQU 0 ;i P0_SKIP_ALL EQU 0FFh -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) -P0_INIT EQU NOT((1 SHL ApwmFET)+(1 SHL AcomFET)) -P0_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL AcomFET) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_INIT EQU NOT((1 SHL A_pwm) + (1 SHL A_com)) +P0_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL A_com) P0_SKIP EQU P0_SKIP_ALL PWM_ACTIVE_HIGH EQU 1 @@ -90,19 +90,19 @@ ENDIF ; EQU 6 ;i ; EQU 5 ;i ; EQU 4 ;i -CcomFET EQU 3 ;o -CpwmFET EQU 2 ;o -BcomFET EQU 1 ;o -BpwmFET EQU 0 ;o +C_com EQU 3 ;o +C_pwm EQU 2 ;o +B_com EQU 1 ;o +B_pwm EQU 0 ;o -P1_SKIP_ALL EQU ((1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) +P1_SKIP_ALL EQU (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) -P_ApwmFET EQU P0.ApwmFET -P_AcomFET EQU P0.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +P_ApwmFET EQU P0.A_pwm +P_AcomFET EQU P0.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -111,9 +111,9 @@ ALL_FETS_ON_PORT1 EQU 0 $include (Base.inc) -P1_DIGITAL EQU (1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL @@ -121,10 +121,10 @@ P1_SKIP EQU P1_SKIP_ALL Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL ApwmFET))) + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL A_pwm))) mov P1SKIP, #P1_SKIP_ALL ELSE - mov P0SKIP, #(P0_SKIP_ALL AND (NOT ((1 SHL ApwmFET)+(1 SHL AcomFET)))) + mov P0SKIP, #(P0_SKIP_ALL AND (NOT ((1 SHL A_pwm) + (1 SHL A_com)))) mov P1SKIP, #P1_SKIP_ALL ENDIF ENDM @@ -132,20 +132,20 @@ Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_pwm))) ELSE mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL BpwmFET)+(1 SHL BcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL B_pwm) + (1 SHL B_com)))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) ELSE mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL CpwmFET)+(1 SHL CcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL C_pwm) + (1 SHL C_com)))) ENDIF ENDM Set_Pwms_Off MACRO diff --git a/targets/D.inc b/targets/D.inc index 55ef443..c6a115b 100644 --- a/targets/D.inc +++ b/targets/D.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -41,11 +41,11 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another Rcp_In EQU 5 ;i ; EQU 4 ;i Comp_Com EQU 3 ;i -Mux_A EQU 2 ;i -Mux_C EQU 1 ;i -Mux_B EQU 0 ;i +A_Mux EQU 2 ;i +C_Mux EQU 1 ;i +B_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -86,21 +86,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -CcomFET EQU 5 ;o -CpwmFET EQU 4 ;o -BcomFET EQU 3 ;o -BpwmFET EQU 2 ;o -AcomFET EQU 1 ;o -ApwmFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +C_com EQU 5 ;o +C_pwm EQU 4 ;o +B_com EQU 3 ;o +B_pwm EQU 2 ;o +A_com EQU 1 ;o +A_pwm EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -109,9 +109,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU (1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/E.inc b/targets/E.inc index 10010a8..ffc1211 100644 --- a/targets/E.inc +++ b/targets/E.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -40,14 +40,14 @@ LED_1 EQU 7 ;o LED_0 EQU 6 ;o Rcp_In EQU 5 ;i ; EQU 4 ;i -Mux_C EQU 3 ;i -Mux_B EQU 2 ;i -Mux_A EQU 1 ;i +C_Mux EQU 3 ;i +B_Mux EQU 2 ;i +A_Mux EQU 1 ;i Comp_Com EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) -P0_INIT EQU NOT((1 SHL LED_0)+(1 SHL LED_1)) -P0_PUSHPULL EQU (1 SHL LED_0)+(1 SHL LED_1) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_INIT EQU NOT((1 SHL LED_0) + (1 SHL LED_1)) +P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 @@ -86,21 +86,21 @@ ENDIF ;********************* ; EQU 7 ;i LED_2 EQU 6 ;o -CcomFET EQU 5 ;o -CpwmFET EQU 4 ;o -BcomFET EQU 3 ;o -BpwmFET EQU 2 ;o -AcomFET EQU 1 ;o -ApwmFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)+(1 SHL LED_2)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +C_com EQU 5 ;o +C_pwm EQU 4 ;o +B_com EQU 3 ;o +B_pwm EQU 2 ;o +A_com EQU 1 ;o +A_pwm EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + (1 SHL LED_2) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -109,9 +109,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET)+(1 SHL LED_2) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET)+(1 SHL LED_2) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) + (1 SHL LED_2) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) + (1 SHL LED_2) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/F.inc b/targets/F.inc index 06e62ec..746eb77 100644 --- a/targets/F.inc +++ b/targets/F.inc @@ -22,12 +22,12 @@ ; ;**** **** **** **** **** ; -; Hardware definition file "F". Equals "A", but with Mux_A and Mux_C swapped +; Hardware definition file "F". Equals "A", but with A_Mux and C_Mux swapped ; X X RC X MA MB MC CC X X Cc Cp Bc Bp Ac Ap ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -40,12 +40,12 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ; EQU 6 ;i Rcp_In EQU 5 ;i ; EQU 4 ;i -Mux_A EQU 3 ;i -Mux_B EQU 2 ;i -Mux_C EQU 1 ;i +A_Mux EQU 3 ;i +B_Mux EQU 2 ;i +C_Mux EQU 1 ;i Comp_Com EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -86,21 +86,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -CcomFET EQU 5 ;o -CpwmFET EQU 4 ;o -BcomFET EQU 3 ;o -BpwmFET EQU 2 ;o -AcomFET EQU 1 ;o -ApwmFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +C_com EQU 5 ;o +C_pwm EQU 4 ;o +B_com EQU 3 ;o +B_pwm EQU 2 ;o +A_com EQU 1 ;o +A_pwm EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -109,9 +109,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/G.inc b/targets/G.inc index a9a7b0a..43ebc29 100644 --- a/targets/G.inc +++ b/targets/G.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -41,11 +41,11 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another Rcp_In EQU 5 ;i ; EQU 4 ;i Comp_Com EQU 3 ;i -Mux_A EQU 2 ;i -Mux_C EQU 1 ;i -Mux_B EQU 0 ;i +A_Mux EQU 2 ;i +C_Mux EQU 1 ;i +B_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -86,21 +86,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -CcomFET EQU 5 ;o -CpwmFET EQU 4 ;o -BcomFET EQU 3 ;o -BpwmFET EQU 2 ;o -AcomFET EQU 1 ;o -ApwmFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +C_com EQU 5 ;o +C_pwm EQU 4 ;o +B_com EQU 3 ;o +B_pwm EQU 2 ;o +A_com EQU 1 ;o +A_pwm EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -109,9 +109,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/H.inc b/targets/H.inc index ff6f968..e0bf5a4 100644 --- a/targets/H.inc +++ b/targets/H.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -41,12 +41,12 @@ Rcp_In EQU 7 ;i ; EQU 6 ;i ; EQU 5 ;i ; EQU 4 ;i -Mux_A EQU 3 ;i -Mux_B EQU 2 ;i +A_Mux EQU 3 ;i +B_Mux EQU 2 ;i Comp_Com EQU 1 ;i -Mux_C EQU 0 ;i +C_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -90,23 +90,23 @@ ENDIF ; PORT 1 definitions * ;********************* ; EQU 7 ;i -ApwmFET EQU 6 ;o -BpwmFET EQU 5 ;o -CpwmFET EQU 4 ;o +A_pwm EQU 6 ;o +B_pwm EQU 5 ;o +C_pwm EQU 4 ;o ; EQU 3 ;i -AcomFET EQU 2 ;o -BcomFET EQU 1 ;o -CcomFET EQU 0 ;o +A_com EQU 2 ;o +B_com EQU 1 ;o +C_com EQU 0 ;o ; todo hack -P1_SKIP_ALL EQU ((1 SHL 3)+(1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) +P1_SKIP_ALL EQU (1 SHL 3) + (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -115,9 +115,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/I.inc b/targets/I.inc index 33f8183..abb88da 100644 --- a/targets/I.inc +++ b/targets/I.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -40,12 +40,12 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ; EQU 6 ;i Rcp_In EQU 5 ;i ; EQU 4 ;i -Mux_C EQU 3 ;i -Mux_B EQU 2 ;i -Mux_A EQU 1 ;i +C_Mux EQU 3 ;i +B_Mux EQU 2 ;i +A_Mux EQU 1 ;i Comp_Com EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -85,21 +85,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -AcomFET EQU 5 ;o -BcomFET EQU 4 ;o -CcomFET EQU 3 ;o -ApwmFET EQU 2 ;o -BpwmFET EQU 1 ;o -CpwmFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +A_com EQU 5 ;o +B_com EQU 4 ;o +C_com EQU 3 ;o +A_pwm EQU 2 ;o +B_pwm EQU 1 ;o +C_pwm EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -108,9 +108,9 @@ ALL_FETS_ON_PORT1 EQU 0 ; yes if fixing discrepancy $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL @@ -118,29 +118,29 @@ P1_SKIP EQU P1_SKIP_ALL Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL ApwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL A_pwm))) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL ApwmFET)+(1 SHL AcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL A_pwm) + (1 SHL A_com)))) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_pwm))) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL BpwmFET)+(1 SHL BcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL B_pwm) + (1 SHL B_com)))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL CpwmFET)+(1 SHL CcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL C_pwm) + (1 SHL C_com)))) ENDIF ENDM Set_Pwms_Off MACRO - mov P1SKIP, #(P1_SKIP_ALL+(1 SHL 6)) ; hack: extra skip? + mov P1SKIP, #(P1_SKIP_ALL + (1 SHL 6)) ; hack: extra skip? ENDM diff --git a/targets/J.inc b/targets/J.inc index 5a5ec11..b584444 100644 --- a/targets/J.inc +++ b/targets/J.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -41,13 +41,13 @@ LED_1 EQU 6 ;o LED_0 EQU 5 ;o Rcp_In EQU 4 ;i Comp_Com EQU 3 ;i -Mux_B EQU 2 ;i -Mux_C EQU 1 ;i -Mux_A EQU 0 ;i +B_Mux EQU 2 ;i +C_Mux EQU 1 ;i +A_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh -P0_PUSHPULL EQU (1 SHL LED_0)+(1 SHL LED_1)+(1 SHL LED_2) +P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2) P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 @@ -85,21 +85,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -CcomFET EQU 5 ;o -BcomFET EQU 4 ;o -AcomFET EQU 3 ;o -CpwmFET EQU 2 ;o -BpwmFET EQU 1 ;o -ApwmFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +C_com EQU 5 ;o +B_com EQU 4 ;o +A_com EQU 3 ;o +C_pwm EQU 2 ;o +B_pwm EQU 1 ;o +A_pwm EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -108,9 +108,9 @@ ALL_FETS_ON_PORT1 EQU 0 ; yes if fixing discrepancy $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL @@ -118,29 +118,29 @@ P1_SKIP EQU P1_SKIP_ALL Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL ApwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL A_pwm))) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL ApwmFET)+(1 SHL AcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL A_pwm) + (1 SHL A_com)))) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_pwm))) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL BpwmFET)+(1 SHL BcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL B_pwm) + (1 SHL B_com)))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL CpwmFET)+(1 SHL CcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL C_pwm) + (1 SHL C_com)))) ENDIF ENDM Set_Pwms_Off MACRO - mov P1SKIP, #(P1_SKIP_ALL+(1 SHL 6)) ; hack: extra skip? + mov P1SKIP, #(P1_SKIP_ALL + (1 SHL 6)) ; hack: extra skip? ENDM diff --git a/targets/K.inc b/targets/K.inc index 25d96cf..d5ba1fd 100644 --- a/targets/K.inc +++ b/targets/K.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -38,14 +38,14 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ;********************* ; EQU 7 ;i ; EQU 6 ;i -Mux_C EQU 5 ;i +C_Mux EQU 5 ;i ; EQU 4 ;i -Mux_B EQU 3 ;i +B_Mux EQU 3 ;i Comp_Com EQU 2 ;i -Mux_A EQU 1 ;i +A_Mux EQU 1 ;i Rcp_In EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -86,21 +86,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -ApwmFET EQU 5 ;o -BpwmFET EQU 4 ;o -CpwmFET EQU 3 ;o -CcomFET EQU 2 ;o -BcomFET EQU 1 ;o -AcomFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +A_pwm EQU 5 ;o +B_pwm EQU 4 ;o +C_pwm EQU 3 ;o +C_com EQU 2 ;o +B_com EQU 1 ;o +A_com EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -109,9 +109,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU (1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/L.inc b/targets/L.inc index a02384f..e8cc4a8 100644 --- a/targets/L.inc +++ b/targets/L.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -41,11 +41,11 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another Rcp_In EQU 5 ;i ; EQU 4 ;i Comp_Com EQU 3 ;i -Mux_A EQU 2 ;i -Mux_B EQU 1 ;i -Mux_C EQU 0 ;i +A_Mux EQU 2 ;i +B_Mux EQU 1 ;i +C_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -85,21 +85,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -AcomFET EQU 5 ;o -BcomFET EQU 4 ;o -CcomFET EQU 3 ;o -ApwmFET EQU 2 ;o -BpwmFET EQU 1 ;o -CpwmFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +A_com EQU 5 ;o +B_com EQU 4 ;o +C_com EQU 3 ;o +A_pwm EQU 2 ;o +B_pwm EQU 1 ;o +C_pwm EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -108,9 +108,9 @@ ALL_FETS_ON_PORT1 EQU 0 ; yes if fixing discrepancy $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL @@ -118,29 +118,29 @@ P1_SKIP EQU P1_SKIP_ALL Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL ApwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL A_pwm))) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL ApwmFET)+(1 SHL AcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL A_pwm) + (1 SHL A_com)))) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_pwm))) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL BpwmFET)+(1 SHL BcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL B_pwm) + (1 SHL B_com)))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL CpwmFET)+(1 SHL CcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL C_pwm) + (1 SHL C_com)))) ENDIF ENDM Set_Pwms_Off MACRO - mov P1SKIP, #(P1_SKIP_ALL+(1 SHL 6)) ; hack: extra skip? + mov P1SKIP, #(P1_SKIP_ALL + (1 SHL 6)) ; hack: extra skip? ENDM diff --git a/targets/M.inc b/targets/M.inc index f60cd9f..683baeb 100644 --- a/targets/M.inc +++ b/targets/M.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -37,16 +37,16 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ;********************* ; PORT 0 definitions * ;********************* -Mux_A EQU 7 ;i -Mux_C EQU 6 ;i +A_Mux EQU 7 ;i +C_Mux EQU 6 ;i Comp_Com EQU 5 ;i -Mux_B EQU 4 ;i +B_Mux EQU 4 ;i Rcp_In EQU 3 ;i LED_0 EQU 2 ;i ; EQU 1 ;i ; EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU NOT(1 SHL LED_0) P0_PUSHPULL EQU (1 SHL LED_0) P0_SKIP EQU 0FFh @@ -87,23 +87,23 @@ ENDIF ; PORT 1 definitions * ;********************* ; EQU 7 ;i -CcomFET EQU 6 ;o -BcomFET EQU 5 ;o -AcomFET EQU 4 ;o -CpwmFET EQU 3 ;i -BpwmFET EQU 2 ;o -ApwmFET EQU 1 ;o +C_com EQU 6 ;o +B_com EQU 5 ;o +A_com EQU 4 ;o +C_pwm EQU 3 ;i +B_pwm EQU 2 ;o +A_pwm EQU 1 ;o ; EQU 0 ;o ; hack: skip index 0 -P1_SKIP_ALL EQU (1+(1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) +P1_SKIP_ALL EQU 1 + (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -112,9 +112,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/N.inc b/targets/N.inc index 5fd3290..0099965 100644 --- a/targets/N.inc +++ b/targets/N.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -41,12 +41,12 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ; EQU 6 ;i Rcp_In EQU 5 ;i ; EQU 4 ;i -Mux_C EQU 3 ;i -Mux_B EQU 2 ;i -Mux_A EQU 1 ;i +C_Mux EQU 3 ;i +B_Mux EQU 2 ;i +A_Mux EQU 1 ;i Comp_Com EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -91,21 +91,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -CpwmFET EQU 5 ;o -CcomFET EQU 4 ;o -BpwmFET EQU 3 ;o -BcomFET EQU 2 ;o -ApwmFET EQU 1 ;o -AcomFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +C_pwm EQU 5 ;o +C_com EQU 4 ;o +B_pwm EQU 3 ;o +B_com EQU 2 ;o +A_pwm EQU 1 ;o +A_com EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -114,9 +114,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/O.inc b/targets/O.inc index f1ae620..c99603f 100644 --- a/targets/O.inc +++ b/targets/O.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -41,11 +41,11 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another Rcp_In EQU 5 ;i ; EQU 4 ;i Comp_Com EQU 3 ;i -Mux_A EQU 2 ;i -Mux_C EQU 1 ;i -Mux_B EQU 0 ;i +A_Mux EQU 2 ;i +C_Mux EQU 1 ;i +B_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -86,21 +86,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -CcomFET EQU 5 ;o -CpwmFET EQU 4 ;o -BcomFET EQU 3 ;o -BpwmFET EQU 2 ;o -AcomFET EQU 1 ;o -ApwmFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +C_com EQU 5 ;o +C_pwm EQU 4 ;o +B_com EQU 3 ;o +B_pwm EQU 2 ;o +A_com EQU 1 ;o +A_pwm EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -109,9 +109,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU (1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/P.inc b/targets/P.inc index fdd2776..aabb380 100644 --- a/targets/P.inc +++ b/targets/P.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -40,13 +40,13 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ; EQU 7 ;i ; EQU 6 ;i Rcp_In EQU 5 ;i -Mux_A EQU 4 ;i +A_Mux EQU 4 ;i Comp_Com EQU 3 ;i -Mux_B EQU 2 ;i -Mux_C EQU 1 ;i +B_Mux EQU 2 ;i +C_Mux EQU 1 ;i ; EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -87,23 +87,23 @@ ENDIF ; PORT 1 definitions * ;********************* ; EQU 7 ;i -CcomFET EQU 6 ;o -BcomFET EQU 5 ;o -AcomFET EQU 4 ;o -CpwmFET EQU 3 ;i -BpwmFET EQU 2 ;o -ApwmFET EQU 1 ;o +C_com EQU 6 ;o +B_com EQU 5 ;o +A_com EQU 4 ;o +C_pwm EQU 3 ;i +B_pwm EQU 2 ;o +A_pwm EQU 1 ;o ; EQU 0 ;o ; hack: skip index 0 -P1_SKIP_ALL EQU (1+(1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) +P1_SKIP_ALL EQU 1 + (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -112,9 +112,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/Q.inc b/targets/Q.inc index 89bd2af..ca2c43f 100644 --- a/targets/Q.inc +++ b/targets/Q.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -36,9 +36,9 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ;********************* ; PORT 0 definitions * ;********************* -CpwmFET EQU 7 ;o -BpwmFET EQU 6 ;o -ApwmFET EQU 5 ;o +C_pwm EQU 7 ;o +B_pwm EQU 6 ;o +A_pwm EQU 5 ;o LED_1 EQU 4 ;i LED_0 EQU 3 ;i ; EQU 2 ;i @@ -49,7 +49,7 @@ P0_SKIP_ALL EQU 0FFh P0_DIGITAL EQU 0FFh P0_INIT EQU (1 SHL Rcp_In) -P0_PUSHPULL EQU (1 SHL LED_0)+(1 SHL LED_1)+(1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET) +P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) P0_SKIP EQU P0_SKIP_ALL PWM_ACTIVE_HIGH EQU 1 @@ -87,22 +87,22 @@ ENDIF ; PORT 1 definitions * ;********************* ; EQU 7 ;i -Mux_A EQU 6 ;i -Mux_B EQU 5 ;i -Mux_C EQU 4 ;i +A_Mux EQU 6 ;i +B_Mux EQU 5 ;i +C_Mux EQU 4 ;i Comp_Com EQU 3 ;o -CcomFET EQU 2 ;o -BcomFET EQU 1 ;o -AcomFET EQU 0 ;o +C_com EQU 2 ;o +B_com EQU 1 ;o +A_com EQU 0 ;o -P1_SKIP_ALL EQU ((1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET)) +P1_SKIP_ALL EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P_ApwmFET EQU P0.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P0.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P0.CpwmFET -P_CcomFET EQU P1.CcomFET +P_ApwmFET EQU P0.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P0.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P0.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 1 @@ -111,9 +111,9 @@ ALL_FETS_ON_PORT1 EQU 0 $include (Base.inc) -P1_DIGITAL EQU (1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL @@ -121,31 +121,31 @@ P1_SKIP EQU P1_SKIP_ALL Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL ApwmFET))) + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL A_pwm))) mov P1SKIP, #P1_SKIP_ALL ELSE - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL ApwmFET))) - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL AcomFET))) + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL A_pwm))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL A_com))) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL BpwmFET))) + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL B_pwm))) mov P1SKIP, #P1_SKIP_ALL ELSE - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL BpwmFET))) - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BcomFET))) + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL B_pwm))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_com))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL CpwmFET))) + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL C_pwm))) mov P1SKIP, #P1_SKIP_ALL ELSE - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL CpwmFET))) - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CcomFET))) + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL C_pwm))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_com))) ENDIF ENDM Set_Pwms_Off MACRO diff --git a/targets/R.inc b/targets/R.inc index e01d009..d4f845b 100644 --- a/targets/R.inc +++ b/targets/R.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -40,12 +40,12 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ; EQU 6 ;i Rcp_In EQU 5 ;i ; EQU 4 ;i -Mux_C EQU 3 ;i -Mux_B EQU 2 ;i -Mux_A EQU 1 ;i +C_Mux EQU 3 ;i +B_Mux EQU 2 ;i +A_Mux EQU 1 ;i Comp_Com EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -85,21 +85,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -AcomFET EQU 5 ;o -BcomFET EQU 4 ;o -CcomFET EQU 3 ;o -ApwmFET EQU 2 ;o -BpwmFET EQU 1 ;o -CpwmFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +A_com EQU 5 ;o +B_com EQU 4 ;o +C_com EQU 3 ;o +A_pwm EQU 2 ;o +B_pwm EQU 1 ;o +C_pwm EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -108,9 +108,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/S.inc b/targets/S.inc index 7a7951f..9e40fb8 100644 --- a/targets/S.inc +++ b/targets/S.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -41,11 +41,11 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another Rcp_In EQU 5 ;i ; EQU 4 ;i Comp_Com EQU 3 ;i -Mux_A EQU 2 ;i -Mux_C EQU 1 ;i -Mux_B EQU 0 ;i +A_Mux EQU 2 ;i +C_Mux EQU 1 ;i +B_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -89,21 +89,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -CpwmFET EQU 5 ;o -CcomFET EQU 4 ;o -BpwmFET EQU 3 ;o -BcomFET EQU 2 ;o -ApwmFET EQU 1 ;o -AcomFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +C_pwm EQU 5 ;o +C_com EQU 4 ;o +B_pwm EQU 3 ;o +B_com EQU 2 ;o +A_pwm EQU 1 ;o +A_com EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -112,9 +112,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU (0 SHL AcomFET)+(0 SHL BcomFET)+(0 SHL CcomFET) -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/T.inc b/targets/T.inc index 0a2df01..2a8e1af 100644 --- a/targets/T.inc +++ b/targets/T.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -39,14 +39,14 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ;********************* Rcp_In EQU 7 ;i ; EQU 6 ;i -Mux_A EQU 5 ;i +A_Mux EQU 5 ;i ; EQU 4 ;i -Mux_B EQU 3 ;i +B_Mux EQU 3 ;i Comp_Com EQU 2 ;i -Mux_C EQU 1 ;i +C_Mux EQU 1 ;i ; EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -91,21 +91,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -CpwmFET EQU 5 ;o -BpwmFET EQU 4 ;o -ApwmFET EQU 3 ;o -AcomFET EQU 2 ;o -BcomFET EQU 1 ;o -CcomFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +C_pwm EQU 5 ;o +B_pwm EQU 4 ;o +A_pwm EQU 3 ;o +A_com EQU 2 ;o +B_com EQU 1 ;o +C_com EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -114,9 +114,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/U.inc b/targets/U.inc index 9dd304f..b28f44a 100644 --- a/targets/U.inc +++ b/targets/U.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -37,18 +37,18 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ;********************* ; PORT 0 definitions * ;********************* -Mux_A EQU 7 ;i -Mux_C EQU 6 ;i +A_Mux EQU 7 ;i +C_Mux EQU 6 ;i Comp_Com EQU 5 ;i -Mux_B EQU 4 ;i +B_Mux EQU 4 ;i Rcp_In EQU 3 ;i LED_0 EQU 2 ;i LED_1 EQU 1 ;i LED_2 EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh -P0_PUSHPULL EQU (1 SHL LED_0)+(1 SHL LED_1)+(1 SHL LED_2) +P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2) P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 @@ -87,23 +87,23 @@ ENDIF ; PORT 1 definitions * ;********************* ; EQU 7 ;i -CcomFET EQU 6 ;o -BcomFET EQU 5 ;o -AcomFET EQU 4 ;o -CpwmFET EQU 3 ;i -BpwmFET EQU 2 ;o -ApwmFET EQU 1 ;o +C_com EQU 6 ;o +B_com EQU 5 ;o +A_com EQU 4 ;o +C_pwm EQU 3 ;i +B_pwm EQU 2 ;o +A_pwm EQU 1 ;o ; EQU 0 ;o ; hack: skip index 0 -P1_SKIP_ALL EQU (1+(1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) +P1_SKIP_ALL EQU 1 + (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -112,9 +112,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL diff --git a/targets/V.inc b/targets/V.inc index de01139..3bd2872 100644 --- a/targets/V.inc +++ b/targets/V.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -36,20 +36,20 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another ;********************* ; PORT 0 definitions * ;********************* -CcomFET EQU 7 ;o +C_com EQU 7 ;o ; EQU 6 ;i Rcp_In EQU 5 ;i ; EQU 4 ;i -Mux_C EQU 3 ;i +C_Mux EQU 3 ;i Comp_Com EQU 2 ;i -Mux_B EQU 1 ;i -Mux_A EQU 0 ;i +B_Mux EQU 1 ;i +A_Mux EQU 0 ;i P0_SKIP_ALL EQU 0FFh -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) -P0_INIT EQU NOT(1 SHL CcomFET) -P0_PUSHPULL EQU (1 SHL CcomFET) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_INIT EQU NOT(1 SHL C_com) +P0_PUSHPULL EQU (1 SHL C_com) P0_SKIP EQU P0_SKIP_ALL PWM_ACTIVE_HIGH EQU 1 @@ -91,23 +91,23 @@ ENDIF ; PORT 1 definitions * ;********************* ; EQU 7 ;i -ApwmFET EQU 6 ;i -AcomFET EQU 5 ;i -BpwmFET EQU 4 ;o +A_pwm EQU 6 ;i +A_com EQU 5 ;i +B_pwm EQU 4 ;o ; EQU 3 ;o ; EQU 2 ;o -BcomFET EQU 1 ;o -CpwmFET EQU 0 ;o +B_com EQU 1 ;o +C_pwm EQU 0 ;o ; todo: hack -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET) + (1 SHL 2) + (1 SHL 3)) +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL 2) + (1 SHL 3) -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P0.CcomFET +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P0.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -116,9 +116,9 @@ ALL_FETS_ON_PORT1 EQU 0 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) P1_SKIP EQU P1_SKIP_ALL @@ -127,30 +127,30 @@ Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL ApwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL A_pwm))) ELSE mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL ApwmFET)+(1 SHL AcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL A_pwm) + (1 SHL A_com)))) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL BpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_pwm))) ELSE mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL BpwmFET)+(1 SHL BcomFET)))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL B_pwm) + (1 SHL B_com)))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) ELSE - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL CcomFET))) - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL CpwmFET))) + mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL C_com))) + mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) ENDIF ENDM Set_Pwms_Off MACRO diff --git a/targets/W.inc b/targets/W.inc index ce89f4e..e738f98 100644 --- a/targets/W.inc +++ b/targets/W.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC ;**** **** **** **** **** @@ -44,15 +44,15 @@ RTX_PIN EQU 7 ; RTX pin ; PORT 0 definitions * ;********************* Rcp_In EQU 7 ;i -Mux_C EQU 6 ;i -Mux_B EQU 5 ;i +C_Mux EQU 6 ;i +B_Mux EQU 5 ;i ; EQU 4 ;i Comp_Com EQU 3 ;i -Mux_A EQU 2 ;i +A_Mux EQU 2 ;i ; EQU 1 ;i ; EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -89,82 +89,82 @@ ENDIF ; PORT 1 definitions * ;********************* ; EQU 7 ;i -ApwmFET EQU 6 ;o -BpwmFET EQU 5 ;o -CpwmFET EQU 4 ;o +A_pwm EQU 6 ;o +B_pwm EQU 5 ;o +C_pwm EQU 4 ;o ; EQU 3 ;i ; EQU 2 ;i ; EQU 1 ;i ; EQU 0 ;i ; pwm outputs start as analog in -> floating ; this ensures all mosfet drivers start with floating outputs -P1_DIGITAL EQU NOT((1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)) -P1_INIT EQU 00h -P1_PUSHPULL EQU ((1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)) +P1_DIGITAL EQU NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm)) +P1_INIT EQU 00h +P1_PUSHPULL EQU ((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm)) ; -P1_SKIP EQU 0FFh +P1_SKIP EQU 0FFh ApwmFET_on MACRO - setb P1.ApwmFET ; set pin to high - orl P1MDIN, #(1 SHL ApwmFET) ; enable pin driver + setb P1.A_pwm ; set pin to high + orl P1MDIN, #(1 SHL A_pwm) ; enable pin driver ENDM ApwmFET_off MACRO - anl P1MDIN, #(NOT(1 SHL ApwmFET)) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT(1 SHL A_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM BpwmFET_on MACRO - setb P1.BpwmFET ; set pin to high - orl P1MDIN, #(1 SHL BpwmFET) ; enable pin driver + setb P1.B_pwm ; set pin to high + orl P1MDIN, #(1 SHL B_pwm) ; enable pin driver ENDM BpwmFET_off MACRO - anl P1MDIN, #(NOT(1 SHL BpwmFET)) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT(1 SHL B_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM CpwmFET_on MACRO - setb P1.CpwmFET ; set pin to high - orl P1MDIN, #(1 SHL CpwmFET) ; enable pin driver + setb P1.C_pwm ; set pin to high + orl P1MDIN, #(1 SHL C_pwm) ; enable pin driver ENDM CpwmFET_off MACRO - anl P1MDIN, #(NOT(1 SHL CpwmFET)) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT(1 SHL C_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM All_pwmFETs_Off MACRO - anl P1MDIN, #(NOT((1 SHL ApwmFET) + (1 SHL BpwmFET) + (1 SHL CpwmFET))) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm))) ; analog in -> pullup, driver and digital in is disable = floating ENDM AcomFET_on MACRO - clr P1.ApwmFET ; set pin to low - orl P1MDIN, #(1 SHL ApwmFET) ; enable pin driver + clr P1.A_pwm ; set pin to low + orl P1MDIN, #(1 SHL A_pwm) ; enable pin driver ENDM AcomFET_off MACRO - anl P1MDIN, #(NOT(1 SHL ApwmFET)) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT(1 SHL A_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM BcomFET_on MACRO - clr P1.BpwmFET ; set pin to low - orl P1MDIN, #(1 SHL BpwmFET) ; enable pin driver + clr P1.B_pwm ; set pin to low + orl P1MDIN, #(1 SHL B_pwm) ; enable pin driver ENDM BcomFET_off MACRO - anl P1MDIN, #(NOT(1 SHL BpwmFET)) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT(1 SHL B_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM CcomFET_on MACRO - clr P1.CpwmFET ; set pin to low - orl P1MDIN, #(1 SHL CpwmFET) ; enable pin driver + clr P1.C_pwm ; set pin to low + orl P1MDIN, #(1 SHL C_pwm) ; enable pin driver ENDM CcomFET_off MACRO - anl P1MDIN, #(NOT(1 SHL CpwmFET)) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT(1 SHL C_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM All_comFETs_Off MACRO - anl P1MDIN, #(NOT((1 SHL ApwmFET) + (1 SHL BpwmFET) + (1 SHL CpwmFET))) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm))) ; analog in -> pullup, driver and digital in is disable = floating ENDM Set_Pwm_A MACRO - mov P1SKIP, #(NOT(1 SHL ApwmFET)); - orl P1MDIN, #(1 SHL ApwmFET) ; enable pin driver + mov P1SKIP, #(NOT(1 SHL A_pwm)); + orl P1MDIN, #(1 SHL A_pwm) ; enable pin driver ENDM Set_Pwm_B MACRO - mov P1SKIP, #(NOT(1 SHL BpwmFET)); - orl P1MDIN, #(1 SHL BpwmFET) ; enable pin driver + mov P1SKIP, #(NOT(1 SHL B_pwm)); + orl P1MDIN, #(1 SHL B_pwm) ; enable pin driver ENDM Set_Pwm_C MACRO - mov P1SKIP, #(NOT(1 SHL CpwmFET)); - orl P1MDIN, #(1 SHL CpwmFET) ; enable pin driver + mov P1SKIP, #(NOT(1 SHL C_pwm)); + orl P1MDIN, #(1 SHL C_pwm) ; enable pin driver ENDM Set_Pwms_Off MACRO mov P1SKIP, #P1_SKIP; @@ -173,13 +173,13 @@ ENDM Set_Comp_Phase_A MACRO - mov CMP0MX, #((Mux_A) SHL 4)+((Comp_Com) SHL 0); + mov CMP0MX, #((A_Mux) SHL 4)+((Comp_Com) SHL 0); ENDM Set_Comp_Phase_B MACRO - mov CMP0MX, #((Mux_B) SHL 4)+((Comp_Com) SHL 0); + mov CMP0MX, #((B_Mux) SHL 4)+((Comp_Com) SHL 0); ENDM Set_Comp_Phase_C MACRO - mov CMP0MX, #((Mux_C) SHL 4)+((Comp_Com) SHL 0); + mov CMP0MX, #((C_Mux) SHL 4)+((Comp_Com) SHL 0); ENDM Read_Comp_Out MACRO mov A, CMP0CN0 ; Read comparator output diff --git a/targets/Z.inc b/targets/Z.inc index ca670c0..7a73c5f 100644 --- a/targets/Z.inc +++ b/targets/Z.inc @@ -27,7 +27,7 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -41,11 +41,11 @@ TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another Rcp_In EQU 5 ;i ; EQU 4 ;i Comp_Com EQU 3 ;i -Mux_A EQU 2 ;i -Mux_C EQU 1 ;i -Mux_B EQU 0 ;i +A_Mux EQU 2 ;i +C_Mux EQU 1 ;i +B_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh @@ -90,21 +90,21 @@ ENDIF ;********************* ; EQU 7 ;i ; EQU 6 ;i -CpwmFET EQU 5 ;o -CcomFET EQU 4 ;o -BpwmFET EQU 3 ;o -BcomFET EQU 2 ;o -ApwmFET EQU 1 ;o -AcomFET EQU 0 ;o - -P1_SKIP_ALL EQU ((1 SHL ApwmFET)+(1 SHL AcomFET)+(1 SHL BpwmFET)+(1 SHL BcomFET)+(1 SHL CpwmFET)+(1 SHL CcomFET)) - -P_ApwmFET EQU P1.ApwmFET -P_AcomFET EQU P1.AcomFET -P_BpwmFET EQU P1.BpwmFET -P_BcomFET EQU P1.BcomFET -P_CpwmFET EQU P1.CpwmFET -P_CcomFET EQU P1.CcomFET +C_pwm EQU 5 ;o +C_com EQU 4 ;o +B_pwm EQU 3 ;o +B_com EQU 2 ;o +A_pwm EQU 1 ;o +A_com EQU 0 ;o + +P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 @@ -113,9 +113,9 @@ ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) -P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) -P1_INIT EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET) -P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET) +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU P1_SKIP_ALL From e2a9c093bbd744d9bdc90e7ffe55fffc23955a98 Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Tue, 26 Jan 2021 22:45:38 +0100 Subject: [PATCH 04/19] refactor: Make crossbar skip all unused pins by default --- targets/A.inc | 4 ++-- targets/B.inc | 4 ++-- targets/Base.inc | 14 +++++++------- targets/C.inc | 36 ++++++++++++++++++------------------ targets/D.inc | 4 ++-- targets/E.inc | 4 ++-- targets/F.inc | 4 ++-- targets/G.inc | 4 ++-- targets/H.inc | 5 ++--- targets/I.inc | 34 +++------------------------------- targets/J.inc | 36 +++--------------------------------- targets/K.inc | 4 ++-- targets/L.inc | 36 +++--------------------------------- targets/M.inc | 5 ++--- targets/N.inc | 4 ++-- targets/O.inc | 4 ++-- targets/P.inc | 5 ++--- targets/Q.inc | 36 ++++++++++++++++++------------------ targets/R.inc | 4 ++-- targets/S.inc | 4 ++-- targets/T.inc | 4 ++-- targets/U.inc | 5 ++--- targets/V.inc | 37 ++++++++++++++++++------------------- targets/Z.inc | 4 ++-- 24 files changed, 104 insertions(+), 197 deletions(-) diff --git a/targets/A.inc b/targets/A.inc index a64e940..0017b4d 100644 --- a/targets/A.inc +++ b/targets/A.inc @@ -93,7 +93,7 @@ B_pwm EQU 2 ;o A_com EQU 1 ;o A_pwm EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -112,7 +112,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/B.inc b/targets/B.inc index 19a2c07..8a41594 100644 --- a/targets/B.inc +++ b/targets/B.inc @@ -98,7 +98,7 @@ B_com EQU 2 ;o C_pwm EQU 1 ;o C_com EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -117,7 +117,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/Base.inc b/targets/Base.inc index b561f22..5176dcf 100644 --- a/targets/Base.inc +++ b/targets/Base.inc @@ -169,32 +169,32 @@ IF ALL_FETS_ON_PORT1 == 1 Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL A_pwm))) + mov P1SKIP, #(NOT (1 SHL A_pwm)) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL A_pwm) + (1 SHL A_com)))) + mov P1SKIP, #(NOT ((1 SHL A_pwm) + (1 SHL A_com))) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_pwm))) + mov P1SKIP, #(NOT (1 SHL B_pwm)) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL B_pwm) + (1 SHL B_com)))) + mov P1SKIP, #(NOT ((1 SHL B_pwm) + (1 SHL B_com))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) + mov P1SKIP, #(NOT (1 SHL C_pwm)) ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL C_pwm) + (1 SHL C_com)))) + mov P1SKIP, #(NOT ((1 SHL C_pwm) + (1 SHL C_com))) ENDIF ENDM Set_Pwms_Off MACRO - mov P1SKIP, #P1_SKIP_ALL + mov P1SKIP, #0FFh ENDM ENDIF diff --git a/targets/C.inc b/targets/C.inc index 233096e..9b02b91 100644 --- a/targets/C.inc +++ b/targets/C.inc @@ -45,12 +45,12 @@ Comp_Com EQU 2 ;i ; EQU 1 ;i Rcp_In EQU 0 ;i -P0_SKIP_ALL EQU 0FFh + P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU NOT((1 SHL A_pwm) + (1 SHL A_com)) P0_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL A_com) -P0_SKIP EQU P0_SKIP_ALL +P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 @@ -95,7 +95,7 @@ C_pwm EQU 2 ;o B_com EQU 1 ;o B_pwm EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P0.A_pwm P_AcomFET EQU P0.A_com @@ -114,43 +114,43 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL A_pwm))) - mov P1SKIP, #P1_SKIP_ALL + mov P0SKIP, #(NOT (1 SHL A_pwm)) + mov P1SKIP, #0FFh ELSE - mov P0SKIP, #(P0_SKIP_ALL AND (NOT ((1 SHL A_pwm) + (1 SHL A_com)))) - mov P1SKIP, #P1_SKIP_ALL + mov P0SKIP, #(NOT ((1 SHL A_pwm) + (1 SHL A_com))) + mov P1SKIP, #0FFh ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET - mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_pwm))) + mov P0SKIP, #0FFh + mov P1SKIP, #(NOT (1 SHL B_pwm)) ELSE - mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL B_pwm) + (1 SHL B_com)))) + mov P0SKIP, #0FFh + mov P1SKIP, #(NOT ((1 SHL B_pwm) + (1 SHL B_com))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET - mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) + mov P0SKIP, #0FFh + mov P1SKIP, #(NOT (1 SHL C_pwm)) ELSE - mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL C_pwm) + (1 SHL C_com)))) + mov P0SKIP, #0FFh + mov P1SKIP, #(NOT ((1 SHL C_pwm) + (1 SHL C_com))) ENDIF ENDM Set_Pwms_Off MACRO - mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #P1_SKIP_ALL + mov P0SKIP, #0FFh + mov P1SKIP, #0FFh ENDM diff --git a/targets/D.inc b/targets/D.inc index c6a115b..2ac3d79 100644 --- a/targets/D.inc +++ b/targets/D.inc @@ -93,7 +93,7 @@ B_pwm EQU 2 ;o A_com EQU 1 ;o A_pwm EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -112,7 +112,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/E.inc b/targets/E.inc index ffc1211..0d4023c 100644 --- a/targets/E.inc +++ b/targets/E.inc @@ -93,7 +93,7 @@ B_pwm EQU 2 ;o A_com EQU 1 ;o A_pwm EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + (1 SHL LED_2) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -112,7 +112,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) + (1 SHL LED_2) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) + (1 SHL LED_2) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/F.inc b/targets/F.inc index 746eb77..9b7beb8 100644 --- a/targets/F.inc +++ b/targets/F.inc @@ -93,7 +93,7 @@ B_pwm EQU 2 ;o A_com EQU 1 ;o A_pwm EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -112,7 +112,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/G.inc b/targets/G.inc index 43ebc29..f02384a 100644 --- a/targets/G.inc +++ b/targets/G.inc @@ -93,7 +93,7 @@ B_pwm EQU 2 ;o A_com EQU 1 ;o A_pwm EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -112,7 +112,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/H.inc b/targets/H.inc index e0bf5a4..2d90764 100644 --- a/targets/H.inc +++ b/targets/H.inc @@ -98,8 +98,7 @@ A_com EQU 2 ;o B_com EQU 1 ;o C_com EQU 0 ;o -; todo hack -P1_SKIP_ALL EQU (1 SHL 3) + (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -118,7 +117,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/I.inc b/targets/I.inc index abb88da..618b843 100644 --- a/targets/I.inc +++ b/targets/I.inc @@ -92,7 +92,7 @@ A_pwm EQU 2 ;o B_pwm EQU 1 ;o C_pwm EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -104,44 +104,16 @@ P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 0 ; yes if fixing discrepancy +ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL - +P1_SKIP EQU 0FFh -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - cON P_AcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL A_pwm))) -ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL A_pwm) + (1 SHL A_com)))) -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - cON P_BcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_pwm))) -ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL B_pwm) + (1 SHL B_com)))) -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - cON P_CcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) -ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL C_pwm) + (1 SHL C_com)))) -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #(P1_SKIP_ALL + (1 SHL 6)) ; hack: extra skip? -ENDM diff --git a/targets/J.inc b/targets/J.inc index b584444..0a8c854 100644 --- a/targets/J.inc +++ b/targets/J.inc @@ -92,7 +92,7 @@ C_pwm EQU 2 ;o B_pwm EQU 1 ;o A_pwm EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -104,44 +104,14 @@ P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 0 ; yes if fixing discrepancy +ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL - - - -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - cON P_AcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL A_pwm))) -ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL A_pwm) + (1 SHL A_com)))) -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - cON P_BcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_pwm))) -ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL B_pwm) + (1 SHL B_com)))) -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - cON P_CcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) -ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL C_pwm) + (1 SHL C_com)))) -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #(P1_SKIP_ALL + (1 SHL 6)) ; hack: extra skip? -ENDM +P1_SKIP EQU 0FFh diff --git a/targets/K.inc b/targets/K.inc index d5ba1fd..544e578 100644 --- a/targets/K.inc +++ b/targets/K.inc @@ -93,7 +93,7 @@ C_com EQU 2 ;o B_com EQU 1 ;o A_com EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -112,7 +112,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/L.inc b/targets/L.inc index e8cc4a8..bdae5a6 100644 --- a/targets/L.inc +++ b/targets/L.inc @@ -92,7 +92,7 @@ A_pwm EQU 2 ;o B_pwm EQU 1 ;o C_pwm EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -104,44 +104,14 @@ P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 0 ; yes if fixing discrepancy +ALL_FETS_ON_PORT1 EQU 1 $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL - - - -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - cON P_AcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL A_pwm))) -ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL A_pwm) + (1 SHL A_com)))) -ENDIF -ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - cON P_BcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_pwm))) -ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL B_pwm) + (1 SHL B_com)))) -ENDIF -ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - cON P_CcomFET - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) -ELSE - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL C_pwm) + (1 SHL C_com)))) -ENDIF -ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #(P1_SKIP_ALL + (1 SHL 6)) ; hack: extra skip? -ENDM +P1_SKIP EQU 0FFh diff --git a/targets/M.inc b/targets/M.inc index 683baeb..9c99033 100644 --- a/targets/M.inc +++ b/targets/M.inc @@ -95,8 +95,7 @@ B_pwm EQU 2 ;o A_pwm EQU 1 ;o ; EQU 0 ;o -; hack: skip index 0 -P1_SKIP_ALL EQU 1 + (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -115,7 +114,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/N.inc b/targets/N.inc index 0099965..e193e20 100644 --- a/targets/N.inc +++ b/targets/N.inc @@ -98,7 +98,7 @@ B_com EQU 2 ;o A_pwm EQU 1 ;o A_com EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -117,7 +117,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/O.inc b/targets/O.inc index c99603f..03f672c 100644 --- a/targets/O.inc +++ b/targets/O.inc @@ -93,7 +93,7 @@ B_pwm EQU 2 ;o A_com EQU 1 ;o A_pwm EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -112,7 +112,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/P.inc b/targets/P.inc index aabb380..5406a70 100644 --- a/targets/P.inc +++ b/targets/P.inc @@ -95,8 +95,7 @@ B_pwm EQU 2 ;o A_pwm EQU 1 ;o ; EQU 0 ;o -; hack: skip index 0 -P1_SKIP_ALL EQU 1 + (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -115,7 +114,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/Q.inc b/targets/Q.inc index ca2c43f..5c772db 100644 --- a/targets/Q.inc +++ b/targets/Q.inc @@ -45,12 +45,12 @@ LED_0 EQU 3 ;i Rcp_In EQU 1 ;i ; EQU 0 ;i -P0_SKIP_ALL EQU 0FFh + P0_DIGITAL EQU 0FFh P0_INIT EQU (1 SHL Rcp_In) P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) -P0_SKIP EQU P0_SKIP_ALL +P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 @@ -95,7 +95,7 @@ C_com EQU 2 ;o B_com EQU 1 ;o A_com EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) + P_ApwmFET EQU P0.A_pwm P_AcomFET EQU P1.A_com @@ -114,43 +114,43 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL A_pwm))) - mov P1SKIP, #P1_SKIP_ALL + mov P0SKIP, #(NOT (1 SHL A_pwm)) + mov P1SKIP, #0FFh ELSE - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL A_pwm))) - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL A_com))) + mov P0SKIP, #(NOT (1 SHL A_pwm)) + mov P1SKIP, #(NOT (1 SHL A_com)) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL B_pwm))) - mov P1SKIP, #P1_SKIP_ALL + mov P0SKIP, #(NOT (1 SHL B_pwm)) + mov P1SKIP, #0FFh ELSE - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL B_pwm))) - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_com))) + mov P0SKIP, #(NOT (1 SHL B_pwm)) + mov P1SKIP, #(NOT (1 SHL B_com)) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL C_pwm))) - mov P1SKIP, #P1_SKIP_ALL + mov P0SKIP, #(NOT (1 SHL C_pwm)) + mov P1SKIP, #0FFh ELSE - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL C_pwm))) - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_com))) + mov P0SKIP, #(NOT (1 SHL C_pwm)) + mov P1SKIP, #(NOT (1 SHL C_com)) ENDIF ENDM Set_Pwms_Off MACRO - mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #P1_SKIP_ALL + mov P0SKIP, #0FFh + mov P1SKIP, #0FFh ENDM diff --git a/targets/R.inc b/targets/R.inc index d4f845b..cc99bbd 100644 --- a/targets/R.inc +++ b/targets/R.inc @@ -92,7 +92,7 @@ A_pwm EQU 2 ;o B_pwm EQU 1 ;o C_pwm EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -111,7 +111,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/S.inc b/targets/S.inc index 9e40fb8..27fd2cc 100644 --- a/targets/S.inc +++ b/targets/S.inc @@ -96,7 +96,7 @@ B_com EQU 2 ;o A_pwm EQU 1 ;o A_com EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -115,7 +115,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/T.inc b/targets/T.inc index 2a8e1af..a73186e 100644 --- a/targets/T.inc +++ b/targets/T.inc @@ -98,7 +98,7 @@ A_com EQU 2 ;o B_com EQU 1 ;o C_com EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -117,7 +117,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/U.inc b/targets/U.inc index b28f44a..f057f7d 100644 --- a/targets/U.inc +++ b/targets/U.inc @@ -95,8 +95,7 @@ B_pwm EQU 2 ;o A_pwm EQU 1 ;o ; EQU 0 ;o -; hack: skip index 0 -P1_SKIP_ALL EQU 1 + (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -115,7 +114,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh diff --git a/targets/V.inc b/targets/V.inc index 3bd2872..bedb0f4 100644 --- a/targets/V.inc +++ b/targets/V.inc @@ -45,12 +45,12 @@ Comp_Com EQU 2 ;i B_Mux EQU 1 ;i A_Mux EQU 0 ;i -P0_SKIP_ALL EQU 0FFh + P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU NOT(1 SHL C_com) P0_PUSHPULL EQU (1 SHL C_com) -P0_SKIP EQU P0_SKIP_ALL +P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 @@ -99,8 +99,7 @@ B_pwm EQU 4 ;o B_com EQU 1 ;o C_pwm EQU 0 ;o -; todo: hack -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL 2) + (1 SHL 3) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -119,43 +118,43 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET - mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL A_pwm))) + mov P0SKIP, #0FFh + mov P1SKIP, #(NOT (1 SHL A_pwm)) ELSE - mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL A_pwm) + (1 SHL A_com)))) + mov P0SKIP, #0FFh + mov P1SKIP, #(NOT ((1 SHL A_pwm) + (1 SHL A_com))) ENDIF ENDM Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET - mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL B_pwm))) + mov P0SKIP, #0FFh + mov P1SKIP, #(NOT (1 SHL B_pwm)) ELSE - mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT ((1 SHL B_pwm) + (1 SHL B_com)))) + mov P0SKIP, #0FFh + mov P1SKIP, #(NOT ((1 SHL B_pwm) + (1 SHL B_com))) ENDIF ENDM Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET - mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) + mov P0SKIP, #0FFh + mov P1SKIP, #(NOT (1 SHL C_pwm)) ELSE - mov P0SKIP, #(P0_SKIP_ALL AND (NOT (1 SHL C_com))) - mov P1SKIP, #(P1_SKIP_ALL AND (NOT (1 SHL C_pwm))) + mov P0SKIP, #(NOT (1 SHL C_com)) + mov P1SKIP, #(NOT (1 SHL C_pwm)) ENDIF ENDM Set_Pwms_Off MACRO - mov P0SKIP, #P0_SKIP_ALL - mov P1SKIP, #P1_SKIP_ALL + mov P0SKIP, #0FFh + mov P1SKIP, #0FFh ENDM diff --git a/targets/Z.inc b/targets/Z.inc index 7a73c5f..b28f4de 100644 --- a/targets/Z.inc +++ b/targets/Z.inc @@ -97,7 +97,7 @@ B_com EQU 2 ;o A_pwm EQU 1 ;o A_com EQU 0 ;o -P1_SKIP_ALL EQU (1 SHL A_pwm) + (1 SHL A_com) + (1 SHL B_pwm) + (1 SHL B_com) + (1 SHL C_pwm) + (1 SHL C_com) + P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com @@ -116,7 +116,7 @@ $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU P1_SKIP_ALL +P1_SKIP EQU 0FFh From 4f0c3b8b9e84d649903835bdff14286211b6a1ff Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Wed, 27 Jan 2021 21:12:12 +0100 Subject: [PATCH 05/19] refactor: Make crossbar skip pins on port 2 --- Bluejay.asm | 5 +++++ targets/A.inc | 2 ++ targets/B.inc | 2 ++ targets/C.inc | 2 ++ targets/D.inc | 2 ++ targets/E.inc | 2 ++ targets/F.inc | 2 ++ targets/G.inc | 2 ++ targets/H.inc | 2 ++ targets/I.inc | 2 ++ targets/J.inc | 2 ++ targets/K.inc | 2 ++ targets/L.inc | 2 ++ targets/M.inc | 2 ++ targets/N.inc | 2 ++ targets/O.inc | 2 ++ targets/P.inc | 2 ++ targets/Q.inc | 2 ++ targets/R.inc | 2 ++ targets/S.inc | 2 ++ targets/T.inc | 2 ++ targets/U.inc | 2 ++ targets/V.inc | 2 ++ targets/W.inc | 2 ++ targets/Z.inc | 2 ++ 25 files changed, 53 insertions(+) diff --git a/Bluejay.asm b/Bluejay.asm index 4b148f4..5d59638 100644 --- a/Bluejay.asm +++ b/Bluejay.asm @@ -3512,6 +3512,11 @@ pgm_start: mov P1, #P1_INIT mov P1SKIP, #P1_SKIP mov P2MDOUT, #P2_PUSHPULL +IF MCU_48MHZ == 1 + ; Not available on BB1 + mov P2MDIN, #P2_DIGITAL + mov P2SKIP, #P2_SKIP +ENDIF Initialize_Xbar ; Initialize the XBAR and related functionality call switch_power_off ; Switch power off again, after initializing ports diff --git a/targets/A.inc b/targets/A.inc index 0017b4d..44018a9 100644 --- a/targets/A.inc +++ b/targets/A.inc @@ -128,7 +128,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/B.inc b/targets/B.inc index 8a41594..fa2b460 100644 --- a/targets/B.inc +++ b/targets/B.inc @@ -131,7 +131,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/C.inc b/targets/C.inc index 9b02b91..812f1b2 100644 --- a/targets/C.inc +++ b/targets/C.inc @@ -161,7 +161,9 @@ ENDM ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/D.inc b/targets/D.inc index 2ac3d79..cd389ba 100644 --- a/targets/D.inc +++ b/targets/D.inc @@ -126,7 +126,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/E.inc b/targets/E.inc index 0d4023c..0bee447 100644 --- a/targets/E.inc +++ b/targets/E.inc @@ -126,7 +126,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/F.inc b/targets/F.inc index 9b7beb8..5dd2236 100644 --- a/targets/F.inc +++ b/targets/F.inc @@ -126,7 +126,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/G.inc b/targets/G.inc index f02384a..e47c4c4 100644 --- a/targets/G.inc +++ b/targets/G.inc @@ -126,7 +126,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/H.inc b/targets/H.inc index 2d90764..5ae6a56 100644 --- a/targets/H.inc +++ b/targets/H.inc @@ -131,7 +131,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/I.inc b/targets/I.inc index 618b843..ee67c3f 100644 --- a/targets/I.inc +++ b/targets/I.inc @@ -123,7 +123,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/J.inc b/targets/J.inc index 0a8c854..1dd9446 100644 --- a/targets/J.inc +++ b/targets/J.inc @@ -121,7 +121,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/K.inc b/targets/K.inc index 544e578..ca64436 100644 --- a/targets/K.inc +++ b/targets/K.inc @@ -126,7 +126,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/L.inc b/targets/L.inc index bdae5a6..a943494 100644 --- a/targets/L.inc +++ b/targets/L.inc @@ -121,7 +121,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/M.inc b/targets/M.inc index 9c99033..2ab7d62 100644 --- a/targets/M.inc +++ b/targets/M.inc @@ -128,7 +128,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/N.inc b/targets/N.inc index e193e20..4873702 100644 --- a/targets/N.inc +++ b/targets/N.inc @@ -131,7 +131,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/O.inc b/targets/O.inc index 03f672c..18d4696 100644 --- a/targets/O.inc +++ b/targets/O.inc @@ -124,7 +124,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/P.inc b/targets/P.inc index 5406a70..1a9b589 100644 --- a/targets/P.inc +++ b/targets/P.inc @@ -128,7 +128,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/Q.inc b/targets/Q.inc index 5c772db..ce34806 100644 --- a/targets/Q.inc +++ b/targets/Q.inc @@ -160,7 +160,9 @@ ENDM ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/R.inc b/targets/R.inc index cc99bbd..a9bc9ea 100644 --- a/targets/R.inc +++ b/targets/R.inc @@ -125,7 +125,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/S.inc b/targets/S.inc index 27fd2cc..b1d07c7 100644 --- a/targets/S.inc +++ b/targets/S.inc @@ -129,7 +129,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/T.inc b/targets/T.inc index a73186e..14f5e76 100644 --- a/targets/T.inc +++ b/targets/T.inc @@ -131,7 +131,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/U.inc b/targets/U.inc index f057f7d..7c4717f 100644 --- a/targets/U.inc +++ b/targets/U.inc @@ -128,7 +128,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/V.inc b/targets/V.inc index bedb0f4..fd505d7 100644 --- a/targets/V.inc +++ b/targets/V.inc @@ -165,7 +165,9 @@ ENDM ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/W.inc b/targets/W.inc index e738f98..813d2fd 100644 --- a/targets/W.inc +++ b/targets/W.inc @@ -192,7 +192,9 @@ ENDM ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** diff --git a/targets/Z.inc b/targets/Z.inc index b28f4de..ad81ee0 100644 --- a/targets/Z.inc +++ b/targets/Z.inc @@ -130,7 +130,9 @@ P1_SKIP EQU 0FFh ;********************* DebugPin EQU 0 ;o +P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh ;********************** From 21d5351ad62f47a8507a180cfbee31c8d5295169 Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Wed, 27 Jan 2021 21:31:13 +0100 Subject: [PATCH 06/19] refactor: Simplify pwm polarity setup Changes DT=0 on some layouts --- targets/A.inc | 9 ++------- targets/B.inc | 13 ++----------- targets/Base.inc | 7 +++++++ targets/C.inc | 9 ++------- targets/D.inc | 11 +++-------- targets/E.inc | 9 ++------- targets/F.inc | 9 ++------- targets/G.inc | 9 ++------- targets/H.inc | 13 ++----------- targets/I.inc | 9 ++------- targets/J.inc | 9 ++------- targets/K.inc | 11 +++-------- targets/L.inc | 9 ++------- targets/M.inc | 9 ++------- targets/N.inc | 13 ++----------- targets/O.inc | 11 +++-------- targets/P.inc | 9 ++------- targets/Q.inc | 9 ++------- targets/R.inc | 9 ++------- targets/S.inc | 13 ++----------- targets/T.inc | 13 ++----------- targets/U.inc | 9 ++------- targets/V.inc | 13 ++----------- targets/Z.inc | 15 +++------------ 24 files changed, 57 insertions(+), 193 deletions(-) diff --git a/targets/A.inc b/targets/A.inc index 44018a9..0f3bc87 100644 --- a/targets/A.inc +++ b/targets/A.inc @@ -53,14 +53,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/B.inc b/targets/B.inc index fa2b460..24c9ad4 100644 --- a/targets/B.inc +++ b/targets/B.inc @@ -54,18 +54,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO -IF FETON_DELAY == 0 - mov PCA0POL, #00h ; Pwm noninverted -ELSE + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/Base.inc b/targets/Base.inc index 5176dcf..8338548 100644 --- a/targets/Base.inc +++ b/targets/Base.inc @@ -29,6 +29,13 @@ cON LIT 'clr' cOFF LIT 'setb' ENDIF +Set_Pwm_Polarity MACRO +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1 - PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF +ENDM IF COMP_PORT == 0 CMP_CN0 EQU CMP0CN0 diff --git a/targets/C.inc b/targets/C.inc index 812f1b2..143ac02 100644 --- a/targets/C.inc +++ b/targets/C.inc @@ -55,14 +55,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/D.inc b/targets/D.inc index cd389ba..5261922 100644 --- a/targets/D.inc +++ b/targets/D.inc @@ -53,14 +53,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 0 -Set_Pwm_Polarity MACRO - ;mov PCA0POL, #00h ; Damping noninverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + +; Damping noninverted, pwm noninverted + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/E.inc b/targets/E.inc index 0bee447..32835b0 100644 --- a/targets/E.inc +++ b/targets/E.inc @@ -53,14 +53,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/F.inc b/targets/F.inc index 5dd2236..31fbe91 100644 --- a/targets/F.inc +++ b/targets/F.inc @@ -53,14 +53,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/G.inc b/targets/G.inc index e47c4c4..579cd2a 100644 --- a/targets/G.inc +++ b/targets/G.inc @@ -53,14 +53,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/H.inc b/targets/H.inc index 5ae6a56..5d1a636 100644 --- a/targets/H.inc +++ b/targets/H.inc @@ -54,18 +54,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO -IF FETON_DELAY == 0 - mov PCA0POL, #00h ; Pwm noninverted -ELSE + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/I.inc b/targets/I.inc index ee67c3f..0cca726 100644 --- a/targets/I.inc +++ b/targets/I.inc @@ -53,14 +53,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/J.inc b/targets/J.inc index 1dd9446..36f64ee 100644 --- a/targets/J.inc +++ b/targets/J.inc @@ -53,14 +53,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/K.inc b/targets/K.inc index ca64436..1ad0801 100644 --- a/targets/K.inc +++ b/targets/K.inc @@ -53,14 +53,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 0 -Set_Pwm_Polarity MACRO - ;mov PCA0POL, #00h ; Damping noninverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + +; Damping noninverted, pwm noninverted + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/L.inc b/targets/L.inc index a943494..3a9b805 100644 --- a/targets/L.inc +++ b/targets/L.inc @@ -53,14 +53,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/M.inc b/targets/M.inc index 2ab7d62..da0240a 100644 --- a/targets/M.inc +++ b/targets/M.inc @@ -54,14 +54,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/N.inc b/targets/N.inc index 4873702..a966f3b 100644 --- a/targets/N.inc +++ b/targets/N.inc @@ -54,18 +54,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO -IF FETON_DELAY == 0 - mov PCA0POL, #00h ; Pwm noninverted -ELSE + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/O.inc b/targets/O.inc index 18d4696..825e03e 100644 --- a/targets/O.inc +++ b/targets/O.inc @@ -53,14 +53,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 0 -Set_Pwm_Polarity MACRO -; mov PCA0POL, #00h ; Damping noninverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + +; Damping noninverted, pwm noninverted + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/P.inc b/targets/P.inc index 1a9b589..2d20044 100644 --- a/targets/P.inc +++ b/targets/P.inc @@ -54,14 +54,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/Q.inc b/targets/Q.inc index ce34806..b2fcd3e 100644 --- a/targets/Q.inc +++ b/targets/Q.inc @@ -55,14 +55,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/R.inc b/targets/R.inc index a9bc9ea..6a1566d 100644 --- a/targets/R.inc +++ b/targets/R.inc @@ -53,14 +53,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/S.inc b/targets/S.inc index b1d07c7..fb8f200 100644 --- a/targets/S.inc +++ b/targets/S.inc @@ -53,17 +53,8 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO -IF FETON_DELAY == 0 - mov PCA0POL, #00h ; Pwm noninverted -ELSE -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDIF -ENDM + + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/T.inc b/targets/T.inc index 14f5e76..2da73d3 100644 --- a/targets/T.inc +++ b/targets/T.inc @@ -54,18 +54,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO -IF FETON_DELAY == 0 - mov PCA0POL, #00h ; Pwm noninverted -ELSE + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/U.inc b/targets/U.inc index 7c4717f..17368ed 100644 --- a/targets/U.inc +++ b/targets/U.inc @@ -54,14 +54,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/V.inc b/targets/V.inc index fd505d7..fca1bcb 100644 --- a/targets/V.inc +++ b/targets/V.inc @@ -55,18 +55,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 1 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO -IF FETON_DELAY == 0 - mov PCA0POL, #00h ; Pwm noninverted -ELSE + ; Damping inverted, pwm noninverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDIF - ENDM + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 diff --git a/targets/Z.inc b/targets/Z.inc index ad81ee0..59d53d7 100644 --- a/targets/Z.inc +++ b/targets/Z.inc @@ -53,18 +53,9 @@ P0_SKIP EQU 0FFh PWM_ACTIVE_HIGH EQU 0 COMPWM_ACTIVE_HIGH EQU 1 -Set_Pwm_Polarity MACRO -IF FETON_DELAY == 0 - mov PCA0POL, #02h ; Pwm inverted -ELSE -; mov PCA0POL, #03h ; Damping inverted, pwm inverted -IF PCA0_POWER_MODULE == PCA0CPM0 - mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) -ELSE - mov PCA0POL, #(((1-PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) -ENDIF -ENDIF -ENDM + +; Damping inverted, pwm inverted + IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 From e2765d02c11e8e7f0c6bc1580c1e138fd31ff053 Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Tue, 2 Feb 2021 02:37:01 +0100 Subject: [PATCH 07/19] refactor: Move more layout configuration to common file --- Common.inc | 23 ------ targets/A.inc | 34 +-------- targets/B.inc | 34 +-------- targets/Base.inc | 184 +++++++++++++++++++++++++++++++++-------------- targets/C.inc | 27 +------ targets/D.inc | 34 +-------- targets/E.inc | 12 +--- targets/F.inc | 34 +-------- targets/G.inc | 34 +-------- targets/H.inc | 34 +-------- targets/I.inc | 34 +-------- targets/J.inc | 15 +--- targets/K.inc | 34 +-------- targets/L.inc | 34 +-------- targets/M.inc | 12 +--- targets/N.inc | 34 +-------- targets/O.inc | 34 +-------- targets/P.inc | 34 +-------- targets/Q.inc | 4 +- targets/R.inc | 34 +-------- targets/S.inc | 34 +-------- targets/T.inc | 34 +-------- targets/U.inc | 12 +--- targets/V.inc | 27 +------ targets/W.inc | 2 - targets/Z.inc | 34 +-------- 26 files changed, 178 insertions(+), 684 deletions(-) diff --git a/Common.inc b/Common.inc index 78d14d3..6db865c 100644 --- a/Common.inc +++ b/Common.inc @@ -239,29 +239,6 @@ Set_MCU_Clk_48MHz MACRO setb Flag_Clock_At_48MHz ENDM -Initialize_Adc MACRO - mov REF0CN, #0Ch ;; Set vdd (3.3V) as reference. Enable temp sensor and bias -IF MCU_48MHZ == 0 - mov ADC0CF, #59h ;; ADC clock 2MHz, PGA gain 1 -ELSE - mov ADC0CF, #0B9h ;; ADC clock 2MHz, PGA gain 1 -ENDIF - mov ADC0MX, #10h ;; Select temp sensor input - mov ADC0CN0, #80h ;; ADC enabled - mov ADC0CN1, #01h ;; Common mode buffer enabled -ENDM - -Start_Adc MACRO - mov ADC0CN0, #90h ;; ADC start -ENDM - -Read_Adc_Result MACRO - mov Temp1, ADC0L - mov Temp2, ADC0H -ENDM - -Stop_Adc MACRO -ENDM Set_RPM_Out MACRO ENDM Clear_RPM_Out MACRO diff --git a/targets/A.inc b/targets/A.inc index 0f3bc87..2249b6e 100644 --- a/targets/A.inc +++ b/targets/A.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -90,17 +88,12 @@ A_pwm EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -128,26 +121,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/B.inc b/targets/B.inc index 24c9ad4..fb98b7d 100644 --- a/targets/B.inc +++ b/targets/B.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -91,17 +89,12 @@ C_com EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -127,26 +120,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/Base.inc b/targets/Base.inc index 8338548..1cd91ac 100644 --- a/targets/Base.inc +++ b/targets/Base.inc @@ -11,23 +11,24 @@ RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP RTX_PIN EQU Rcp_In ; RTX pin +;**** **** **** **** **** +; PWM pin routing and polarity setup +;**** **** **** **** **** +$if NOT CUSTOM_PWM_SETUP - -IF PWM_ACTIVE_HIGH == 1 ; fet active high -pON LIT 'setb' -pOFF LIT 'clr' -ELSE ; fet active low -pON LIT 'clr' -pOFF LIT 'setb' -ENDIF - -IF COMPWM_ACTIVE_HIGH == 1 ; comfet active high -cON LIT 'setb' -cOFF LIT 'clr' -ELSE ; comfet active low -cON LIT 'clr' -cOFF LIT 'setb' +Initialize_Xbar MACRO + mov XBR2, #40h ;; Xbar enabled + mov XBR1, #02h ;; CEX0 and CEX1 routed to pins +IF ESCNO = E_ + All_pwmFETs_off ; For unlocking of HIP2103/4 driver circuits + call wait100ms + AcomFET_on + BcomFET_on + CcomFET_on + call wait1ms + All_comFETs_off ENDIF +ENDM Set_Pwm_Polarity MACRO IF PCA0_POWER_MODULE == PCA0CPM0 @@ -37,6 +38,12 @@ ELSE ENDIF ENDM +$endif + + +;**** **** **** **** **** +; Comparator setup and phase change +;**** **** **** **** **** IF COMP_PORT == 0 CMP_CN0 EQU CMP0CN0 CMP_MD EQU CMP0MD @@ -47,26 +54,11 @@ CMP_MD EQU CMP1MD CMP_MX EQU CMP1MX ENDIF -Initialize_Xbar MACRO - mov XBR2, #40h ;; Xbar enabled - mov XBR1, #02h ;; CEX0 and CEX1 routed to pins -IF ESCNO = E_ - All_pwmFETs_off ; For unlocking of HIP2103/4 driver circuits - call wait100ms - AcomFET_on - BcomFET_on - CcomFET_on - call wait1ms - All_comFETs_off -ENDIF -ENDM - Initialize_Comparator MACRO mov CMP_CN0, #80h ;; Comparator enabled, no hysteresis mov CMP_MD, #00h ;; Comparator response time 100ns ENDM - Read_Comp_Out MACRO mov A, CMP_CN0 ;; Read comparator output IF ESCNO == O_ @@ -90,7 +82,73 @@ Set_Comp_Phase_C MACRO ENDM +;**** **** **** **** **** +; PWM phase change +;**** **** **** **** **** +$if NOT CUSTOM_PWM_PHASE +; All pwm and com pins must be on port 1 +P_ApwmFET EQU P1.A_pwm +P_AcomFET EQU P1.A_com +P_BpwmFET EQU P1.B_pwm +P_BcomFET EQU P1.B_com +P_CpwmFET EQU P1.C_pwm +P_CcomFET EQU P1.C_com + +Set_Pwm_A MACRO +IF FETON_DELAY == 0 + cON P_AcomFET + mov P1SKIP, #(NOT (1 SHL A_pwm)) +ELSE + mov P1SKIP, #(NOT ((1 SHL A_pwm) + (1 SHL A_com))) +ENDIF +ENDM + +Set_Pwm_B MACRO +IF FETON_DELAY == 0 + cON P_BcomFET + mov P1SKIP, #(NOT (1 SHL B_pwm)) +ELSE + mov P1SKIP, #(NOT ((1 SHL B_pwm) + (1 SHL B_com))) +ENDIF +ENDM + +Set_Pwm_C MACRO +IF FETON_DELAY == 0 + cON P_CcomFET + mov P1SKIP, #(NOT (1 SHL C_pwm)) +ELSE + mov P1SKIP, #(NOT ((1 SHL C_pwm) + (1 SHL C_com))) +ENDIF +ENDM + +Set_Pwms_Off MACRO + mov P1SKIP, #0FFh +ENDM + +$endif + + +;**** **** **** **** **** +; Fets on/off toggling +;**** **** **** **** **** +$if NOT CUSTOM_FET_TOGGLING + +IF PWM_ACTIVE_HIGH == 1 ; fet active high +pON LIT 'setb' +pOFF LIT 'clr' +ELSE ; fet active low +pON LIT 'clr' +pOFF LIT 'setb' +ENDIF + +IF COMPWM_ACTIVE_HIGH == 1 ; comfet active high +cON LIT 'setb' +cOFF LIT 'clr' +ELSE ; comfet active low +cON LIT 'clr' +cOFF LIT 'setb' +ENDIF ApwmFET_on MACRO pON P_ApwmFET @@ -170,38 +228,58 @@ All_comFETs_Off MACRO CcomFET_off ENDM +$endif -IF ALL_FETS_ON_PORT1 == 1 -Set_Pwm_A MACRO -IF FETON_DELAY == 0 - cON P_AcomFET - mov P1SKIP, #(NOT (1 SHL A_pwm)) -ELSE - mov P1SKIP, #(NOT ((1 SHL A_pwm) + (1 SHL A_com))) -ENDIF +$if NOT CUSTOM_LED + +Set_LED_0 MACRO +ENDM +Clear_LED_0 MACRO +ENDM +Set_LED_1 MACRO +ENDM +Clear_LED_1 MACRO +ENDM +Set_LED_2 MACRO +ENDM +Clear_LED_2 MACRO +ENDM +Set_LED_3 MACRO +ENDM +Clear_LED_3 MACRO ENDM -Set_Pwm_B MACRO -IF FETON_DELAY == 0 - cON P_BcomFET - mov P1SKIP, #(NOT (1 SHL B_pwm)) +$endif + +;**** **** **** **** **** +; ADC and temperature measurement +;**** **** **** **** **** +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC + +Initialize_Adc MACRO + mov REF0CN, #0Ch ;; Set vdd (3.3V) as reference. Enable temp sensor and bias +IF MCU_48MHZ == 0 + mov ADC0CF, #59h ;; ADC clock 2MHz, PGA gain 1 ELSE - mov P1SKIP, #(NOT ((1 SHL B_pwm) + (1 SHL B_com))) + mov ADC0CF, #0B9h ;; ADC clock 2MHz, PGA gain 1 ENDIF + mov ADC0MX, #10h ;; Select temp sensor input + mov ADC0CN0, #80h ;; ADC enabled + mov ADC0CN1, #01h ;; Common mode buffer enabled ENDM -Set_Pwm_C MACRO -IF FETON_DELAY == 0 - cON P_CcomFET - mov P1SKIP, #(NOT (1 SHL C_pwm)) -ELSE - mov P1SKIP, #(NOT ((1 SHL C_pwm) + (1 SHL C_com))) -ENDIF +Start_Adc MACRO + mov ADC0CN0, #90h ;; ADC start ENDM -Set_Pwms_Off MACRO - mov P1SKIP, #0FFh +Read_Adc_Result MACRO + mov Temp1, ADC0L + mov Temp2, ADC0H ENDM -ENDIF +Stop_Adc MACRO +ENDM + + diff --git a/targets/C.inc b/targets/C.inc index 143ac02..9decceb 100644 --- a/targets/C.inc +++ b/targets/C.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -102,7 +100,7 @@ P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 0 +$set(CUSTOM_PWM_PHASE) $include (Base.inc) @@ -161,26 +159,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/D.inc b/targets/D.inc index 5261922..5ce8dd7 100644 --- a/targets/D.inc +++ b/targets/D.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -90,17 +88,12 @@ A_pwm EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -126,26 +119,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/E.inc b/targets/E.inc index 32835b0..795453f 100644 --- a/targets/E.inc +++ b/targets/E.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -90,17 +88,13 @@ A_pwm EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + +$set(CUSTOM_LED) $include (Base.inc) diff --git a/targets/F.inc b/targets/F.inc index 31fbe91..ea9e853 100644 --- a/targets/F.inc +++ b/targets/F.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -90,17 +88,12 @@ A_pwm EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -126,26 +119,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/G.inc b/targets/G.inc index 579cd2a..1c44b11 100644 --- a/targets/G.inc +++ b/targets/G.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -90,17 +88,12 @@ A_pwm EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -126,26 +119,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/H.inc b/targets/H.inc index 5d1a636..395a9ab 100644 --- a/targets/H.inc +++ b/targets/H.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -91,17 +89,12 @@ C_com EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -127,26 +120,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/I.inc b/targets/I.inc index 0cca726..6472332 100644 --- a/targets/I.inc +++ b/targets/I.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -89,17 +87,12 @@ C_pwm EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -123,26 +116,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/J.inc b/targets/J.inc index 36f64ee..b280e9b 100644 --- a/targets/J.inc +++ b/targets/J.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -89,17 +87,13 @@ A_pwm EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + +$set(CUSTOM_LED) $include (Base.inc) @@ -125,9 +119,6 @@ P2_SKIP EQU 0FFh ; MCU specific macros * ;********************** - - - Set_LED_0 MACRO clr P0.LED_0 ENDM diff --git a/targets/K.inc b/targets/K.inc index 1ad0801..d20ef98 100644 --- a/targets/K.inc +++ b/targets/K.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -90,17 +88,12 @@ A_com EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -126,26 +119,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/L.inc b/targets/L.inc index 3a9b805..fb77399 100644 --- a/targets/L.inc +++ b/targets/L.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -89,17 +87,12 @@ C_pwm EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -121,26 +114,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/M.inc b/targets/M.inc index da0240a..7e6831f 100644 --- a/targets/M.inc +++ b/targets/M.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -92,17 +90,13 @@ A_pwm EQU 1 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + +$set(CUSTOM_LED) $include (Base.inc) diff --git a/targets/N.inc b/targets/N.inc index a966f3b..117800f 100644 --- a/targets/N.inc +++ b/targets/N.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -91,17 +89,12 @@ A_com EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -127,26 +120,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/O.inc b/targets/O.inc index 825e03e..a44fcee 100644 --- a/targets/O.inc +++ b/targets/O.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -90,17 +88,12 @@ A_pwm EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -124,26 +117,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/P.inc b/targets/P.inc index 2d20044..dc54d12 100644 --- a/targets/P.inc +++ b/targets/P.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -92,17 +90,12 @@ A_pwm EQU 1 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -128,26 +121,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/Q.inc b/targets/Q.inc index b2fcd3e..d7e93a9 100644 --- a/targets/Q.inc +++ b/targets/Q.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -102,7 +100,7 @@ P_CcomFET EQU P1.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 1 -ALL_FETS_ON_PORT1 EQU 0 +$set(CUSTOM_PWM_PHASE, CUSTOM_LED) $include (Base.inc) diff --git a/targets/R.inc b/targets/R.inc index 6a1566d..dd0ed48 100644 --- a/targets/R.inc +++ b/targets/R.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -89,17 +87,12 @@ C_pwm EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -125,26 +118,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/S.inc b/targets/S.inc index fb8f200..3e954a6 100644 --- a/targets/S.inc +++ b/targets/S.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -89,17 +87,12 @@ A_com EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -125,26 +118,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/T.inc b/targets/T.inc index 2da73d3..1fe5de6 100644 --- a/targets/T.inc +++ b/targets/T.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -91,17 +89,12 @@ C_com EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -127,26 +120,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/U.inc b/targets/U.inc index 17368ed..dc7994c 100644 --- a/targets/U.inc +++ b/targets/U.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -92,17 +90,13 @@ A_pwm EQU 1 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + +$set(CUSTOM_LED) $include (Base.inc) diff --git a/targets/V.inc b/targets/V.inc index fca1bcb..08f21cd 100644 --- a/targets/V.inc +++ b/targets/V.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -102,7 +100,7 @@ P_CcomFET EQU P0.C_com ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 0 +$set(CUSTOM_PWM_PHASE) $include (Base.inc) @@ -161,26 +159,3 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM diff --git a/targets/W.inc b/targets/W.inc index 813d2fd..78b0581 100644 --- a/targets/W.inc +++ b/targets/W.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC ;**** **** **** **** **** ; Bootloader definitions diff --git a/targets/Z.inc b/targets/Z.inc index 59d53d7..7f8a29b 100644 --- a/targets/Z.inc +++ b/targets/Z.inc @@ -27,8 +27,6 @@ ; ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC @@ -90,17 +88,12 @@ A_com EQU 0 ;o -P_ApwmFET EQU P1.A_pwm -P_AcomFET EQU P1.A_com -P_BpwmFET EQU P1.B_pwm -P_BcomFET EQU P1.B_com -P_CpwmFET EQU P1.C_pwm -P_CcomFET EQU P1.C_com + ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 -ALL_FETS_ON_PORT1 EQU 1 + $include (Base.inc) @@ -125,26 +118,3 @@ P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh - -;********************** -; MCU specific macros * -;********************** - - - -Set_LED_0 MACRO -ENDM -Clear_LED_0 MACRO -ENDM -Set_LED_1 MACRO -ENDM -Clear_LED_1 MACRO -ENDM -Set_LED_2 MACRO -ENDM -Clear_LED_2 MACRO -ENDM -Set_LED_3 MACRO -ENDM -Clear_LED_3 MACRO -ENDM From b2c3db2a8218c19b146b5ccd2b6ae336fbb87067 Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Tue, 2 Feb 2021 02:59:14 +0100 Subject: [PATCH 08/19] style: Clean up layouts style --- Common.inc | 5 +++++ targets/A.inc | 7 ++----- targets/B.inc | 7 ++----- targets/Base.inc | 21 +++++++++++++++++++++ targets/C.inc | 10 +++++----- targets/D.inc | 7 ++----- targets/E.inc | 14 +++++++++----- targets/F.inc | 7 ++----- targets/G.inc | 7 ++----- targets/H.inc | 7 ++----- targets/I.inc | 7 ++----- targets/J.inc | 14 +++++++++----- targets/K.inc | 7 ++----- targets/L.inc | 7 ++----- targets/M.inc | 16 ++++++++++------ targets/N.inc | 7 ++----- targets/O.inc | 7 ++----- targets/P.inc | 7 ++----- targets/Q.inc | 17 ++++++++++++----- targets/R.inc | 7 ++----- targets/S.inc | 6 ++---- targets/T.inc | 7 ++----- targets/U.inc | 15 +++++++++------ targets/V.inc | 10 +++++----- targets/W.inc | 23 +++++++++++++++++++++++ targets/Z.inc | 7 ++----- 26 files changed, 140 insertions(+), 116 deletions(-) diff --git a/Common.inc b/Common.inc index 6db865c..d88bcf1 100644 --- a/Common.inc +++ b/Common.inc @@ -184,9 +184,11 @@ ENDM Clear_COVF_Interrupt MACRO anl PCA0PWM, #0DFh ENDM + Enable_COVF_Interrupt MACRO orl PCA0PWM, #40h ENDM + Disable_COVF_Interrupt MACRO anl PCA0PWM, #0BFh ENDM @@ -195,9 +197,11 @@ ENDM Clear_CCF_Interrupt MACRO anl PCA0CN0, #0FEh ENDM + Enable_CCF_Interrupt MACRO orl PCA0CPM0,#01h ENDM + Disable_CCF_Interrupt MACRO anl PCA0CPM0,#0FEh ENDM @@ -241,5 +245,6 @@ ENDM Set_RPM_Out MACRO ENDM + Clear_RPM_Out MACRO ENDM diff --git a/targets/A.inc b/targets/A.inc index 2249b6e..f62c116 100644 --- a/targets/A.inc +++ b/targets/A.inc @@ -48,11 +48,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 diff --git a/targets/B.inc b/targets/B.inc index fb98b7d..ef43558 100644 --- a/targets/B.inc +++ b/targets/B.inc @@ -49,11 +49,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 diff --git a/targets/Base.inc b/targets/Base.inc index 1cd91ac..e21cf31 100644 --- a/targets/Base.inc +++ b/targets/Base.inc @@ -156,6 +156,7 @@ IF FETON_DELAY == 0 cON P_AcomFET ENDIF ENDM + ApwmFET_off MACRO IF FETON_DELAY != 0 pOFF P_ApwmFET @@ -163,12 +164,14 @@ ELSE cOFF P_AcomFET ENDIF ENDM + BpwmFET_on MACRO pON P_BpwmFET IF FETON_DELAY == 0 cON P_BcomFET ENDIF ENDM + BpwmFET_off MACRO IF FETON_DELAY != 0 pOFF P_BpwmFET @@ -176,12 +179,14 @@ ELSE cOFF P_BcomFET ENDIF ENDM + CpwmFET_on MACRO pON P_CpwmFET IF FETON_DELAY == 0 cON P_CcomFET ENDIF ENDM + CpwmFET_off MACRO IF FETON_DELAY != 0 pOFF P_CpwmFET @@ -189,39 +194,48 @@ ELSE cOFF P_CcomFET ENDIF ENDM + All_pwmFETs_Off MACRO ApwmFET_off BpwmFET_off CpwmFET_off ENDM + + AcomFET_on MACRO IF FETON_DELAY == 0 pOFF P_ApwmFET ENDIF cON P_AcomFET ENDM + AcomFET_off MACRO cOFF P_AcomFET ENDM + BcomFET_on MACRO IF FETON_DELAY == 0 pOFF P_BpwmFET ENDIF cON P_BcomFET ENDM + BcomFET_off MACRO cOFF P_BcomFET ENDM + CcomFET_on MACRO IF FETON_DELAY == 0 pOFF P_CpwmFET ENDIF cON P_CcomFET ENDM + CcomFET_off MACRO cOFF P_CcomFET ENDM + All_comFETs_Off MACRO AcomFET_off BcomFET_off @@ -235,18 +249,25 @@ $if NOT CUSTOM_LED Set_LED_0 MACRO ENDM + Clear_LED_0 MACRO ENDM + Set_LED_1 MACRO ENDM + Clear_LED_1 MACRO ENDM + Set_LED_2 MACRO ENDM + Clear_LED_2 MACRO ENDM + Set_LED_3 MACRO ENDM + Clear_LED_3 MACRO ENDM diff --git a/targets/C.inc b/targets/C.inc index 9decceb..416ba1b 100644 --- a/targets/C.inc +++ b/targets/C.inc @@ -50,11 +50,8 @@ P0_INIT EQU NOT((1 SHL A_pwm) + (1 SHL A_com)) P0_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL A_com) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 @@ -121,6 +118,7 @@ ELSE mov P1SKIP, #0FFh ENDIF ENDM + Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET @@ -131,6 +129,7 @@ ELSE mov P1SKIP, #(NOT ((1 SHL B_pwm) + (1 SHL B_com))) ENDIF ENDM + Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET @@ -141,6 +140,7 @@ ELSE mov P1SKIP, #(NOT ((1 SHL C_pwm) + (1 SHL C_com))) ENDIF ENDM + Set_Pwms_Off MACRO mov P0SKIP, #0FFh mov P1SKIP, #0FFh diff --git a/targets/D.inc b/targets/D.inc index 5ce8dd7..7303830 100644 --- a/targets/D.inc +++ b/targets/D.inc @@ -48,11 +48,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 0 - - -; Damping noninverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted IF FETON_DELAY == 0 diff --git a/targets/E.inc b/targets/E.inc index 795453f..847f39e 100644 --- a/targets/E.inc +++ b/targets/E.inc @@ -48,11 +48,8 @@ P0_INIT EQU NOT((1 SHL LED_0) + (1 SHL LED_1)) P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 @@ -127,22 +124,29 @@ P2_SKIP EQU 0FFh Set_LED_0 MACRO setb P0.LED_0 ENDM + Clear_LED_0 MACRO clr P0.LED_0 ENDM + Set_LED_1 MACRO setb P0.LED_1 ENDM + Clear_LED_1 MACRO clr P0.LED_1 ENDM + Set_LED_2 MACRO setb P1.LED_2 ENDM + Clear_LED_2 MACRO clr P1.LED_2 ENDM + Set_LED_3 MACRO ENDM + Clear_LED_3 MACRO ENDM diff --git a/targets/F.inc b/targets/F.inc index ea9e853..43aaeab 100644 --- a/targets/F.inc +++ b/targets/F.inc @@ -48,11 +48,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 diff --git a/targets/G.inc b/targets/G.inc index 1c44b11..4252f5d 100644 --- a/targets/G.inc +++ b/targets/G.inc @@ -48,11 +48,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 diff --git a/targets/H.inc b/targets/H.inc index 395a9ab..e55a88e 100644 --- a/targets/H.inc +++ b/targets/H.inc @@ -49,11 +49,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 diff --git a/targets/I.inc b/targets/I.inc index 6472332..9c3d088 100644 --- a/targets/I.inc +++ b/targets/I.inc @@ -48,11 +48,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 diff --git a/targets/J.inc b/targets/J.inc index b280e9b..70a2169 100644 --- a/targets/J.inc +++ b/targets/J.inc @@ -48,11 +48,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 @@ -122,22 +119,29 @@ P2_SKIP EQU 0FFh Set_LED_0 MACRO clr P0.LED_0 ENDM + Clear_LED_0 MACRO setb P0.LED_0 ENDM + Set_LED_1 MACRO clr P0.LED_1 ENDM + Clear_LED_1 MACRO setb P0.LED_1 ENDM + Set_LED_2 MACRO clr P0.LED_2 ENDM + Clear_LED_2 MACRO setb P0.LED_2 ENDM + Set_LED_3 MACRO ENDM + Clear_LED_3 MACRO ENDM diff --git a/targets/K.inc b/targets/K.inc index d20ef98..4b7f45c 100644 --- a/targets/K.inc +++ b/targets/K.inc @@ -48,11 +48,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 0 - - -; Damping noninverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted IF FETON_DELAY == 0 diff --git a/targets/L.inc b/targets/L.inc index fb77399..0376a18 100644 --- a/targets/L.inc +++ b/targets/L.inc @@ -48,11 +48,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 diff --git a/targets/M.inc b/targets/M.inc index 7e6831f..0d738df 100644 --- a/targets/M.inc +++ b/targets/M.inc @@ -49,11 +49,8 @@ P0_INIT EQU NOT(1 SHL LED_0) P0_PUSHPULL EQU (1 SHL LED_0) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 @@ -132,18 +129,25 @@ P2_SKIP EQU 0FFh Set_LED_0 MACRO setb P0.LED_0 ENDM + Clear_LED_0 MACRO - clr P0.LED_0 + clr P0.LED_0 ENDM + Set_LED_1 MACRO ENDM + Clear_LED_1 MACRO ENDM + Set_LED_2 MACRO ENDM + Clear_LED_2 MACRO ENDM + Set_LED_3 MACRO ENDM + Clear_LED_3 MACRO ENDM diff --git a/targets/N.inc b/targets/N.inc index 117800f..7ea0803 100644 --- a/targets/N.inc +++ b/targets/N.inc @@ -49,11 +49,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 diff --git a/targets/O.inc b/targets/O.inc index a44fcee..0a769b0 100644 --- a/targets/O.inc +++ b/targets/O.inc @@ -48,11 +48,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 0 - - -; Damping noninverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted IF FETON_DELAY == 0 diff --git a/targets/P.inc b/targets/P.inc index dc54d12..b6cdbd9 100644 --- a/targets/P.inc +++ b/targets/P.inc @@ -49,11 +49,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 diff --git a/targets/Q.inc b/targets/Q.inc index d7e93a9..ed7292c 100644 --- a/targets/Q.inc +++ b/targets/Q.inc @@ -50,11 +50,8 @@ P0_INIT EQU (1 SHL Rcp_In) P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 @@ -121,6 +118,7 @@ ELSE mov P1SKIP, #(NOT (1 SHL A_com)) ENDIF ENDM + Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET @@ -131,6 +129,7 @@ ELSE mov P1SKIP, #(NOT (1 SHL B_com)) ENDIF ENDM + Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET @@ -141,6 +140,7 @@ ELSE mov P1SKIP, #(NOT (1 SHL C_com)) ENDIF ENDM + Set_Pwms_Off MACRO mov P0SKIP, #0FFh mov P1SKIP, #0FFh @@ -167,20 +167,27 @@ P2_SKIP EQU 0FFh Set_LED_0 MACRO setb P0.LED_0 ENDM + Clear_LED_0 MACRO clr P0.LED_0 ENDM + Set_LED_1 MACRO setb P0.LED_1 ENDM + Clear_LED_1 MACRO clr P0.LED_1 ENDM + Set_LED_2 MACRO ENDM + Clear_LED_2 MACRO ENDM + Set_LED_3 MACRO ENDM + Clear_LED_3 MACRO ENDM diff --git a/targets/R.inc b/targets/R.inc index dd0ed48..113e921 100644 --- a/targets/R.inc +++ b/targets/R.inc @@ -48,11 +48,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 diff --git a/targets/S.inc b/targets/S.inc index 3e954a6..8e3752a 100644 --- a/targets/S.inc +++ b/targets/S.inc @@ -48,10 +48,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 diff --git a/targets/T.inc b/targets/T.inc index 1fe5de6..de1310b 100644 --- a/targets/T.inc +++ b/targets/T.inc @@ -49,11 +49,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 diff --git a/targets/U.inc b/targets/U.inc index dc7994c..5ad6297 100644 --- a/targets/U.inc +++ b/targets/U.inc @@ -49,11 +49,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 @@ -132,23 +129,29 @@ P2_SKIP EQU 0FFh Set_LED_0 MACRO clr P0.LED_0 ENDM + Clear_LED_0 MACRO setb P0.LED_0 ENDM + Set_LED_1 MACRO clr P0.LED_1 ENDM + Clear_LED_1 MACRO setb P0.LED_1 ENDM + Set_LED_2 MACRO clr P0.LED_2 ENDM + Clear_LED_2 MACRO setb P0.LED_2 ENDM + Set_LED_3 MACRO ENDM + Clear_LED_3 MACRO ENDM - diff --git a/targets/V.inc b/targets/V.inc index 08f21cd..1535c50 100644 --- a/targets/V.inc +++ b/targets/V.inc @@ -50,11 +50,8 @@ P0_INIT EQU NOT(1 SHL C_com) P0_PUSHPULL EQU (1 SHL C_com) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm noninverted +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 @@ -121,6 +118,7 @@ ELSE mov P1SKIP, #(NOT ((1 SHL A_pwm) + (1 SHL A_com))) ENDIF ENDM + Set_Pwm_B MACRO IF FETON_DELAY == 0 cON P_BcomFET @@ -131,6 +129,7 @@ ELSE mov P1SKIP, #(NOT ((1 SHL B_pwm) + (1 SHL B_com))) ENDIF ENDM + Set_Pwm_C MACRO IF FETON_DELAY == 0 cON P_CcomFET @@ -141,6 +140,7 @@ ELSE mov P1SKIP, #(NOT (1 SHL C_pwm)) ENDIF ENDM + Set_Pwms_Off MACRO mov P0SKIP, #0FFh mov P1SKIP, #0FFh diff --git a/targets/W.inc b/targets/W.inc index 78b0581..3462ba7 100644 --- a/targets/W.inc +++ b/targets/W.inc @@ -107,23 +107,29 @@ ApwmFET_on MACRO setb P1.A_pwm ; set pin to high orl P1MDIN, #(1 SHL A_pwm) ; enable pin driver ENDM + ApwmFET_off MACRO anl P1MDIN, #(NOT(1 SHL A_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM + BpwmFET_on MACRO setb P1.B_pwm ; set pin to high orl P1MDIN, #(1 SHL B_pwm) ; enable pin driver ENDM + BpwmFET_off MACRO anl P1MDIN, #(NOT(1 SHL B_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM + CpwmFET_on MACRO setb P1.C_pwm ; set pin to high orl P1MDIN, #(1 SHL C_pwm) ; enable pin driver ENDM + CpwmFET_off MACRO anl P1MDIN, #(NOT(1 SHL C_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM + All_pwmFETs_Off MACRO anl P1MDIN, #(NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm))) ; analog in -> pullup, driver and digital in is disable = floating ENDM @@ -132,38 +138,48 @@ AcomFET_on MACRO clr P1.A_pwm ; set pin to low orl P1MDIN, #(1 SHL A_pwm) ; enable pin driver ENDM + AcomFET_off MACRO anl P1MDIN, #(NOT(1 SHL A_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM + BcomFET_on MACRO clr P1.B_pwm ; set pin to low orl P1MDIN, #(1 SHL B_pwm) ; enable pin driver ENDM + BcomFET_off MACRO anl P1MDIN, #(NOT(1 SHL B_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM + CcomFET_on MACRO clr P1.C_pwm ; set pin to low orl P1MDIN, #(1 SHL C_pwm) ; enable pin driver ENDM + CcomFET_off MACRO anl P1MDIN, #(NOT(1 SHL C_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM + All_comFETs_Off MACRO anl P1MDIN, #(NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm))) ; analog in -> pullup, driver and digital in is disable = floating ENDM + Set_Pwm_A MACRO mov P1SKIP, #(NOT(1 SHL A_pwm)); orl P1MDIN, #(1 SHL A_pwm) ; enable pin driver ENDM + Set_Pwm_B MACRO mov P1SKIP, #(NOT(1 SHL B_pwm)); orl P1MDIN, #(1 SHL B_pwm) ; enable pin driver ENDM + Set_Pwm_C MACRO mov P1SKIP, #(NOT(1 SHL C_pwm)); orl P1MDIN, #(1 SHL C_pwm) ; enable pin driver ENDM + Set_Pwms_Off MACRO mov P1SKIP, #P1_SKIP; ENDM @@ -209,17 +225,24 @@ ENDM Set_LED_0 MACRO ENDM + Clear_LED_0 MACRO ENDM + Set_LED_1 MACRO ENDM + Clear_LED_1 MACRO ENDM + Set_LED_2 MACRO ENDM + Clear_LED_2 MACRO ENDM + Set_LED_3 MACRO ENDM + Clear_LED_3 MACRO ENDM diff --git a/targets/Z.inc b/targets/Z.inc index 7f8a29b..c035d01 100644 --- a/targets/Z.inc +++ b/targets/Z.inc @@ -48,11 +48,8 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 0 -COMPWM_ACTIVE_HIGH EQU 1 - - -; Damping inverted, pwm inverted +PWM_ACTIVE_HIGH EQU 0 ; Pwm inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 From d4ddbb39676d7432c74ee92c8c1ac3aff48fb50e Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Thu, 4 Feb 2021 06:25:34 +0100 Subject: [PATCH 09/19] refactor: Use custom flags to clean up some layouts --- targets/Base.inc | 16 +++------- targets/E.inc | 23 ++++++++++++++- targets/O.inc | 10 ++++++- targets/W.inc | 76 +++++++----------------------------------------- 4 files changed, 45 insertions(+), 80 deletions(-) diff --git a/targets/Base.inc b/targets/Base.inc index e21cf31..f82f1b0 100644 --- a/targets/Base.inc +++ b/targets/Base.inc @@ -19,15 +19,6 @@ $if NOT CUSTOM_PWM_SETUP Initialize_Xbar MACRO mov XBR2, #40h ;; Xbar enabled mov XBR1, #02h ;; CEX0 and CEX1 routed to pins -IF ESCNO = E_ - All_pwmFETs_off ; For unlocking of HIP2103/4 driver circuits - call wait100ms - AcomFET_on - BcomFET_on - CcomFET_on - call wait1ms - All_comFETs_off -ENDIF ENDM Set_Pwm_Polarity MACRO @@ -54,6 +45,8 @@ CMP_MD EQU CMP1MD CMP_MX EQU CMP1MX ENDIF +$if NOT CUSTOM_COMP_SETUP + Initialize_Comparator MACRO mov CMP_CN0, #80h ;; Comparator enabled, no hysteresis mov CMP_MD, #00h ;; Comparator response time 100ns @@ -61,11 +54,10 @@ ENDM Read_Comp_Out MACRO mov A, CMP_CN0 ;; Read comparator output -IF ESCNO == O_ - cpl A -ENDIF ENDM +$endif + ; Set comparator multiplexer to phase A Set_Comp_Phase_A MACRO mov CMP_MX, #((A_Mux SHL 4) + Comp_Com) diff --git a/targets/E.inc b/targets/E.inc index 847f39e..a2b431a 100644 --- a/targets/E.inc +++ b/targets/E.inc @@ -91,7 +91,7 @@ A_pwm EQU 0 ;o COMP_PORT EQU 0 -$set(CUSTOM_LED) +$set(CUSTOM_PWM_SETUP, CUSTOM_LED) $include (Base.inc) @@ -121,6 +121,27 @@ P2_SKIP EQU 0FFh ; MCU specific macros * ;********************** +Initialize_Xbar MACRO + mov XBR2, #40h ;; Xbar enabled + mov XBR1, #02h ;; CEX0 and CEX1 routed to pins + + All_pwmFETs_off ;; For unlocking of HIP2103/4 driver circuits + call wait100ms + AcomFET_on + BcomFET_on + CcomFET_on + call wait1ms + All_comFETs_off +ENDM + +Set_Pwm_Polarity MACRO +IF PCA0_POWER_MODULE == PCA0CPM0 + mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) +ELSE + mov PCA0POL, #(((1 - PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) +ENDIF +ENDM + Set_LED_0 MACRO setb P0.LED_0 ENDM diff --git a/targets/O.inc b/targets/O.inc index 0a769b0..d07e875 100644 --- a/targets/O.inc +++ b/targets/O.inc @@ -91,7 +91,7 @@ A_pwm EQU 0 ;o COMP_PORT EQU 0 - +$set(CUSTOM_COMP_SETUP) $include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -100,6 +100,14 @@ P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + P1_SKIP EQU 0FFh +Initialize_Comparator MACRO + mov CMP_CN0, #80h ;; Comparator enabled, no hysteresis + mov CMP_MD, #40h ;; Comparator response time 100ns, Output polarity inverted +ENDM + +Read_Comp_Out MACRO + mov A, CMP_CN0 ;; Read comparator output +ENDM diff --git a/targets/W.inc b/targets/W.inc index 3462ba7..01a5d8f 100644 --- a/targets/W.inc +++ b/targets/W.inc @@ -28,14 +28,6 @@ ;**** **** **** **** **** -;**** **** **** **** **** -; Bootloader definitions -;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU 7 ; RTX pin ;********************* @@ -56,13 +48,8 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -Set_Pwm_Polarity MACRO -IF FETON_DELAY == 0 - mov PCA0POL, #00h ; Pwm noninverted -ELSE - mov PCA0POL, #01h ; Damping inverted, pwm noninverted -ENDIF -ENDM +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -94,6 +81,14 @@ C_pwm EQU 4 ;o ; EQU 2 ;i ; EQU 1 ;i ; EQU 0 ;i + +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 + +$set(CUSTOM_PWM_PHASE, CUSTOM_FET_TOGGLING) + +$include (Base.inc) + ; pwm outputs start as analog in -> floating ; this ensures all mosfet drivers start with floating outputs P1_DIGITAL EQU NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm)) @@ -186,20 +181,6 @@ ENDM -Set_Comp_Phase_A MACRO - mov CMP0MX, #((A_Mux) SHL 4)+((Comp_Com) SHL 0); -ENDM -Set_Comp_Phase_B MACRO - mov CMP0MX, #((B_Mux) SHL 4)+((Comp_Com) SHL 0); -ENDM -Set_Comp_Phase_C MACRO - mov CMP0MX, #((C_Mux) SHL 4)+((Comp_Com) SHL 0); -ENDM -Read_Comp_Out MACRO - mov A, CMP0CN0 ; Read comparator output -ENDM - - ;********************* ; PORT 2 definitions * @@ -209,40 +190,3 @@ DebugPin EQU 0 ;o P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh - - -;********************** -; MCU specific macros * -;********************** -Initialize_Xbar MACRO - mov XBR2, #40h ; Xbar enabled - mov XBR1, #02h ; CEX0 and CEX1 routed to pins -ENDM -Initialize_Comparator MACRO - mov CMP0CN0, #80h ; Comparator enabled, no hysteresis - mov CMP0MD, #00h ; Comparator response time 100ns -ENDM - -Set_LED_0 MACRO -ENDM - -Clear_LED_0 MACRO -ENDM - -Set_LED_1 MACRO -ENDM - -Clear_LED_1 MACRO -ENDM - -Set_LED_2 MACRO -ENDM - -Clear_LED_2 MACRO -ENDM - -Set_LED_3 MACRO -ENDM - -Clear_LED_3 MACRO -ENDM From 6c82d7dc5a1e880bf36829026b0d92812d735f50 Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Tue, 16 Feb 2021 02:10:11 +0100 Subject: [PATCH 10/19] style: Clean up layout files ordering and whitespace --- targets/A.inc | 29 +++------- targets/B.inc | 27 +++------ targets/Base.inc | 143 ++++++++++++++++++++++++++++------------------- targets/C.inc | 24 +++----- targets/D.inc | 27 +++------ targets/E.inc | 47 +++++++--------- targets/F.inc | 27 +++------ targets/G.inc | 27 +++------ targets/H.inc | 27 +++------ targets/I.inc | 25 +++------ targets/J.inc | 35 +++++------- targets/K.inc | 27 +++------ targets/L.inc | 23 +++----- targets/M.inc | 44 +++++---------- targets/N.inc | 27 +++------ targets/O.inc | 25 +++------ targets/P.inc | 28 +++------- targets/Q.inc | 34 +++++------ targets/R.inc | 27 +++------ targets/S.inc | 27 +++------ targets/T.inc | 27 +++------ targets/U.inc | 44 +++++---------- targets/V.inc | 28 ++++------ targets/W.inc | 64 ++++++++++----------- targets/Z.inc | 28 +++------- 25 files changed, 345 insertions(+), 546 deletions(-) diff --git a/targets/A.inc b/targets/A.inc index f62c116..611fe54 100644 --- a/targets/A.inc +++ b/targets/A.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -48,9 +52,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -84,30 +85,12 @@ A_com EQU 1 ;o A_pwm EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -118,3 +101,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/B.inc b/targets/B.inc index ef43558..e82e083 100644 --- a/targets/B.inc +++ b/targets/B.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -49,9 +53,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -85,28 +86,12 @@ C_pwm EQU 1 ;o C_com EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -117,3 +102,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/Base.inc b/targets/Base.inc index f82f1b0..86ab53c 100644 --- a/targets/Base.inc +++ b/targets/Base.inc @@ -1,14 +1,44 @@ - +;**** **** **** **** **** +; +; Bluejay digital ESC firmware for controlling brushless motors in multirotors +; +; Copyright 2020 Mathias Rasmussen +; Copyright 2011, 2012 Steffen Skaug +; +; This file is part of Bluejay. +; +; Bluejay is free software: you can redistribute it and/or modify +; it under the terms of the GNU General Public License as published by +; the Free Software Foundation, either version 3 of the License, or +; (at your option) any later version. +; +; Bluejay is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with Bluejay. If not, see . +; +;**** **** **** **** **** +; +; Base layout +; +; The inheriting layout should +; - Specify PWM_ACTIVE_HIGH, COMPWM_ACTIVE_HIGH and COMP_PORT +; - Set CUSTOM_* flags to override default implementation +; +;**** **** **** **** **** ;**** **** **** **** **** ; Bootloader definitions ;**** **** **** **** **** -RTX_PORT EQU P0 ; Receive/Transmit port -RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL -RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL -RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP -RTX_PIN EQU Rcp_In ; RTX pin +RTX_PORT EQU P0 ; Receive/Transmit port +RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL +RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL +RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP +RTX_PIN EQU Rcp_In ; RTX pin ;**** **** **** **** **** @@ -17,8 +47,8 @@ RTX_PIN EQU Rcp_In ; RTX pin $if NOT CUSTOM_PWM_SETUP Initialize_Xbar MACRO - mov XBR2, #40h ;; Xbar enabled - mov XBR1, #02h ;; CEX0 and CEX1 routed to pins + mov XBR2, #40h ;; Xbar enabled + mov XBR1, #02h ;; CEX0 and CEX1 routed to pins ENDM Set_Pwm_Polarity MACRO @@ -36,41 +66,41 @@ $endif ; Comparator setup and phase change ;**** **** **** **** **** IF COMP_PORT == 0 -CMP_CN0 EQU CMP0CN0 -CMP_MD EQU CMP0MD -CMP_MX EQU CMP0MX +CMP_CN0 EQU CMP0CN0 +CMP_MD EQU CMP0MD +CMP_MX EQU CMP0MX ELSE -CMP_CN0 EQU CMP1CN0 -CMP_MD EQU CMP1MD -CMP_MX EQU CMP1MX +CMP_CN0 EQU CMP1CN0 +CMP_MD EQU CMP1MD +CMP_MX EQU CMP1MX ENDIF $if NOT CUSTOM_COMP_SETUP Initialize_Comparator MACRO - mov CMP_CN0, #80h ;; Comparator enabled, no hysteresis - mov CMP_MD, #00h ;; Comparator response time 100ns + mov CMP_CN0, #80h ;; Comparator enabled, no hysteresis + mov CMP_MD, #00h ;; Comparator response time 100ns ENDM Read_Comp_Out MACRO - mov A, CMP_CN0 ;; Read comparator output + mov A, CMP_CN0 ;; Read comparator output ENDM $endif ; Set comparator multiplexer to phase A Set_Comp_Phase_A MACRO - mov CMP_MX, #((A_Mux SHL 4) + Comp_Com) + mov CMP_MX, #((A_Mux SHL 4) + Comp_Com) ENDM ; Set comparator multiplexer to phase B Set_Comp_Phase_B MACRO - mov CMP_MX, #((B_Mux SHL 4) + Comp_Com) + mov CMP_MX, #((B_Mux SHL 4) + Comp_Com) ENDM ; Set comparator multiplexer to phase C Set_Comp_Phase_C MACRO - mov CMP_MX, #((C_Mux SHL 4) + Comp_Com) + mov CMP_MX, #((C_Mux SHL 4) + Comp_Com) ENDM @@ -122,22 +152,22 @@ $endif ;**** **** **** **** **** -; Fets on/off toggling +; Toggling FETs on/off ;**** **** **** **** **** $if NOT CUSTOM_FET_TOGGLING -IF PWM_ACTIVE_HIGH == 1 ; fet active high +IF PWM_ACTIVE_HIGH == 1 ; PWM FET active high pON LIT 'setb' pOFF LIT 'clr' -ELSE ; fet active low +ELSE ; PWM FET active low pON LIT 'clr' pOFF LIT 'setb' ENDIF -IF COMPWM_ACTIVE_HIGH == 1 ; comfet active high +IF COMPWM_ACTIVE_HIGH == 1 ; COM FET active high cON LIT 'setb' cOFF LIT 'clr' -ELSE ; comfet active low +ELSE ; COM FET active low cON LIT 'clr' cOFF LIT 'setb' ENDIF @@ -194,7 +224,6 @@ All_pwmFETs_Off MACRO ENDM - AcomFET_on MACRO IF FETON_DELAY == 0 pOFF P_ApwmFET @@ -237,39 +266,11 @@ ENDM $endif -$if NOT CUSTOM_LED - -Set_LED_0 MACRO -ENDM - -Clear_LED_0 MACRO -ENDM - -Set_LED_1 MACRO -ENDM - -Clear_LED_1 MACRO -ENDM - -Set_LED_2 MACRO -ENDM - -Clear_LED_2 MACRO -ENDM - -Set_LED_3 MACRO -ENDM - -Clear_LED_3 MACRO -ENDM - -$endif - ;**** **** **** **** **** ; ADC and temperature measurement ;**** **** **** **** **** -TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) -TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC +TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1) +TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC Initialize_Adc MACRO mov REF0CN, #0Ch ;; Set vdd (3.3V) as reference. Enable temp sensor and bias @@ -296,3 +297,33 @@ Stop_Adc MACRO ENDM +;**** **** **** **** **** +; LEDs +;**** **** **** **** **** +$if NOT CUSTOM_LED + +Set_LED_0 MACRO +ENDM + +Clear_LED_0 MACRO +ENDM + +Set_LED_1 MACRO +ENDM + +Clear_LED_1 MACRO +ENDM + +Set_LED_2 MACRO +ENDM + +Clear_LED_2 MACRO +ENDM + +Set_LED_3 MACRO +ENDM + +Clear_LED_3 MACRO +ENDM + +$endif diff --git a/targets/C.inc b/targets/C.inc index 416ba1b..9e5eb4e 100644 --- a/targets/C.inc +++ b/targets/C.inc @@ -27,8 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 ;********************* @@ -44,15 +47,11 @@ Comp_Com EQU 2 ;i Rcp_In EQU 0 ;i - P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU NOT((1 SHL A_pwm) + (1 SHL A_com)) P0_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL A_com) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -86,7 +85,6 @@ B_com EQU 1 ;o B_pwm EQU 0 ;o - P_ApwmFET EQU P0.A_pwm P_AcomFET EQU P0.A_com P_BpwmFET EQU P1.B_pwm @@ -94,12 +92,6 @@ P_BcomFET EQU P1.B_com P_CpwmFET EQU P1.C_pwm P_CcomFET EQU P1.C_com -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - -$set(CUSTOM_PWM_PHASE) - -$include (Base.inc) P1_DIGITAL EQU (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h @@ -107,7 +99,6 @@ P1_PUSHPULL EQU (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET @@ -147,8 +138,6 @@ Set_Pwms_Off MACRO ENDM - - ;********************* ; PORT 2 definitions * ;********************* @@ -159,3 +148,8 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$set(CUSTOM_PWM_PHASE) +$include (Base.inc) diff --git a/targets/D.inc b/targets/D.inc index 7303830..a111e05 100644 --- a/targets/D.inc +++ b/targets/D.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -48,9 +52,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -84,28 +85,12 @@ A_com EQU 1 ;o A_pwm EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -116,3 +101,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/E.inc b/targets/E.inc index a2b431a..26d498a 100644 --- a/targets/E.inc +++ b/targets/E.inc @@ -27,8 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 ;********************* @@ -48,9 +51,6 @@ P0_INIT EQU NOT((1 SHL LED_0) + (1 SHL LED_1)) P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -84,29 +84,12 @@ A_com EQU 1 ;o A_pwm EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - -$set(CUSTOM_PWM_SETUP, CUSTOM_LED) - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) + (1 SHL LED_2) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) + (1 SHL LED_2) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -117,20 +100,19 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - +;**** **** **** **** **** +; MCU specific +;**** **** **** **** **** Initialize_Xbar MACRO mov XBR2, #40h ;; Xbar enabled mov XBR1, #02h ;; CEX0 and CEX1 routed to pins All_pwmFETs_off ;; For unlocking of HIP2103/4 driver circuits - call wait100ms + call wait100ms AcomFET_on BcomFET_on CcomFET_on - call wait1ms + call wait1ms All_comFETs_off ENDM @@ -142,6 +124,10 @@ ELSE ENDIF ENDM + +;**** **** **** **** **** +; LED configuration +;**** **** **** **** **** Set_LED_0 MACRO setb P0.LED_0 ENDM @@ -171,3 +157,10 @@ ENDM Clear_LED_3 MACRO ENDM + + +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$set(CUSTOM_PWM_SETUP, CUSTOM_LED) +$include (Base.inc) diff --git a/targets/F.inc b/targets/F.inc index 43aaeab..07a2074 100644 --- a/targets/F.inc +++ b/targets/F.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -48,9 +52,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -84,28 +85,12 @@ A_com EQU 1 ;o A_pwm EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -116,3 +101,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/G.inc b/targets/G.inc index 4252f5d..93c2ad4 100644 --- a/targets/G.inc +++ b/targets/G.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -48,9 +52,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -84,28 +85,12 @@ A_com EQU 1 ;o A_pwm EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -116,3 +101,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/H.inc b/targets/H.inc index e55a88e..bfca774 100644 --- a/targets/H.inc +++ b/targets/H.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -49,9 +53,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -85,28 +86,12 @@ B_com EQU 1 ;o C_com EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -117,3 +102,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/I.inc b/targets/I.inc index 9c3d088..b8ab17c 100644 --- a/targets/I.inc +++ b/targets/I.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -48,9 +52,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -83,26 +84,12 @@ B_pwm EQU 1 ;o C_pwm EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -113,3 +100,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/J.inc b/targets/J.inc index 70a2169..02a43a1 100644 --- a/targets/J.inc +++ b/targets/J.inc @@ -27,8 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 ;********************* @@ -48,9 +51,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -83,25 +83,12 @@ B_pwm EQU 1 ;o A_pwm EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - -$set(CUSTOM_LED) - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - ;********************* ; PORT 2 definitions * ;********************* @@ -112,10 +99,9 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - +;**** **** **** **** **** +; LED configuration +;**** **** **** **** **** Set_LED_0 MACRO clr P0.LED_0 ENDM @@ -145,3 +131,10 @@ ENDM Clear_LED_3 MACRO ENDM + + +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$set(CUSTOM_LED) +$include (Base.inc) diff --git a/targets/K.inc b/targets/K.inc index 4b7f45c..48f6992 100644 --- a/targets/K.inc +++ b/targets/K.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -48,9 +52,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -84,28 +85,12 @@ B_com EQU 1 ;o A_com EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -116,3 +101,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/L.inc b/targets/L.inc index 0376a18..a26f558 100644 --- a/targets/L.inc +++ b/targets/L.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -48,9 +52,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -83,24 +84,12 @@ B_pwm EQU 1 ;o C_pwm EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - ;********************* ; PORT 2 definitions * ;********************* @@ -111,3 +100,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/M.inc b/targets/M.inc index 0d738df..b6dc880 100644 --- a/targets/M.inc +++ b/targets/M.inc @@ -27,9 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - - +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 ;********************* @@ -49,9 +51,6 @@ P0_INIT EQU NOT(1 SHL LED_0) P0_PUSHPULL EQU (1 SHL LED_0) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -72,7 +71,6 @@ ELSE ENDIF - ;********************* ; PORT 1 definitions * ;********************* @@ -86,29 +84,12 @@ A_pwm EQU 1 ;o ; EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - -$set(CUSTOM_LED) - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -119,13 +100,9 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - +;**** **** **** **** **** +; LED configuration +;**** **** **** **** **** Set_LED_0 MACRO setb P0.LED_0 ENDM @@ -151,3 +128,10 @@ ENDM Clear_LED_3 MACRO ENDM + + +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$set(CUSTOM_LED) +$include (Base.inc) diff --git a/targets/N.inc b/targets/N.inc index 7ea0803..cd4147c 100644 --- a/targets/N.inc +++ b/targets/N.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -49,9 +53,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -85,28 +86,12 @@ A_pwm EQU 1 ;o A_com EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -117,3 +102,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/O.inc b/targets/O.inc index d07e875..bffcf9d 100644 --- a/targets/O.inc +++ b/targets/O.inc @@ -27,8 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted - +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 ;********************* @@ -48,9 +51,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -84,16 +84,6 @@ A_com EQU 1 ;o A_pwm EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - -$set(CUSTOM_COMP_SETUP) -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -110,8 +100,6 @@ Read_Comp_Out MACRO ENDM - - ;********************* ; PORT 2 definitions * ;********************* @@ -122,3 +110,8 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$set(CUSTOM_COMP_SETUP) +$include (Base.inc) diff --git a/targets/P.inc b/targets/P.inc index b6cdbd9..1419448 100644 --- a/targets/P.inc +++ b/targets/P.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -49,9 +53,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -72,7 +73,6 @@ ELSE ENDIF - ;********************* ; PORT 1 definitions * ;********************* @@ -86,28 +86,12 @@ A_pwm EQU 1 ;o ; EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -118,3 +102,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/Q.inc b/targets/Q.inc index ed7292c..c0c7652 100644 --- a/targets/Q.inc +++ b/targets/Q.inc @@ -27,8 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 1 ;********************* @@ -44,15 +47,11 @@ Rcp_In EQU 1 ;i ; EQU 0 ;i - P0_DIGITAL EQU 0FFh P0_INIT EQU (1 SHL Rcp_In) P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -86,7 +85,6 @@ B_com EQU 1 ;o A_com EQU 0 ;o - P_ApwmFET EQU P0.A_pwm P_AcomFET EQU P1.A_com P_BpwmFET EQU P0.B_pwm @@ -94,12 +92,6 @@ P_BcomFET EQU P1.B_com P_CpwmFET EQU P0.C_pwm P_CcomFET EQU P1.C_com -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 1 - -$set(CUSTOM_PWM_PHASE, CUSTOM_LED) - -$include (Base.inc) P1_DIGITAL EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h @@ -107,7 +99,6 @@ P1_PUSHPULL EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET @@ -147,7 +138,6 @@ Set_Pwms_Off MACRO ENDM - ;********************* ; PORT 2 definitions * ;********************* @@ -158,12 +148,9 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - +;**** **** **** **** **** +; LED configuration +;**** **** **** **** **** Set_LED_0 MACRO setb P0.LED_0 ENDM @@ -191,3 +178,10 @@ ENDM Clear_LED_3 MACRO ENDM + + +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$set(CUSTOM_PWM_PHASE, CUSTOM_LED) +$include (Base.inc) diff --git a/targets/R.inc b/targets/R.inc index 113e921..436e370 100644 --- a/targets/R.inc +++ b/targets/R.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -48,9 +52,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -83,28 +84,12 @@ B_pwm EQU 1 ;o C_pwm EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -115,3 +100,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/S.inc b/targets/S.inc index 8e3752a..5940b3f 100644 --- a/targets/S.inc +++ b/targets/S.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -48,9 +52,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -84,28 +85,12 @@ A_pwm EQU 1 ;o A_com EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -116,3 +101,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/T.inc b/targets/T.inc index de1310b..23ae520 100644 --- a/targets/T.inc +++ b/targets/T.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -49,9 +53,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -85,28 +86,12 @@ B_com EQU 1 ;o C_com EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -117,3 +102,7 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) diff --git a/targets/U.inc b/targets/U.inc index 5ad6297..978fac1 100644 --- a/targets/U.inc +++ b/targets/U.inc @@ -27,9 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - - +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 ;********************* @@ -49,9 +51,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -72,7 +71,6 @@ ELSE ENDIF - ;********************* ; PORT 1 definitions * ;********************* @@ -86,29 +84,12 @@ A_pwm EQU 1 ;o ; EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - -$set(CUSTOM_LED) - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU 00h P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -119,13 +100,9 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh -;********************** -; MCU specific macros * -;********************** - - - - +;**** **** **** **** **** +; LED configuration +;**** **** **** **** **** Set_LED_0 MACRO clr P0.LED_0 ENDM @@ -155,3 +132,10 @@ ENDM Clear_LED_3 MACRO ENDM + + +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$set(CUSTOM_LED) +$include (Base.inc) diff --git a/targets/V.inc b/targets/V.inc index 1535c50..1306413 100644 --- a/targets/V.inc +++ b/targets/V.inc @@ -27,8 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 ;********************* @@ -44,15 +47,11 @@ B_Mux EQU 1 ;i A_Mux EQU 0 ;i - P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) P0_INIT EQU NOT(1 SHL C_com) P0_PUSHPULL EQU (1 SHL C_com) P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -80,13 +79,12 @@ ENDIF A_pwm EQU 6 ;i A_com EQU 5 ;i B_pwm EQU 4 ;o -; EQU 3 ;o -; EQU 2 ;o +; EQU 3 ;o +; EQU 2 ;o B_com EQU 1 ;o C_pwm EQU 0 ;o - P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com P_BpwmFET EQU P1.B_pwm @@ -94,12 +92,6 @@ P_BcomFET EQU P1.B_com P_CpwmFET EQU P1.C_pwm P_CcomFET EQU P0.C_com -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - -$set(CUSTOM_PWM_PHASE) - -$include (Base.inc) P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) P1_INIT EQU 00h @@ -107,7 +99,6 @@ P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + P1_SKIP EQU 0FFh - Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET @@ -147,8 +138,6 @@ Set_Pwms_Off MACRO ENDM - - ;********************* ; PORT 2 definitions * ;********************* @@ -159,3 +148,8 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$set(CUSTOM_PWM_PHASE) +$include (Base.inc) diff --git a/targets/W.inc b/targets/W.inc index 01a5d8f..db35f8f 100644 --- a/targets/W.inc +++ b/targets/W.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 ;********************* @@ -48,9 +52,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 PCA0_POWER_L EQU PCA0CPL0 @@ -82,12 +83,6 @@ C_pwm EQU 4 ;o ; EQU 1 ;i ; EQU 0 ;i -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - -$set(CUSTOM_PWM_PHASE, CUSTOM_FET_TOGGLING) - -$include (Base.inc) ; pwm outputs start as analog in -> floating ; this ensures all mosfet drivers start with floating outputs @@ -95,69 +90,69 @@ P1_DIGITAL EQU NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm)) P1_INIT EQU 00h P1_PUSHPULL EQU ((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm)) ; -P1_SKIP EQU 0FFh +P1_SKIP EQU 0FFh ApwmFET_on MACRO - setb P1.A_pwm ; set pin to high - orl P1MDIN, #(1 SHL A_pwm) ; enable pin driver + setb P1.A_pwm ; set pin to high + orl P1MDIN, #(1 SHL A_pwm) ; enable pin driver ENDM ApwmFET_off MACRO - anl P1MDIN, #(NOT(1 SHL A_pwm)) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT(1 SHL A_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM BpwmFET_on MACRO - setb P1.B_pwm ; set pin to high - orl P1MDIN, #(1 SHL B_pwm) ; enable pin driver + setb P1.B_pwm ; set pin to high + orl P1MDIN, #(1 SHL B_pwm) ; enable pin driver ENDM BpwmFET_off MACRO - anl P1MDIN, #(NOT(1 SHL B_pwm)) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT(1 SHL B_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM CpwmFET_on MACRO - setb P1.C_pwm ; set pin to high - orl P1MDIN, #(1 SHL C_pwm) ; enable pin driver + setb P1.C_pwm ; set pin to high + orl P1MDIN, #(1 SHL C_pwm) ; enable pin driver ENDM CpwmFET_off MACRO - anl P1MDIN, #(NOT(1 SHL C_pwm)) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT(1 SHL C_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM All_pwmFETs_Off MACRO - anl P1MDIN, #(NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm))) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm))) ; analog in -> pullup, driver and digital in is disable = floating ENDM AcomFET_on MACRO - clr P1.A_pwm ; set pin to low - orl P1MDIN, #(1 SHL A_pwm) ; enable pin driver + clr P1.A_pwm ; set pin to low + orl P1MDIN, #(1 SHL A_pwm) ; enable pin driver ENDM AcomFET_off MACRO - anl P1MDIN, #(NOT(1 SHL A_pwm)) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT(1 SHL A_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM BcomFET_on MACRO - clr P1.B_pwm ; set pin to low - orl P1MDIN, #(1 SHL B_pwm) ; enable pin driver + clr P1.B_pwm ; set pin to low + orl P1MDIN, #(1 SHL B_pwm) ; enable pin driver ENDM BcomFET_off MACRO - anl P1MDIN, #(NOT(1 SHL B_pwm)) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT(1 SHL B_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM CcomFET_on MACRO - clr P1.C_pwm ; set pin to low - orl P1MDIN, #(1 SHL C_pwm) ; enable pin driver + clr P1.C_pwm ; set pin to low + orl P1MDIN, #(1 SHL C_pwm) ; enable pin driver ENDM CcomFET_off MACRO - anl P1MDIN, #(NOT(1 SHL C_pwm)) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT(1 SHL C_pwm)) ; analog in -> pullup, driver and digital in is disable = floating ENDM All_comFETs_Off MACRO - anl P1MDIN, #(NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm))) ; analog in -> pullup, driver and digital in is disable = floating + anl P1MDIN, #(NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm))) ; analog in -> pullup, driver and digital in is disable = floating ENDM Set_Pwm_A MACRO @@ -180,8 +175,6 @@ Set_Pwms_Off MACRO ENDM - - ;********************* ; PORT 2 definitions * ;********************* @@ -190,3 +183,10 @@ DebugPin EQU 0 ;o P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh + + +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$set(CUSTOM_PWM_PHASE, CUSTOM_FET_TOGGLING) +$include (Base.inc) diff --git a/targets/Z.inc b/targets/Z.inc index c035d01..0d9978c 100644 --- a/targets/Z.inc +++ b/targets/Z.inc @@ -27,7 +27,11 @@ ; ;**** **** **** **** **** +PWM_ACTIVE_HIGH EQU 0 ; Pwm inverted +COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted +; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port +COMP_PORT EQU 0 @@ -48,9 +52,6 @@ P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -PWM_ACTIVE_HIGH EQU 0 ; Pwm inverted -COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -84,28 +85,12 @@ A_pwm EQU 1 ;o A_com EQU 0 ;o - - - -; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 - - - -$include (Base.inc) - P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_INIT EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) P1_SKIP EQU 0FFh - - - - - - ;********************* ; PORT 2 definitions * ;********************* @@ -115,3 +100,8 @@ P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh + +;**** **** **** **** **** +; Inherit base layout +;**** **** **** **** **** +$include (Base.inc) From 87755932e500b094d91c8a04c67e8ae50c3d84a4 Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Tue, 16 Feb 2021 03:27:02 +0100 Subject: [PATCH 11/19] refactor: Rename targets to Layouts --- Common.inc | 52 +++++++++++++++++------------------ {targets => Layouts}/A.inc | 0 {targets => Layouts}/B.inc | 0 {targets => Layouts}/Base.inc | 0 {targets => Layouts}/C.inc | 0 {targets => Layouts}/D.inc | 0 {targets => Layouts}/E.inc | 0 {targets => Layouts}/F.inc | 0 {targets => Layouts}/G.inc | 0 {targets => Layouts}/H.inc | 0 {targets => Layouts}/I.inc | 0 {targets => Layouts}/J.inc | 0 {targets => Layouts}/K.inc | 0 {targets => Layouts}/L.inc | 0 {targets => Layouts}/M.inc | 0 {targets => Layouts}/N.inc | 0 {targets => Layouts}/O.inc | 0 {targets => Layouts}/P.inc | 0 {targets => Layouts}/Q.inc | 0 {targets => Layouts}/R.inc | 0 {targets => Layouts}/S.inc | 0 {targets => Layouts}/T.inc | 0 {targets => Layouts}/U.inc | 0 {targets => Layouts}/V.inc | 0 {targets => Layouts}/W.inc | 0 {targets => Layouts}/Z.inc | 0 Makefile | 2 +- 27 files changed, 27 insertions(+), 27 deletions(-) rename {targets => Layouts}/A.inc (100%) rename {targets => Layouts}/B.inc (100%) rename {targets => Layouts}/Base.inc (100%) rename {targets => Layouts}/C.inc (100%) rename {targets => Layouts}/D.inc (100%) rename {targets => Layouts}/E.inc (100%) rename {targets => Layouts}/F.inc (100%) rename {targets => Layouts}/G.inc (100%) rename {targets => Layouts}/H.inc (100%) rename {targets => Layouts}/I.inc (100%) rename {targets => Layouts}/J.inc (100%) rename {targets => Layouts}/K.inc (100%) rename {targets => Layouts}/L.inc (100%) rename {targets => Layouts}/M.inc (100%) rename {targets => Layouts}/N.inc (100%) rename {targets => Layouts}/O.inc (100%) rename {targets => Layouts}/P.inc (100%) rename {targets => Layouts}/Q.inc (100%) rename {targets => Layouts}/R.inc (100%) rename {targets => Layouts}/S.inc (100%) rename {targets => Layouts}/T.inc (100%) rename {targets => Layouts}/U.inc (100%) rename {targets => Layouts}/V.inc (100%) rename {targets => Layouts}/W.inc (100%) rename {targets => Layouts}/Z.inc (100%) diff --git a/Common.inc b/Common.inc index d88bcf1..adece9e 100644 --- a/Common.inc +++ b/Common.inc @@ -42,57 +42,57 @@ ENDIF ;**** **** **** **** **** ; ESC selection statements IF ESCNO == A_ -$include (targets/A.inc) ; Select pinout A +$include (Layouts/A.inc) ; Select pinout A ELSEIF ESCNO == B_ -$include (targets/B.inc) ; Select pinout B +$include (Layouts/B.inc) ; Select pinout B ELSEIF ESCNO == C_ -$include (targets/C.inc) ; Select pinout C +$include (Layouts/C.inc) ; Select pinout C ELSEIF ESCNO == D_ -$include (targets/D.inc) ; Select pinout D +$include (Layouts/D.inc) ; Select pinout D ELSEIF ESCNO == E_ -$include (targets/E.inc) ; Select pinout E +$include (Layouts/E.inc) ; Select pinout E ELSEIF ESCNO == F_ -$include (targets/F.inc) ; Select pinout F +$include (Layouts/F.inc) ; Select pinout F ELSEIF ESCNO == G_ -$include (targets/G.inc) ; Select pinout G +$include (Layouts/G.inc) ; Select pinout G ELSEIF ESCNO == H_ -$include (targets/H.inc) ; Select pinout H +$include (Layouts/H.inc) ; Select pinout H ELSEIF ESCNO == I_ -$include (targets/I.inc) ; Select pinout I +$include (Layouts/I.inc) ; Select pinout I ELSEIF ESCNO == J_ -$include (targets/J.inc) ; Select pinout J +$include (Layouts/J.inc) ; Select pinout J ELSEIF ESCNO == K_ -$include (targets/K.inc) ; Select pinout K +$include (Layouts/K.inc) ; Select pinout K ELSEIF ESCNO == L_ -$include (targets/L.inc) ; Select pinout L +$include (Layouts/L.inc) ; Select pinout L ELSEIF ESCNO == M_ -$include (targets/M.inc) ; Select pinout M +$include (Layouts/M.inc) ; Select pinout M ELSEIF ESCNO == N_ -$include (targets/N.inc) ; Select pinout N +$include (Layouts/N.inc) ; Select pinout N ELSEIF ESCNO == O_ -$include (targets/O.inc) ; Select pinout O +$include (Layouts/O.inc) ; Select pinout O ELSEIF ESCNO == P_ -$include (targets/P.inc) ; Select pinout P +$include (Layouts/P.inc) ; Select pinout P ELSEIF ESCNO == Q_ -$include (targets/Q.inc) ; Select pinout Q +$include (Layouts/Q.inc) ; Select pinout Q ELSEIF ESCNO == R_ -$include (targets/R.inc) ; Select pinout R +$include (Layouts/R.inc) ; Select pinout R ELSEIF ESCNO == S_ -$include (targets/S.inc) ; Select pinout S +$include (Layouts/S.inc) ; Select pinout S ELSEIF ESCNO == T_ -$include (targets/T.inc) ; Select pinout T +$include (Layouts/T.inc) ; Select pinout T ELSEIF ESCNO == U_ -$include (targets/U.inc) ; Select pinout U +$include (Layouts/U.inc) ; Select pinout U ELSEIF ESCNO == V_ -$include (targets/V.inc) ; Select pinout V +$include (Layouts/V.inc) ; Select pinout V ELSEIF ESCNO == W_ -$include (targets/W.inc) ; Select pinout W +$include (Layouts/W.inc) ; Select pinout W ;ELSEIF ESCNO == X_ -;$include (targets/X.inc) ; Select pinout X +;$include (Layouts/X.inc) ; Select pinout X ;ELSEIF ESCNO == Y_ -;$include (targets/Y.inc) ; Select pinout Y +;$include (Layouts/Y.inc) ; Select pinout Y ELSEIF ESCNO == Z_ -$include (targets/Z.inc) ; Select pinout Z +$include (Layouts/Z.inc) ; Select pinout Z ENDIF SIGNATURE_001 EQU 0E8h ; Device signature diff --git a/targets/A.inc b/Layouts/A.inc similarity index 100% rename from targets/A.inc rename to Layouts/A.inc diff --git a/targets/B.inc b/Layouts/B.inc similarity index 100% rename from targets/B.inc rename to Layouts/B.inc diff --git a/targets/Base.inc b/Layouts/Base.inc similarity index 100% rename from targets/Base.inc rename to Layouts/Base.inc diff --git a/targets/C.inc b/Layouts/C.inc similarity index 100% rename from targets/C.inc rename to Layouts/C.inc diff --git a/targets/D.inc b/Layouts/D.inc similarity index 100% rename from targets/D.inc rename to Layouts/D.inc diff --git a/targets/E.inc b/Layouts/E.inc similarity index 100% rename from targets/E.inc rename to Layouts/E.inc diff --git a/targets/F.inc b/Layouts/F.inc similarity index 100% rename from targets/F.inc rename to Layouts/F.inc diff --git a/targets/G.inc b/Layouts/G.inc similarity index 100% rename from targets/G.inc rename to Layouts/G.inc diff --git a/targets/H.inc b/Layouts/H.inc similarity index 100% rename from targets/H.inc rename to Layouts/H.inc diff --git a/targets/I.inc b/Layouts/I.inc similarity index 100% rename from targets/I.inc rename to Layouts/I.inc diff --git a/targets/J.inc b/Layouts/J.inc similarity index 100% rename from targets/J.inc rename to Layouts/J.inc diff --git a/targets/K.inc b/Layouts/K.inc similarity index 100% rename from targets/K.inc rename to Layouts/K.inc diff --git a/targets/L.inc b/Layouts/L.inc similarity index 100% rename from targets/L.inc rename to Layouts/L.inc diff --git a/targets/M.inc b/Layouts/M.inc similarity index 100% rename from targets/M.inc rename to Layouts/M.inc diff --git a/targets/N.inc b/Layouts/N.inc similarity index 100% rename from targets/N.inc rename to Layouts/N.inc diff --git a/targets/O.inc b/Layouts/O.inc similarity index 100% rename from targets/O.inc rename to Layouts/O.inc diff --git a/targets/P.inc b/Layouts/P.inc similarity index 100% rename from targets/P.inc rename to Layouts/P.inc diff --git a/targets/Q.inc b/Layouts/Q.inc similarity index 100% rename from targets/Q.inc rename to Layouts/Q.inc diff --git a/targets/R.inc b/Layouts/R.inc similarity index 100% rename from targets/R.inc rename to Layouts/R.inc diff --git a/targets/S.inc b/Layouts/S.inc similarity index 100% rename from targets/S.inc rename to Layouts/S.inc diff --git a/targets/T.inc b/Layouts/T.inc similarity index 100% rename from targets/T.inc rename to Layouts/T.inc diff --git a/targets/U.inc b/Layouts/U.inc similarity index 100% rename from targets/U.inc rename to Layouts/U.inc diff --git a/targets/V.inc b/Layouts/V.inc similarity index 100% rename from targets/V.inc rename to Layouts/V.inc diff --git a/targets/W.inc b/Layouts/W.inc similarity index 100% rename from targets/W.inc rename to Layouts/W.inc diff --git a/targets/Z.inc b/Layouts/Z.inc similarity index 100% rename from targets/Z.inc rename to Layouts/Z.inc diff --git a/Makefile b/Makefile index 5361699..c197d36 100644 --- a/Makefile +++ b/Makefile @@ -38,7 +38,7 @@ LX51_FLAGS = # Source files ASM_SRC = Bluejay.asm -ASM_INC = $(LAYOUTS:%=targets/%.inc) targets/Base.inc Common.inc BLHeliBootLoad.inc Silabs/SI_EFM8BB1_Defs.inc Silabs/SI_EFM8BB2_Defs.inc +ASM_INC = $(LAYOUTS:%=Layouts/%.inc) Layouts/Base.inc Common.inc BLHeliBootLoad.inc Silabs/SI_EFM8BB1_Defs.inc Silabs/SI_EFM8BB2_Defs.inc # Check that wine/simplicity studio is available EXECUTABLES = $(WINE_BIN) $(AX51_BIN) $(LX51_BIN) $(OX51_BIN) From 5ec8541e9ae145fadaaf50e943545cd7124c0f27 Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Tue, 16 Feb 2021 18:35:42 +0100 Subject: [PATCH 12/19] refactor: Move pwm updating to base file --- Bluejay.asm | 12 ++++++------ Common.inc | 16 ---------------- Layouts/Base.inc | 40 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 46 insertions(+), 22 deletions(-) diff --git a/Bluejay.asm b/Bluejay.asm index 5d59638..7f89a02 100644 --- a/Bluejay.asm +++ b/Bluejay.asm @@ -1136,19 +1136,19 @@ ENDIF ; Set power pwm auto-reload registers IF PWM_BITS_H != 0 - mov PCA0_POWER_L, Power_Pwm_Reg_L - mov PCA0_POWER_H, Power_Pwm_Reg_H + Set_Power_Pwm_Reg_L Power_Pwm_Reg_L + Set_Power_Pwm_Reg_H Power_Pwm_Reg_H ELSE - mov PCA0_POWER_H, Power_Pwm_Reg_L + Set_Power_Pwm_Reg_H Power_Pwm_Reg_L ENDIF IF FETON_DELAY != 0 ; Set damp pwm auto-reload registers IF PWM_BITS_H != 0 - mov PCA0_DAMP_L, Damp_Pwm_Reg_L - mov PCA0_DAMP_H, Damp_Pwm_Reg_H + Set_Damp_Pwm_Reg_L Damp_Pwm_Reg_L + Set_Damp_Pwm_Reg_H Damp_Pwm_Reg_H ELSE - mov PCA0_DAMP_H, Damp_Pwm_Reg_L + Set_Damp_Pwm_Reg_H Damp_Pwm_Reg_L ENDIF ENDIF diff --git a/Common.inc b/Common.inc index adece9e..809a36a 100644 --- a/Common.inc +++ b/Common.inc @@ -165,22 +165,6 @@ ELSE ENDIF ENDM -Enable_Power_Pwm_Module MACRO -IF FETON_DELAY == 0 - mov PCA0_POWER_MODULE, #4Ah ;; Enable comparator of module, enable match, set pwm mode -ELSE - mov PCA0_POWER_MODULE, #42h ;; Enable comparator of module, set pwm mode -ENDIF -ENDM - -Enable_Damp_Pwm_Module MACRO -IF FETON_DELAY == 0 - mov PCA0_DAMP_MODULE, #00h ;; Disable -ELSE - mov PCA0_DAMP_MODULE, #42h ;; Enable comparator of module, set pwm mode -ENDIF -ENDM - Clear_COVF_Interrupt MACRO anl PCA0PWM, #0DFh ENDM diff --git a/Layouts/Base.inc b/Layouts/Base.inc index 86ab53c..2f9d8e8 100644 --- a/Layouts/Base.inc +++ b/Layouts/Base.inc @@ -62,6 +62,46 @@ ENDM $endif +;**** **** **** **** **** +; PWM channels and updating +;**** **** **** **** **** +$if NOT CUSTOM_PWM_UPDATE + +Enable_Power_Pwm_Module MACRO +IF FETON_DELAY == 0 + mov PCA0_POWER_MODULE, #4Ah ;; Enable comparator of module, enable match, set pwm mode +ELSE + mov PCA0_POWER_MODULE, #42h ;; Enable comparator of module, set pwm mode +ENDIF +ENDM + +Enable_Damp_Pwm_Module MACRO +IF FETON_DELAY == 0 + mov PCA0_DAMP_MODULE, #00h ;; Disable +ELSE + mov PCA0_DAMP_MODULE, #42h ;; Enable comparator of module, set pwm mode +ENDIF +ENDM + +Set_Power_Pwm_Reg_L MACRO value + mov PCA0_POWER_L, value +ENDM + +Set_Power_Pwm_Reg_H MACRO value + mov PCA0_POWER_H, value +ENDM + +Set_Damp_Pwm_Reg_L MACRO value + mov PCA0_DAMP_L, value +ENDM + +Set_Damp_Pwm_Reg_H MACRO value + mov PCA0_DAMP_H, value +ENDM + +$endif + + ;**** **** **** **** **** ; Comparator setup and phase change ;**** **** **** **** **** From 55cec914d442bec866320e24cce0f2c3b1d466ec Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Tue, 16 Feb 2021 22:46:33 +0100 Subject: [PATCH 13/19] style: Reformat ESC pinout table --- Bluejay.asm | 51 +++++++++++++++++++++++++++------------------------ 1 file changed, 27 insertions(+), 24 deletions(-) diff --git a/Bluejay.asm b/Bluejay.asm index 7f89a02..b76db73 100644 --- a/Bluejay.asm +++ b/Bluejay.asm @@ -61,32 +61,35 @@ $NOMOD51 ; ;**** **** **** **** **** ; List of enumerated supported ESCs -A_ EQU 1 ; X X RC X MC MB MA CC X X Cc Cp Bc Bp Ac Ap -B_ EQU 2 ; X X RC X MC MB MA CC X X Ap Ac Bp Bc Cp Cc -C_ EQU 3 ; Ac Ap MC MB MA CC X RC X X X X Cc Cp Bc Bp -D_ EQU 4 ; X X RC X CC MA MC MB X X Cc Cp Bc Bp Ac Ap Com fets inverted -E_ EQU 5 ; L1 L0 RC X MC MB MA CC X L2 Cc Cp Bc Bp Ac Ap A with LEDs -F_ EQU 6 ; X X RC X MA MB MC CC X X Cc Cp Bc Bp Ac Ap -G_ EQU 7 ; X X RC X CC MA MC MB X X Cc Cp Bc Bp Ac Ap Like D, but non-inverted com fets -H_ EQU 8 ; RC X X X MA MB CC MC X Ap Bp Cp X Ac Bc Cc -I_ EQU 9 ; X X RC X MC MB MA CC X X Ac Bc Cc Ap Bp Cp -J_ EQU 10 ; L2 L1 L0 RC CC MB MC MA X X Cc Bc Ac Cp Bp Ap LEDs -K_ EQU 11 ; X X MC X MB CC MA RC X X Ap Bp Cp Cc Bc Ac Com fets inverted -L_ EQU 12 ; X X RC X CC MA MB MC X X Ac Bc Cc Ap Bp Cp -M_ EQU 13 ; MA MC CC MB RC L0 X X X Cc Bc Ac Cp Bp Ap X LED -N_ EQU 14 ; X X RC X MC MB MA CC X X Cp Cc Bp Bc Ap Ac -O_ EQU 15 ; X X RC X CC MA MC MB X X Cc Cp Bc Bp Ac Ap Like D, but low side pwm -P_ EQU 16 ; X X RC MA CC MB MC X X Cc Bc Ac Cp Bp Ap X -Q_ EQU 17 ; Cp Bp Ap L1 L0 X RC X X MA MB MC CC Cc Bc Ac LEDs -R_ EQU 18 ; X X RC X MC MB MA CC X X Ac Bc Cc Ap Bp Cp -S_ EQU 19 ; X X RC X CC MA MC MB X X Cc Cp Bc Bp Ac Ap Like O, but com fets inverted -T_ EQU 20 ; RC X MA X MB CC MC X X X Cp Bp Ap Ac Bc Cc -U_ EQU 21 ; MA MC CC MB RC L0 L1 L2 X Cc Bc Ac Cp Bp Ap X Like M, but with 3 LEDs -V_ EQU 22 ; Cc X RC X MC CC MB MA X Ap Ac Bp X X Bc Cp -W_ EQU 23 ; RC MC MB X CC MA X X X Ap Bp Cp X X X X Tristate gate driver + ; PORT 0 PORT 1 + ; P0 P1 P2 P3 P4 P5 P6 P7 P0 P1 P2 P3 P4 P5 P6 P7 + ; ----------------------- ----------------------- +A_ EQU 1 ; Vn Am Bm Cm __ RX __ __ Ap Ac Bp Bc Cp Cc __ __ +B_ EQU 2 ; Vn Am Bm Cm __ RX __ __ Cc Cp Bc Bp Ac Ap __ __ +C_ EQU 3 ; RX __ Vn Am Bm Cm Ap Ac Bp Bc Cp Cc __ __ __ __ +D_ EQU 4 ; Bm Cm Am Vn __ RX __ __ Ap Ac Bp Bc Cp Cc __ __ Com fets inverted +E_ EQU 5 ; Vn Am Bm Cm __ RX L0 L1 Ap Ac Bp Bc Cp Cc L2 __ A with LEDs +F_ EQU 6 ; Vn Cm Bm Am __ RX __ __ Ap Ac Bp Bc Cp Cc __ __ +G_ EQU 7 ; Bm Cm Am Vn __ RX __ __ Ap Ac Bp Bc Cp Cc __ __ Like D, but non-inverted com fets +H_ EQU 8 ; Cm Vn Bm Am __ __ __ RX Cc Bc Ac __ Cp Bp Ap __ +I_ EQU 9 ; Vn Am Bm Cm __ RX __ __ Cp Bp Ap Cc Bc Ac __ __ +J_ EQU 10 ; Am Cm Bm Vn RX L0 L1 L2 Ap Bp Cp Ac Bc Cc __ __ LEDs +K_ EQU 11 ; RX Am Vn Bm __ Cm __ __ Ac Bc Cc Cp Bp Ap __ __ Com fets inverted +L_ EQU 12 ; Cm Bm Am Vn __ RX __ __ Cp Bp Ap Cc Bc Ac __ __ +M_ EQU 13 ; __ __ L0 RX Bm Vn Cm Am __ Ap Bp Cp Ac Bc Cc __ LED +N_ EQU 14 ; Vn Am Bm Cm __ RX __ __ Ac Ap Bc Bp Cc Cp __ __ +O_ EQU 15 ; Bm Cm Am Vn __ RX __ __ Ap Ac Bp Bc Cp Cc __ __ Like D, but low side pwm +P_ EQU 16 ; __ Cm Bm Vn Am RX __ __ __ Ap Bp Cp Ac Bc Cc __ +Q_ EQU 17 ; __ RX __ L0 L1 Ap Bp Cp Ac Bc Cc Vn Cm Bm Am __ LEDs +R_ EQU 18 ; Vn Am Bm Cm __ RX __ __ Cp Bp Ap Cc Bc Ac __ __ +S_ EQU 19 ; Bm Cm Am Vn __ RX __ __ Ap Ac Bp Bc Cp Cc __ __ Like O, but com fets inverted +T_ EQU 20 ; __ Cm Vn Bm __ Am __ RX Cc Bc Ac Ap Bp Cp __ __ +U_ EQU 21 ; L2 L1 L0 RX Bm Vn Cm Am __ Ap Bp Cp Ac Bc Cc __ Like M, but with 3 LEDs +V_ EQU 22 ; Am Bm Vn Cm __ RX __ Cc Cp Bc __ __ Bp Ac Ap __ +W_ EQU 23 ; __ __ Am Vn __ Bm Cm RX __ __ __ __ Cp Bp Ap __ Tristate gate driver X_ EQU 24 Y_ EQU 25 -Z_ EQU 26 ; X X RC X CC MA MC MB X X Cp Cc Bp Bc Ap Ac +Z_ EQU 26 ; Bm Cm Am Vn __ RX __ __ Ac Ap Bc Bp Cc Cp __ __ ;**** **** **** **** **** ; Select the port mapping to use (or unselect all for use with external batch compile file) From 0f51f41753aed2352cdb0bf60cdf147a644b2190 Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Thu, 18 Feb 2021 22:57:29 +0100 Subject: [PATCH 14/19] style: Move pca channel code --- Layouts/A.inc | 35 ++++++++++++++++------------------- Layouts/B.inc | 34 +++++++++++++++------------------- Layouts/C.inc | 36 +++++++++++++++++------------------- Layouts/D.inc | 35 ++++++++++++++++------------------- Layouts/E.inc | 36 +++++++++++++++++------------------- Layouts/F.inc | 35 ++++++++++++++++------------------- Layouts/G.inc | 35 ++++++++++++++++------------------- Layouts/H.inc | 34 +++++++++++++++------------------- Layouts/I.inc | 32 ++++++++++++++++---------------- Layouts/J.inc | 33 +++++++++++++++++---------------- Layouts/K.inc | 35 ++++++++++++++++------------------- Layouts/L.inc | 32 ++++++++++++++++---------------- Layouts/M.inc | 36 +++++++++++++++++------------------- Layouts/N.inc | 34 +++++++++++++++------------------- Layouts/O.inc | 36 +++++++++++++++++------------------- Layouts/P.inc | 34 +++++++++++++++------------------- Layouts/Q.inc | 36 +++++++++++++++++------------------- Layouts/R.inc | 32 ++++++++++++++++---------------- Layouts/S.inc | 35 ++++++++++++++++------------------- Layouts/T.inc | 34 +++++++++++++++------------------- Layouts/U.inc | 36 +++++++++++++++++------------------- Layouts/V.inc | 36 +++++++++++++++++------------------- Layouts/W.inc | 36 +++++++++++++++++------------------- Layouts/Z.inc | 35 ++++++++++++++++------------------- 24 files changed, 388 insertions(+), 444 deletions(-) diff --git a/Layouts/A.inc b/Layouts/A.inc index 611fe54..2a7469e 100644 --- a/Layouts/A.inc +++ b/Layouts/A.inc @@ -33,7 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ENDIF ;********************* ; PORT 0 definitions * @@ -53,25 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/B.inc b/Layouts/B.inc index e82e083..77d047c 100644 --- a/Layouts/B.inc +++ b/Layouts/B.inc @@ -33,8 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM1 + PCA0_POWER_L EQU PCA0CPL1 + PCA0_POWER_H EQU PCA0CPH1 + PCA0_DAMP_MODULE EQU PCA0CPM0 + PCA0_DAMP_L EQU PCA0CPL0 + PCA0_DAMP_H EQU PCA0CPH0 +ENDIF ;********************* ; PORT 0 definitions * @@ -54,25 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 - - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/C.inc b/Layouts/C.inc index 9e5eb4e..a0faf65 100644 --- a/Layouts/C.inc +++ b/Layouts/C.inc @@ -33,6 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ENDIF ;********************* ; PORT 0 definitions * @@ -53,25 +70,6 @@ P0_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL A_com) P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/D.inc b/Layouts/D.inc index a111e05..64e38a6 100644 --- a/Layouts/D.inc +++ b/Layouts/D.inc @@ -33,7 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ENDIF ;********************* ; PORT 0 definitions * @@ -53,25 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/E.inc b/Layouts/E.inc index 26d498a..677a8af 100644 --- a/Layouts/E.inc +++ b/Layouts/E.inc @@ -33,25 +33,6 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 - -;********************* -; PORT 0 definitions * -;********************* -LED_1 EQU 7 ;o -LED_0 EQU 6 ;o -Rcp_In EQU 5 ;i -; EQU 4 ;i -C_Mux EQU 3 ;i -B_Mux EQU 2 ;i -A_Mux EQU 1 ;i -Comp_Com EQU 0 ;i - -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) -P0_INIT EQU NOT((1 SHL LED_0) + (1 SHL LED_1)) -P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) -P0_SKIP EQU 0FFh - - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 PCA0_POWER_L EQU PCA0CPL0 @@ -70,6 +51,23 @@ ELSE PCA0_DAMP_H EQU PCA0CPH1 ENDIF +;********************* +; PORT 0 definitions * +;********************* +LED_1 EQU 7 ;o +LED_0 EQU 6 ;o +Rcp_In EQU 5 ;i +; EQU 4 ;i +C_Mux EQU 3 ;i +B_Mux EQU 2 ;i +A_Mux EQU 1 ;i +Comp_Com EQU 0 ;i + +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_INIT EQU NOT((1 SHL LED_0) + (1 SHL LED_1)) +P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) +P0_SKIP EQU 0FFh + ;********************* ; PORT 1 definitions * diff --git a/Layouts/F.inc b/Layouts/F.inc index 07a2074..fc2db9a 100644 --- a/Layouts/F.inc +++ b/Layouts/F.inc @@ -33,7 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ENDIF ;********************* ; PORT 0 definitions * @@ -53,25 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/G.inc b/Layouts/G.inc index 93c2ad4..63ccd7f 100644 --- a/Layouts/G.inc +++ b/Layouts/G.inc @@ -33,7 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ENDIF ;********************* ; PORT 0 definitions * @@ -53,25 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/H.inc b/Layouts/H.inc index bfca774..c808973 100644 --- a/Layouts/H.inc +++ b/Layouts/H.inc @@ -33,8 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM1 + PCA0_POWER_L EQU PCA0CPL1 + PCA0_POWER_H EQU PCA0CPH1 + PCA0_DAMP_MODULE EQU PCA0CPM0 + PCA0_DAMP_L EQU PCA0CPL0 + PCA0_DAMP_H EQU PCA0CPH0 +ENDIF ;********************* ; PORT 0 definitions * @@ -54,25 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 - - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/I.inc b/Layouts/I.inc index b8ab17c..7b8d92d 100644 --- a/Layouts/I.inc +++ b/Layouts/I.inc @@ -33,7 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ENDIF ;********************* ; PORT 0 definitions * @@ -53,23 +69,7 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ENDIF ;********************* ; PORT 1 definitions * diff --git a/Layouts/J.inc b/Layouts/J.inc index 02a43a1..5f4e1f1 100644 --- a/Layouts/J.inc +++ b/Layouts/J.inc @@ -33,6 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ENDIF ;********************* ; PORT 0 definitions * @@ -52,23 +69,7 @@ P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2) P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ENDIF ;********************* ; PORT 1 definitions * diff --git a/Layouts/K.inc b/Layouts/K.inc index 48f6992..975f4e6 100644 --- a/Layouts/K.inc +++ b/Layouts/K.inc @@ -33,7 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM1 + PCA0_POWER_L EQU PCA0CPL1 + PCA0_POWER_H EQU PCA0CPH1 + PCA0_DAMP_MODULE EQU PCA0CPM0 + PCA0_DAMP_L EQU PCA0CPL0 + PCA0_DAMP_H EQU PCA0CPH0 +ENDIF ;********************* ; PORT 0 definitions * @@ -53,25 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 - - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/L.inc b/Layouts/L.inc index a26f558..5219d28 100644 --- a/Layouts/L.inc +++ b/Layouts/L.inc @@ -33,7 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ENDIF ;********************* ; PORT 0 definitions * @@ -53,23 +69,7 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ENDIF ;********************* ; PORT 1 definitions * diff --git a/Layouts/M.inc b/Layouts/M.inc index b6dc880..2458876 100644 --- a/Layouts/M.inc +++ b/Layouts/M.inc @@ -33,25 +33,6 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 - -;********************* -; PORT 0 definitions * -;********************* -A_Mux EQU 7 ;i -C_Mux EQU 6 ;i -Comp_Com EQU 5 ;i -B_Mux EQU 4 ;i -Rcp_In EQU 3 ;i -LED_0 EQU 2 ;i -; EQU 1 ;i -; EQU 0 ;i - -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) -P0_INIT EQU NOT(1 SHL LED_0) -P0_PUSHPULL EQU (1 SHL LED_0) -P0_SKIP EQU 0FFh - - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 PCA0_POWER_L EQU PCA0CPL0 @@ -70,6 +51,23 @@ ELSE PCA0_DAMP_H EQU PCA0CPH1 ENDIF +;********************* +; PORT 0 definitions * +;********************* +A_Mux EQU 7 ;i +C_Mux EQU 6 ;i +Comp_Com EQU 5 ;i +B_Mux EQU 4 ;i +Rcp_In EQU 3 ;i +LED_0 EQU 2 ;i +; EQU 1 ;i +; EQU 0 ;i + +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_INIT EQU NOT(1 SHL LED_0) +P0_PUSHPULL EQU (1 SHL LED_0) +P0_SKIP EQU 0FFh + ;********************* ; PORT 1 definitions * diff --git a/Layouts/N.inc b/Layouts/N.inc index cd4147c..8c9ccc0 100644 --- a/Layouts/N.inc +++ b/Layouts/N.inc @@ -33,8 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM1 + PCA0_POWER_L EQU PCA0CPL1 + PCA0_POWER_H EQU PCA0CPH1 + PCA0_DAMP_MODULE EQU PCA0CPM0 + PCA0_DAMP_L EQU PCA0CPL0 + PCA0_DAMP_H EQU PCA0CPH0 +ENDIF ;********************* ; PORT 0 definitions * @@ -54,25 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 - - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/O.inc b/Layouts/O.inc index bffcf9d..a18c2bf 100644 --- a/Layouts/O.inc +++ b/Layouts/O.inc @@ -33,25 +33,6 @@ COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 - -;********************* -; PORT 0 definitions * -;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -Comp_Com EQU 3 ;i -A_Mux EQU 2 ;i -C_Mux EQU 1 ;i -B_Mux EQU 0 ;i - -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) -P0_INIT EQU 0FFh -P0_PUSHPULL EQU 0 -P0_SKIP EQU 0FFh - - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 PCA0_POWER_L EQU PCA0CPL0 @@ -70,6 +51,23 @@ ELSE PCA0_DAMP_H EQU PCA0CPH1 ENDIF +;********************* +; PORT 0 definitions * +;********************* +; EQU 7 ;i +; EQU 6 ;i +Rcp_In EQU 5 ;i +; EQU 4 ;i +Comp_Com EQU 3 ;i +A_Mux EQU 2 ;i +C_Mux EQU 1 ;i +B_Mux EQU 0 ;i + +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_INIT EQU 0FFh +P0_PUSHPULL EQU 0 +P0_SKIP EQU 0FFh + ;********************* ; PORT 1 definitions * diff --git a/Layouts/P.inc b/Layouts/P.inc index 1419448..9003f3c 100644 --- a/Layouts/P.inc +++ b/Layouts/P.inc @@ -33,8 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ENDIF ;********************* ; PORT 0 definitions * @@ -54,25 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/Q.inc b/Layouts/Q.inc index c0c7652..b778ef9 100644 --- a/Layouts/Q.inc +++ b/Layouts/Q.inc @@ -33,6 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 1 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ENDIF ;********************* ; PORT 0 definitions * @@ -53,25 +70,6 @@ P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL A_pwm) + (1 SHL B_pwm) + P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/R.inc b/Layouts/R.inc index 436e370..39cb26e 100644 --- a/Layouts/R.inc +++ b/Layouts/R.inc @@ -33,7 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ENDIF ;********************* ; PORT 0 definitions * @@ -53,23 +69,7 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ENDIF ;********************* ; PORT 1 definitions * diff --git a/Layouts/S.inc b/Layouts/S.inc index 5940b3f..2d9fd3d 100644 --- a/Layouts/S.inc +++ b/Layouts/S.inc @@ -33,7 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM1 + PCA0_POWER_L EQU PCA0CPL1 + PCA0_POWER_H EQU PCA0CPH1 + PCA0_DAMP_MODULE EQU PCA0CPM0 + PCA0_DAMP_L EQU PCA0CPL0 + PCA0_DAMP_H EQU PCA0CPH0 +ENDIF ;********************* ; PORT 0 definitions * @@ -53,25 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 - - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/T.inc b/Layouts/T.inc index 23ae520..f98ec5d 100644 --- a/Layouts/T.inc +++ b/Layouts/T.inc @@ -33,8 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM1 + PCA0_POWER_L EQU PCA0CPL1 + PCA0_POWER_H EQU PCA0CPH1 + PCA0_DAMP_MODULE EQU PCA0CPM0 + PCA0_DAMP_L EQU PCA0CPL0 + PCA0_DAMP_H EQU PCA0CPH0 +ENDIF ;********************* ; PORT 0 definitions * @@ -54,25 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 - - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/U.inc b/Layouts/U.inc index 978fac1..576d885 100644 --- a/Layouts/U.inc +++ b/Layouts/U.inc @@ -33,25 +33,6 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 - -;********************* -; PORT 0 definitions * -;********************* -A_Mux EQU 7 ;i -C_Mux EQU 6 ;i -Comp_Com EQU 5 ;i -B_Mux EQU 4 ;i -Rcp_In EQU 3 ;i -LED_0 EQU 2 ;i -LED_1 EQU 1 ;i -LED_2 EQU 0 ;i - -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) -P0_INIT EQU 0FFh -P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2) -P0_SKIP EQU 0FFh - - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 PCA0_POWER_L EQU PCA0CPL0 @@ -70,6 +51,23 @@ ELSE PCA0_DAMP_H EQU PCA0CPH1 ENDIF +;********************* +; PORT 0 definitions * +;********************* +A_Mux EQU 7 ;i +C_Mux EQU 6 ;i +Comp_Com EQU 5 ;i +B_Mux EQU 4 ;i +Rcp_In EQU 3 ;i +LED_0 EQU 2 ;i +LED_1 EQU 1 ;i +LED_2 EQU 0 ;i + +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_INIT EQU 0FFh +P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2) +P0_SKIP EQU 0FFh + ;********************* ; PORT 1 definitions * diff --git a/Layouts/V.inc b/Layouts/V.inc index 1306413..b75e13f 100644 --- a/Layouts/V.inc +++ b/Layouts/V.inc @@ -33,6 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM1 + PCA0_POWER_L EQU PCA0CPL1 + PCA0_POWER_H EQU PCA0CPH1 + + PCA0_DAMP_MODULE EQU PCA0CPM0 + PCA0_DAMP_L EQU PCA0CPL0 + PCA0_DAMP_H EQU PCA0CPH0 +ENDIF ;********************* ; PORT 0 definitions * @@ -53,25 +70,6 @@ P0_PUSHPULL EQU (1 SHL C_com) P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 - - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/W.inc b/Layouts/W.inc index db35f8f..f4ee7e5 100644 --- a/Layouts/W.inc +++ b/Layouts/W.inc @@ -33,25 +33,6 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 - -;********************* -; PORT 0 definitions * -;********************* -Rcp_In EQU 7 ;i -C_Mux EQU 6 ;i -B_Mux EQU 5 ;i -; EQU 4 ;i -Comp_Com EQU 3 ;i -A_Mux EQU 2 ;i -; EQU 1 ;i -; EQU 0 ;i - -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) -P0_INIT EQU 0FFh -P0_PUSHPULL EQU 0 -P0_SKIP EQU 0FFh - - IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 PCA0_POWER_L EQU PCA0CPL0 @@ -70,6 +51,23 @@ ELSE PCA0_DAMP_H EQU PCA0CPH0 ENDIF +;********************* +; PORT 0 definitions * +;********************* +Rcp_In EQU 7 ;i +C_Mux EQU 6 ;i +B_Mux EQU 5 ;i +; EQU 4 ;i +Comp_Com EQU 3 ;i +A_Mux EQU 2 ;i +; EQU 1 ;i +; EQU 0 ;i + +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_INIT EQU 0FFh +P0_PUSHPULL EQU 0 +P0_SKIP EQU 0FFh + ;********************* ; PORT 1 definitions * diff --git a/Layouts/Z.inc b/Layouts/Z.inc index 0d9978c..952c688 100644 --- a/Layouts/Z.inc +++ b/Layouts/Z.inc @@ -33,7 +33,23 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port COMP_PORT EQU 0 +IF FETON_DELAY == 0 + PCA0_POWER_MODULE EQU PCA0CPM0 + PCA0_POWER_L EQU PCA0CPL0 + PCA0_POWER_H EQU PCA0CPH0 + + PCA0_DAMP_MODULE EQU PCA0CPM1 + PCA0_DAMP_L EQU PCA0CPL1 + PCA0_DAMP_H EQU PCA0CPH1 +ELSE + PCA0_POWER_MODULE EQU PCA0CPM1 + PCA0_POWER_L EQU PCA0CPL1 + PCA0_POWER_H EQU PCA0CPH1 + PCA0_DAMP_MODULE EQU PCA0CPM0 + PCA0_DAMP_L EQU PCA0CPL0 + PCA0_DAMP_H EQU PCA0CPH0 +ENDIF ;********************* ; PORT 0 definitions * @@ -53,25 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh -IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 - - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 -ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 - - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 -ENDIF - - ;********************* ; PORT 1 definitions * ;********************* From 198af89cc2bd4003e94066a4349c997c88d5267d Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Fri, 19 Feb 2021 01:22:34 +0100 Subject: [PATCH 15/19] style: Rename comparator port and mux --- Layouts/A.inc | 6 +++--- Layouts/B.inc | 6 +++--- Layouts/Base.inc | 10 +++++----- Layouts/C.inc | 6 +++--- Layouts/D.inc | 6 +++--- Layouts/E.inc | 6 +++--- Layouts/F.inc | 6 +++--- Layouts/G.inc | 6 +++--- Layouts/H.inc | 6 +++--- Layouts/I.inc | 6 +++--- Layouts/J.inc | 6 +++--- Layouts/K.inc | 6 +++--- Layouts/L.inc | 6 +++--- Layouts/M.inc | 6 +++--- Layouts/N.inc | 6 +++--- Layouts/O.inc | 6 +++--- Layouts/P.inc | 6 +++--- Layouts/Q.inc | 4 ++-- Layouts/R.inc | 6 +++--- Layouts/S.inc | 6 +++--- Layouts/T.inc | 6 +++--- Layouts/U.inc | 6 +++--- Layouts/V.inc | 6 +++--- Layouts/W.inc | 6 +++--- Layouts/Z.inc | 6 +++--- 25 files changed, 76 insertions(+), 76 deletions(-) diff --git a/Layouts/A.inc b/Layouts/A.inc index 2a7469e..2144f9c 100644 --- a/Layouts/A.inc +++ b/Layouts/A.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -61,9 +61,9 @@ Rcp_In EQU 5 ;i C_Mux EQU 3 ;i B_Mux EQU 2 ;i A_Mux EQU 1 ;i -Comp_Com EQU 0 ;i +V_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/B.inc b/Layouts/B.inc index 77d047c..652145c 100644 --- a/Layouts/B.inc +++ b/Layouts/B.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -61,9 +61,9 @@ Rcp_In EQU 5 ;i C_Mux EQU 3 ;i B_Mux EQU 2 ;i A_Mux EQU 1 ;i -Comp_Com EQU 0 ;i +V_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/Base.inc b/Layouts/Base.inc index 2f9d8e8..e0308cd 100644 --- a/Layouts/Base.inc +++ b/Layouts/Base.inc @@ -25,7 +25,7 @@ ; Base layout ; ; The inheriting layout should -; - Specify PWM_ACTIVE_HIGH, COMPWM_ACTIVE_HIGH and COMP_PORT +; - Specify PWM_ACTIVE_HIGH, COMPWM_ACTIVE_HIGH and COMPARATOR_PORT ; - Set CUSTOM_* flags to override default implementation ; ;**** **** **** **** **** @@ -105,7 +105,7 @@ $endif ;**** **** **** **** **** ; Comparator setup and phase change ;**** **** **** **** **** -IF COMP_PORT == 0 +IF COMPARATOR_PORT == 0 CMP_CN0 EQU CMP0CN0 CMP_MD EQU CMP0MD CMP_MX EQU CMP0MX @@ -130,17 +130,17 @@ $endif ; Set comparator multiplexer to phase A Set_Comp_Phase_A MACRO - mov CMP_MX, #((A_Mux SHL 4) + Comp_Com) + mov CMP_MX, #((A_Mux SHL 4) + V_Mux) ENDM ; Set comparator multiplexer to phase B Set_Comp_Phase_B MACRO - mov CMP_MX, #((B_Mux SHL 4) + Comp_Com) + mov CMP_MX, #((B_Mux SHL 4) + V_Mux) ENDM ; Set comparator multiplexer to phase C Set_Comp_Phase_C MACRO - mov CMP_MX, #((C_Mux SHL 4) + Comp_Com) + mov CMP_MX, #((C_Mux SHL 4) + V_Mux) ENDM diff --git a/Layouts/C.inc b/Layouts/C.inc index a0faf65..45c26df 100644 --- a/Layouts/C.inc +++ b/Layouts/C.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -59,12 +59,12 @@ A_pwm EQU 6 ;o C_Mux EQU 5 ;i B_Mux EQU 4 ;i A_Mux EQU 3 ;i -Comp_Com EQU 2 ;i +V_Mux EQU 2 ;i ; EQU 1 ;i Rcp_In EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU NOT((1 SHL A_pwm) + (1 SHL A_com)) P0_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL A_com) P0_SKIP EQU 0FFh diff --git a/Layouts/D.inc b/Layouts/D.inc index 64e38a6..6d80e42 100644 --- a/Layouts/D.inc +++ b/Layouts/D.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -58,12 +58,12 @@ ENDIF ; EQU 6 ;i Rcp_In EQU 5 ;i ; EQU 4 ;i -Comp_Com EQU 3 ;i +V_Mux EQU 3 ;i A_Mux EQU 2 ;i C_Mux EQU 1 ;i B_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/E.inc b/Layouts/E.inc index 677a8af..567c0d5 100644 --- a/Layouts/E.inc +++ b/Layouts/E.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -61,9 +61,9 @@ Rcp_In EQU 5 ;i C_Mux EQU 3 ;i B_Mux EQU 2 ;i A_Mux EQU 1 ;i -Comp_Com EQU 0 ;i +V_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU NOT((1 SHL LED_0) + (1 SHL LED_1)) P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) P0_SKIP EQU 0FFh diff --git a/Layouts/F.inc b/Layouts/F.inc index fc2db9a..c3d75a9 100644 --- a/Layouts/F.inc +++ b/Layouts/F.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -61,9 +61,9 @@ Rcp_In EQU 5 ;i A_Mux EQU 3 ;i B_Mux EQU 2 ;i C_Mux EQU 1 ;i -Comp_Com EQU 0 ;i +V_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/G.inc b/Layouts/G.inc index 63ccd7f..35e5330 100644 --- a/Layouts/G.inc +++ b/Layouts/G.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -58,12 +58,12 @@ ENDIF ; EQU 6 ;i Rcp_In EQU 5 ;i ; EQU 4 ;i -Comp_Com EQU 3 ;i +V_Mux EQU 3 ;i A_Mux EQU 2 ;i C_Mux EQU 1 ;i B_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/H.inc b/Layouts/H.inc index c808973..924665f 100644 --- a/Layouts/H.inc +++ b/Layouts/H.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -60,10 +60,10 @@ Rcp_In EQU 7 ;i ; EQU 4 ;i A_Mux EQU 3 ;i B_Mux EQU 2 ;i -Comp_Com EQU 1 ;i +V_Mux EQU 1 ;i C_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/I.inc b/Layouts/I.inc index 7b8d92d..3c2a8cb 100644 --- a/Layouts/I.inc +++ b/Layouts/I.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -61,9 +61,9 @@ Rcp_In EQU 5 ;i C_Mux EQU 3 ;i B_Mux EQU 2 ;i A_Mux EQU 1 ;i -Comp_Com EQU 0 ;i +V_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/J.inc b/Layouts/J.inc index 5f4e1f1..e8f1823 100644 --- a/Layouts/J.inc +++ b/Layouts/J.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -58,12 +58,12 @@ LED_2 EQU 7 ;o LED_1 EQU 6 ;o LED_0 EQU 5 ;o Rcp_In EQU 4 ;i -Comp_Com EQU 3 ;i +V_Mux EQU 3 ;i B_Mux EQU 2 ;i C_Mux EQU 1 ;i A_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2) P0_SKIP EQU 0FFh diff --git a/Layouts/K.inc b/Layouts/K.inc index 975f4e6..5359224 100644 --- a/Layouts/K.inc +++ b/Layouts/K.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -59,11 +59,11 @@ ENDIF C_Mux EQU 5 ;i ; EQU 4 ;i B_Mux EQU 3 ;i -Comp_Com EQU 2 ;i +V_Mux EQU 2 ;i A_Mux EQU 1 ;i Rcp_In EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/L.inc b/Layouts/L.inc index 5219d28..ad7bef6 100644 --- a/Layouts/L.inc +++ b/Layouts/L.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -58,12 +58,12 @@ ENDIF ; EQU 6 ;i Rcp_In EQU 5 ;i ; EQU 4 ;i -Comp_Com EQU 3 ;i +V_Mux EQU 3 ;i A_Mux EQU 2 ;i B_Mux EQU 1 ;i C_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/M.inc b/Layouts/M.inc index 2458876..0182e62 100644 --- a/Layouts/M.inc +++ b/Layouts/M.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -56,14 +56,14 @@ ENDIF ;********************* A_Mux EQU 7 ;i C_Mux EQU 6 ;i -Comp_Com EQU 5 ;i +V_Mux EQU 5 ;i B_Mux EQU 4 ;i Rcp_In EQU 3 ;i LED_0 EQU 2 ;i ; EQU 1 ;i ; EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU NOT(1 SHL LED_0) P0_PUSHPULL EQU (1 SHL LED_0) P0_SKIP EQU 0FFh diff --git a/Layouts/N.inc b/Layouts/N.inc index 8c9ccc0..a114945 100644 --- a/Layouts/N.inc +++ b/Layouts/N.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -61,9 +61,9 @@ Rcp_In EQU 5 ;i C_Mux EQU 3 ;i B_Mux EQU 2 ;i A_Mux EQU 1 ;i -Comp_Com EQU 0 ;i +V_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/O.inc b/Layouts/O.inc index a18c2bf..fd3d692 100644 --- a/Layouts/O.inc +++ b/Layouts/O.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -58,12 +58,12 @@ ENDIF ; EQU 6 ;i Rcp_In EQU 5 ;i ; EQU 4 ;i -Comp_Com EQU 3 ;i +V_Mux EQU 3 ;i A_Mux EQU 2 ;i C_Mux EQU 1 ;i B_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/P.inc b/Layouts/P.inc index 9003f3c..70e6840 100644 --- a/Layouts/P.inc +++ b/Layouts/P.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -58,12 +58,12 @@ ENDIF ; EQU 6 ;i Rcp_In EQU 5 ;i A_Mux EQU 4 ;i -Comp_Com EQU 3 ;i +V_Mux EQU 3 ;i B_Mux EQU 2 ;i C_Mux EQU 1 ;i ; EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/Q.inc b/Layouts/Q.inc index b778ef9..d4dd184 100644 --- a/Layouts/Q.inc +++ b/Layouts/Q.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 1 +COMPARATOR_PORT EQU 1 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -77,7 +77,7 @@ P0_SKIP EQU 0FFh A_Mux EQU 6 ;i B_Mux EQU 5 ;i C_Mux EQU 4 ;i -Comp_Com EQU 3 ;o +V_Mux EQU 3 ;o C_com EQU 2 ;o B_com EQU 1 ;o A_com EQU 0 ;o diff --git a/Layouts/R.inc b/Layouts/R.inc index 39cb26e..a445fdc 100644 --- a/Layouts/R.inc +++ b/Layouts/R.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -61,9 +61,9 @@ Rcp_In EQU 5 ;i C_Mux EQU 3 ;i B_Mux EQU 2 ;i A_Mux EQU 1 ;i -Comp_Com EQU 0 ;i +V_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/S.inc b/Layouts/S.inc index 2d9fd3d..6989e04 100644 --- a/Layouts/S.inc +++ b/Layouts/S.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -58,12 +58,12 @@ ENDIF ; EQU 6 ;i Rcp_In EQU 5 ;i ; EQU 4 ;i -Comp_Com EQU 3 ;i +V_Mux EQU 3 ;i A_Mux EQU 2 ;i C_Mux EQU 1 ;i B_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/T.inc b/Layouts/T.inc index f98ec5d..cff34b5 100644 --- a/Layouts/T.inc +++ b/Layouts/T.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -59,11 +59,11 @@ Rcp_In EQU 7 ;i A_Mux EQU 5 ;i ; EQU 4 ;i B_Mux EQU 3 ;i -Comp_Com EQU 2 ;i +V_Mux EQU 2 ;i C_Mux EQU 1 ;i ; EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/U.inc b/Layouts/U.inc index 576d885..2e251c5 100644 --- a/Layouts/U.inc +++ b/Layouts/U.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -56,14 +56,14 @@ ENDIF ;********************* A_Mux EQU 7 ;i C_Mux EQU 6 ;i -Comp_Com EQU 5 ;i +V_Mux EQU 5 ;i B_Mux EQU 4 ;i Rcp_In EQU 3 ;i LED_0 EQU 2 ;i LED_1 EQU 1 ;i LED_2 EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2) P0_SKIP EQU 0FFh diff --git a/Layouts/V.inc b/Layouts/V.inc index b75e13f..1099edb 100644 --- a/Layouts/V.inc +++ b/Layouts/V.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -59,12 +59,12 @@ C_com EQU 7 ;o Rcp_In EQU 5 ;i ; EQU 4 ;i C_Mux EQU 3 ;i -Comp_Com EQU 2 ;i +V_Mux EQU 2 ;i B_Mux EQU 1 ;i A_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU NOT(1 SHL C_com) P0_PUSHPULL EQU (1 SHL C_com) P0_SKIP EQU 0FFh diff --git a/Layouts/W.inc b/Layouts/W.inc index f4ee7e5..e23f5a8 100644 --- a/Layouts/W.inc +++ b/Layouts/W.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 1 ; Pwm non-inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -58,12 +58,12 @@ Rcp_In EQU 7 ;i C_Mux EQU 6 ;i B_Mux EQU 5 ;i ; EQU 4 ;i -Comp_Com EQU 3 ;i +V_Mux EQU 3 ;i A_Mux EQU 2 ;i ; EQU 1 ;i ; EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh diff --git a/Layouts/Z.inc b/Layouts/Z.inc index 952c688..c0b3d9a 100644 --- a/Layouts/Z.inc +++ b/Layouts/Z.inc @@ -31,7 +31,7 @@ PWM_ACTIVE_HIGH EQU 0 ; Pwm inverted COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted ; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port -COMP_PORT EQU 0 +COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 PCA0_POWER_MODULE EQU PCA0CPM0 @@ -58,12 +58,12 @@ ENDIF ; EQU 6 ;i Rcp_In EQU 5 ;i ; EQU 4 ;i -Comp_Com EQU 3 ;i +V_Mux EQU 3 ;i A_Mux EQU 2 ;i C_Mux EQU 1 ;i B_Mux EQU 0 ;i -P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com)) +P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh From 916e9619edf16864cbd9ba72c4ad4b82f75834ee Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Fri, 19 Feb 2021 01:26:41 +0100 Subject: [PATCH 16/19] style: Rename pca channels --- Layouts/A.inc | 24 ++++++++++++------------ Layouts/B.inc | 24 ++++++++++++------------ Layouts/Base.inc | 18 +++++++++--------- Layouts/C.inc | 24 ++++++++++++------------ Layouts/D.inc | 24 ++++++++++++------------ Layouts/E.inc | 26 +++++++++++++------------- Layouts/F.inc | 24 ++++++++++++------------ Layouts/G.inc | 24 ++++++++++++------------ Layouts/H.inc | 24 ++++++++++++------------ Layouts/I.inc | 24 ++++++++++++------------ Layouts/J.inc | 24 ++++++++++++------------ Layouts/K.inc | 24 ++++++++++++------------ Layouts/L.inc | 24 ++++++++++++------------ Layouts/M.inc | 24 ++++++++++++------------ Layouts/N.inc | 24 ++++++++++++------------ Layouts/O.inc | 24 ++++++++++++------------ Layouts/P.inc | 24 ++++++++++++------------ Layouts/Q.inc | 24 ++++++++++++------------ Layouts/R.inc | 24 ++++++++++++------------ Layouts/S.inc | 24 ++++++++++++------------ Layouts/T.inc | 24 ++++++++++++------------ Layouts/U.inc | 24 ++++++++++++------------ Layouts/V.inc | 24 ++++++++++++------------ Layouts/W.inc | 24 ++++++++++++------------ Layouts/Z.inc | 24 ++++++++++++------------ 25 files changed, 298 insertions(+), 298 deletions(-) diff --git a/Layouts/A.inc b/Layouts/A.inc index 2144f9c..49f2d21 100644 --- a/Layouts/A.inc +++ b/Layouts/A.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/B.inc b/Layouts/B.inc index 652145c..f9a160c 100644 --- a/Layouts/B.inc +++ b/Layouts/B.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 + PCA0CPM_POWER EQU PCA0CPM1 + PCA0CPL_POWER EQU PCA0CPL1 + PCA0CPH_POWER EQU PCA0CPH1 - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 + PCA0CPM_DAMP EQU PCA0CPM0 + PCA0CPL_DAMP EQU PCA0CPL0 + PCA0CPH_DAMP EQU PCA0CPH0 ENDIF ;********************* diff --git a/Layouts/Base.inc b/Layouts/Base.inc index e0308cd..c1198ec 100644 --- a/Layouts/Base.inc +++ b/Layouts/Base.inc @@ -52,7 +52,7 @@ Initialize_Xbar MACRO ENDM Set_Pwm_Polarity MACRO -IF PCA0_POWER_MODULE == PCA0CPM0 +IF PCA0CPM_POWER == PCA0CPM0 mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) ELSE mov PCA0POL, #(((1 - PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) @@ -69,34 +69,34 @@ $if NOT CUSTOM_PWM_UPDATE Enable_Power_Pwm_Module MACRO IF FETON_DELAY == 0 - mov PCA0_POWER_MODULE, #4Ah ;; Enable comparator of module, enable match, set pwm mode + mov PCA0CPM_POWER, #4Ah ;; Enable comparator of module, enable match, set pwm mode ELSE - mov PCA0_POWER_MODULE, #42h ;; Enable comparator of module, set pwm mode + mov PCA0CPM_POWER, #42h ;; Enable comparator of module, set pwm mode ENDIF ENDM Enable_Damp_Pwm_Module MACRO IF FETON_DELAY == 0 - mov PCA0_DAMP_MODULE, #00h ;; Disable + mov PCA0CPM_DAMP, #00h ;; Disable ELSE - mov PCA0_DAMP_MODULE, #42h ;; Enable comparator of module, set pwm mode + mov PCA0CPM_DAMP, #42h ;; Enable comparator of module, set pwm mode ENDIF ENDM Set_Power_Pwm_Reg_L MACRO value - mov PCA0_POWER_L, value + mov PCA0CPL_POWER, value ENDM Set_Power_Pwm_Reg_H MACRO value - mov PCA0_POWER_H, value + mov PCA0CPH_POWER, value ENDM Set_Damp_Pwm_Reg_L MACRO value - mov PCA0_DAMP_L, value + mov PCA0CPL_DAMP, value ENDM Set_Damp_Pwm_Reg_H MACRO value - mov PCA0_DAMP_H, value + mov PCA0CPH_DAMP, value ENDM $endif diff --git a/Layouts/C.inc b/Layouts/C.inc index 45c26df..21b6e15 100644 --- a/Layouts/C.inc +++ b/Layouts/C.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/D.inc b/Layouts/D.inc index 6d80e42..0c2749f 100644 --- a/Layouts/D.inc +++ b/Layouts/D.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/E.inc b/Layouts/E.inc index 567c0d5..5c92c77 100644 --- a/Layouts/E.inc +++ b/Layouts/E.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* @@ -115,7 +115,7 @@ Initialize_Xbar MACRO ENDM Set_Pwm_Polarity MACRO -IF PCA0_POWER_MODULE == PCA0CPM0 +IF PCA0CPM_POWER == PCA0CPM0 mov PCA0POL, #((COMPWM_ACTIVE_HIGH SHL 1) + (1 - PWM_ACTIVE_HIGH)) ELSE mov PCA0POL, #(((1 - PWM_ACTIVE_HIGH) SHL 1) + COMPWM_ACTIVE_HIGH) diff --git a/Layouts/F.inc b/Layouts/F.inc index c3d75a9..5043818 100644 --- a/Layouts/F.inc +++ b/Layouts/F.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/G.inc b/Layouts/G.inc index 35e5330..52c9b1c 100644 --- a/Layouts/G.inc +++ b/Layouts/G.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/H.inc b/Layouts/H.inc index 924665f..a0c4b71 100644 --- a/Layouts/H.inc +++ b/Layouts/H.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 + PCA0CPM_POWER EQU PCA0CPM1 + PCA0CPL_POWER EQU PCA0CPL1 + PCA0CPH_POWER EQU PCA0CPH1 - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 + PCA0CPM_DAMP EQU PCA0CPM0 + PCA0CPL_DAMP EQU PCA0CPL0 + PCA0CPH_DAMP EQU PCA0CPH0 ENDIF ;********************* diff --git a/Layouts/I.inc b/Layouts/I.inc index 3c2a8cb..256cd78 100644 --- a/Layouts/I.inc +++ b/Layouts/I.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/J.inc b/Layouts/J.inc index e8f1823..19cb3c1 100644 --- a/Layouts/J.inc +++ b/Layouts/J.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/K.inc b/Layouts/K.inc index 5359224..e8fcb6a 100644 --- a/Layouts/K.inc +++ b/Layouts/K.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 + PCA0CPM_POWER EQU PCA0CPM1 + PCA0CPL_POWER EQU PCA0CPL1 + PCA0CPH_POWER EQU PCA0CPH1 - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 + PCA0CPM_DAMP EQU PCA0CPM0 + PCA0CPL_DAMP EQU PCA0CPL0 + PCA0CPH_DAMP EQU PCA0CPH0 ENDIF ;********************* diff --git a/Layouts/L.inc b/Layouts/L.inc index ad7bef6..d880559 100644 --- a/Layouts/L.inc +++ b/Layouts/L.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/M.inc b/Layouts/M.inc index 0182e62..615309a 100644 --- a/Layouts/M.inc +++ b/Layouts/M.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/N.inc b/Layouts/N.inc index a114945..8c343f1 100644 --- a/Layouts/N.inc +++ b/Layouts/N.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 + PCA0CPM_POWER EQU PCA0CPM1 + PCA0CPL_POWER EQU PCA0CPL1 + PCA0CPH_POWER EQU PCA0CPH1 - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 + PCA0CPM_DAMP EQU PCA0CPM0 + PCA0CPL_DAMP EQU PCA0CPL0 + PCA0CPH_DAMP EQU PCA0CPH0 ENDIF ;********************* diff --git a/Layouts/O.inc b/Layouts/O.inc index fd3d692..a6ba672 100644 --- a/Layouts/O.inc +++ b/Layouts/O.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 0 ; Damping non-inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/P.inc b/Layouts/P.inc index 70e6840..28a5c1a 100644 --- a/Layouts/P.inc +++ b/Layouts/P.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/Q.inc b/Layouts/Q.inc index d4dd184..7efe4c7 100644 --- a/Layouts/Q.inc +++ b/Layouts/Q.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 1 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/R.inc b/Layouts/R.inc index a445fdc..2e89425 100644 --- a/Layouts/R.inc +++ b/Layouts/R.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/S.inc b/Layouts/S.inc index 6989e04..fc26a01 100644 --- a/Layouts/S.inc +++ b/Layouts/S.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 + PCA0CPM_POWER EQU PCA0CPM1 + PCA0CPL_POWER EQU PCA0CPL1 + PCA0CPH_POWER EQU PCA0CPH1 - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 + PCA0CPM_DAMP EQU PCA0CPM0 + PCA0CPL_DAMP EQU PCA0CPL0 + PCA0CPH_DAMP EQU PCA0CPH0 ENDIF ;********************* diff --git a/Layouts/T.inc b/Layouts/T.inc index cff34b5..09e97eb 100644 --- a/Layouts/T.inc +++ b/Layouts/T.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 + PCA0CPM_POWER EQU PCA0CPM1 + PCA0CPL_POWER EQU PCA0CPL1 + PCA0CPH_POWER EQU PCA0CPH1 - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 + PCA0CPM_DAMP EQU PCA0CPM0 + PCA0CPL_DAMP EQU PCA0CPL0 + PCA0CPH_DAMP EQU PCA0CPH0 ENDIF ;********************* diff --git a/Layouts/U.inc b/Layouts/U.inc index 2e251c5..6810955 100644 --- a/Layouts/U.inc +++ b/Layouts/U.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ENDIF ;********************* diff --git a/Layouts/V.inc b/Layouts/V.inc index 1099edb..92a8ef6 100644 --- a/Layouts/V.inc +++ b/Layouts/V.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 + PCA0CPM_POWER EQU PCA0CPM1 + PCA0CPL_POWER EQU PCA0CPL1 + PCA0CPH_POWER EQU PCA0CPH1 - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 + PCA0CPM_DAMP EQU PCA0CPM0 + PCA0CPL_DAMP EQU PCA0CPL0 + PCA0CPH_DAMP EQU PCA0CPH0 ENDIF ;********************* diff --git a/Layouts/W.inc b/Layouts/W.inc index e23f5a8..7bee8a2 100644 --- a/Layouts/W.inc +++ b/Layouts/W.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 + PCA0CPM_POWER EQU PCA0CPM1 + PCA0CPL_POWER EQU PCA0CPL1 + PCA0CPH_POWER EQU PCA0CPH1 - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 + PCA0CPM_DAMP EQU PCA0CPM0 + PCA0CPL_DAMP EQU PCA0CPL0 + PCA0CPH_DAMP EQU PCA0CPH0 ENDIF ;********************* diff --git a/Layouts/Z.inc b/Layouts/Z.inc index c0b3d9a..966583a 100644 --- a/Layouts/Z.inc +++ b/Layouts/Z.inc @@ -34,21 +34,21 @@ COMPWM_ACTIVE_HIGH EQU 1 ; Damping inverted COMPARATOR_PORT EQU 0 IF FETON_DELAY == 0 - PCA0_POWER_MODULE EQU PCA0CPM0 - PCA0_POWER_L EQU PCA0CPL0 - PCA0_POWER_H EQU PCA0CPH0 + PCA0CPM_POWER EQU PCA0CPM0 + PCA0CPL_POWER EQU PCA0CPL0 + PCA0CPH_POWER EQU PCA0CPH0 - PCA0_DAMP_MODULE EQU PCA0CPM1 - PCA0_DAMP_L EQU PCA0CPL1 - PCA0_DAMP_H EQU PCA0CPH1 + PCA0CPM_DAMP EQU PCA0CPM1 + PCA0CPL_DAMP EQU PCA0CPL1 + PCA0CPH_DAMP EQU PCA0CPH1 ELSE - PCA0_POWER_MODULE EQU PCA0CPM1 - PCA0_POWER_L EQU PCA0CPL1 - PCA0_POWER_H EQU PCA0CPH1 + PCA0CPM_POWER EQU PCA0CPM1 + PCA0CPL_POWER EQU PCA0CPL1 + PCA0CPH_POWER EQU PCA0CPH1 - PCA0_DAMP_MODULE EQU PCA0CPM0 - PCA0_DAMP_L EQU PCA0CPL0 - PCA0_DAMP_H EQU PCA0CPH0 + PCA0CPM_DAMP EQU PCA0CPM0 + PCA0CPL_DAMP EQU PCA0CPL0 + PCA0CPH_DAMP EQU PCA0CPH0 ENDIF ;********************* From 23a88d73eb73ae262148749938c757ec713472aa Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Fri, 19 Feb 2021 17:35:39 +0100 Subject: [PATCH 17/19] style: Remove layout i/o comments --- Layouts/A.inc | 34 +++++++++++++++++----------------- Layouts/B.inc | 34 +++++++++++++++++----------------- Layouts/C.inc | 34 +++++++++++++++++----------------- Layouts/D.inc | 34 +++++++++++++++++----------------- Layouts/E.inc | 34 +++++++++++++++++----------------- Layouts/F.inc | 34 +++++++++++++++++----------------- Layouts/G.inc | 34 +++++++++++++++++----------------- Layouts/H.inc | 34 +++++++++++++++++----------------- Layouts/I.inc | 34 +++++++++++++++++----------------- Layouts/J.inc | 34 +++++++++++++++++----------------- Layouts/K.inc | 34 +++++++++++++++++----------------- Layouts/L.inc | 34 +++++++++++++++++----------------- Layouts/M.inc | 34 +++++++++++++++++----------------- Layouts/N.inc | 34 +++++++++++++++++----------------- Layouts/O.inc | 34 +++++++++++++++++----------------- Layouts/P.inc | 34 +++++++++++++++++----------------- Layouts/Q.inc | 34 +++++++++++++++++----------------- Layouts/R.inc | 34 +++++++++++++++++----------------- Layouts/S.inc | 34 +++++++++++++++++----------------- Layouts/T.inc | 34 +++++++++++++++++----------------- Layouts/U.inc | 34 +++++++++++++++++----------------- Layouts/V.inc | 34 +++++++++++++++++----------------- Layouts/W.inc | 34 +++++++++++++++++----------------- Layouts/Z.inc | 34 +++++++++++++++++----------------- 24 files changed, 408 insertions(+), 408 deletions(-) diff --git a/Layouts/A.inc b/Layouts/A.inc index 49f2d21..410430f 100644 --- a/Layouts/A.inc +++ b/Layouts/A.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -C_Mux EQU 3 ;i -B_Mux EQU 2 ;i -A_Mux EQU 1 ;i -V_Mux EQU 0 ;i +; EQU 7 +; EQU 6 +Rcp_In EQU 5 +; EQU 4 +C_Mux EQU 3 +B_Mux EQU 2 +A_Mux EQU 1 +V_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -C_com EQU 5 ;o -C_pwm EQU 4 ;o -B_com EQU 3 ;o -B_pwm EQU 2 ;o -A_com EQU 1 ;o -A_pwm EQU 0 ;o +; EQU 7 +; EQU 6 +C_com EQU 5 +C_pwm EQU 4 +B_com EQU 3 +B_pwm EQU 2 +A_com EQU 1 +A_pwm EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/B.inc b/Layouts/B.inc index f9a160c..9bf06d3 100644 --- a/Layouts/B.inc +++ b/Layouts/B.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -C_Mux EQU 3 ;i -B_Mux EQU 2 ;i -A_Mux EQU 1 ;i -V_Mux EQU 0 ;i +; EQU 7 +; EQU 6 +Rcp_In EQU 5 +; EQU 4 +C_Mux EQU 3 +B_Mux EQU 2 +A_Mux EQU 1 +V_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -A_pwm EQU 5 ;o -A_com EQU 4 ;o -B_pwm EQU 3 ;o -B_com EQU 2 ;o -C_pwm EQU 1 ;o -C_com EQU 0 ;o +; EQU 7 +; EQU 6 +A_pwm EQU 5 +A_com EQU 4 +B_pwm EQU 3 +B_com EQU 2 +C_pwm EQU 1 +C_com EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/C.inc b/Layouts/C.inc index 21b6e15..63eea99 100644 --- a/Layouts/C.inc +++ b/Layouts/C.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -A_com EQU 7 ;o -A_pwm EQU 6 ;o -C_Mux EQU 5 ;i -B_Mux EQU 4 ;i -A_Mux EQU 3 ;i -V_Mux EQU 2 ;i -; EQU 1 ;i -Rcp_In EQU 0 ;i +A_com EQU 7 +A_pwm EQU 6 +C_Mux EQU 5 +B_Mux EQU 4 +A_Mux EQU 3 +V_Mux EQU 2 +; EQU 1 +Rcp_In EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) @@ -73,14 +73,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -; EQU 5 ;i -; EQU 4 ;i -C_com EQU 3 ;o -C_pwm EQU 2 ;o -B_com EQU 1 ;o -B_pwm EQU 0 ;o +; EQU 7 +; EQU 6 +; EQU 5 +; EQU 4 +C_com EQU 3 +C_pwm EQU 2 +B_com EQU 1 +B_pwm EQU 0 P_ApwmFET EQU P0.A_pwm @@ -139,7 +139,7 @@ ENDM ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/D.inc b/Layouts/D.inc index 0c2749f..5109d1b 100644 --- a/Layouts/D.inc +++ b/Layouts/D.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -V_Mux EQU 3 ;i -A_Mux EQU 2 ;i -C_Mux EQU 1 ;i -B_Mux EQU 0 ;i +; EQU 7 +; EQU 6 +Rcp_In EQU 5 +; EQU 4 +V_Mux EQU 3 +A_Mux EQU 2 +C_Mux EQU 1 +B_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -C_com EQU 5 ;o -C_pwm EQU 4 ;o -B_com EQU 3 ;o -B_pwm EQU 2 ;o -A_com EQU 1 ;o -A_pwm EQU 0 ;o +; EQU 7 +; EQU 6 +C_com EQU 5 +C_pwm EQU 4 +B_com EQU 3 +B_pwm EQU 2 +A_com EQU 1 +A_pwm EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/E.inc b/Layouts/E.inc index 5c92c77..590e663 100644 --- a/Layouts/E.inc +++ b/Layouts/E.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -LED_1 EQU 7 ;o -LED_0 EQU 6 ;o -Rcp_In EQU 5 ;i -; EQU 4 ;i -C_Mux EQU 3 ;i -B_Mux EQU 2 ;i -A_Mux EQU 1 ;i -V_Mux EQU 0 ;i +LED_1 EQU 7 +LED_0 EQU 6 +Rcp_In EQU 5 +; EQU 4 +C_Mux EQU 3 +B_Mux EQU 2 +A_Mux EQU 1 +V_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU NOT((1 SHL LED_0) + (1 SHL LED_1)) @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -LED_2 EQU 6 ;o -C_com EQU 5 ;o -C_pwm EQU 4 ;o -B_com EQU 3 ;o -B_pwm EQU 2 ;o -A_com EQU 1 ;o -A_pwm EQU 0 ;o +; EQU 7 +LED_2 EQU 6 +C_com EQU 5 +C_pwm EQU 4 +B_com EQU 3 +B_pwm EQU 2 +A_com EQU 1 +A_pwm EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) + (1 SHL LED_2) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/F.inc b/Layouts/F.inc index 5043818..2ff2ca6 100644 --- a/Layouts/F.inc +++ b/Layouts/F.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -A_Mux EQU 3 ;i -B_Mux EQU 2 ;i -C_Mux EQU 1 ;i -V_Mux EQU 0 ;i +; EQU 7 +; EQU 6 +Rcp_In EQU 5 +; EQU 4 +A_Mux EQU 3 +B_Mux EQU 2 +C_Mux EQU 1 +V_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -C_com EQU 5 ;o -C_pwm EQU 4 ;o -B_com EQU 3 ;o -B_pwm EQU 2 ;o -A_com EQU 1 ;o -A_pwm EQU 0 ;o +; EQU 7 +; EQU 6 +C_com EQU 5 +C_pwm EQU 4 +B_com EQU 3 +B_pwm EQU 2 +A_com EQU 1 +A_pwm EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/G.inc b/Layouts/G.inc index 52c9b1c..c301d73 100644 --- a/Layouts/G.inc +++ b/Layouts/G.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -V_Mux EQU 3 ;i -A_Mux EQU 2 ;i -C_Mux EQU 1 ;i -B_Mux EQU 0 ;i +; EQU 7 +; EQU 6 +Rcp_In EQU 5 +; EQU 4 +V_Mux EQU 3 +A_Mux EQU 2 +C_Mux EQU 1 +B_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -C_com EQU 5 ;o -C_pwm EQU 4 ;o -B_com EQU 3 ;o -B_pwm EQU 2 ;o -A_com EQU 1 ;o -A_pwm EQU 0 ;o +; EQU 7 +; EQU 6 +C_com EQU 5 +C_pwm EQU 4 +B_com EQU 3 +B_pwm EQU 2 +A_com EQU 1 +A_pwm EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/H.inc b/Layouts/H.inc index a0c4b71..0b99b68 100644 --- a/Layouts/H.inc +++ b/Layouts/H.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -Rcp_In EQU 7 ;i -; EQU 6 ;i -; EQU 5 ;i -; EQU 4 ;i -A_Mux EQU 3 ;i -B_Mux EQU 2 ;i -V_Mux EQU 1 ;i -C_Mux EQU 0 ;i +Rcp_In EQU 7 +; EQU 6 +; EQU 5 +; EQU 4 +A_Mux EQU 3 +B_Mux EQU 2 +V_Mux EQU 1 +C_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -A_pwm EQU 6 ;o -B_pwm EQU 5 ;o -C_pwm EQU 4 ;o -; EQU 3 ;i -A_com EQU 2 ;o -B_com EQU 1 ;o -C_com EQU 0 ;o +; EQU 7 +A_pwm EQU 6 +B_pwm EQU 5 +C_pwm EQU 4 +; EQU 3 +A_com EQU 2 +B_com EQU 1 +C_com EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/I.inc b/Layouts/I.inc index 256cd78..3ff7fff 100644 --- a/Layouts/I.inc +++ b/Layouts/I.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -C_Mux EQU 3 ;i -B_Mux EQU 2 ;i -A_Mux EQU 1 ;i -V_Mux EQU 0 ;i +; EQU 7 +; EQU 6 +Rcp_In EQU 5 +; EQU 4 +C_Mux EQU 3 +B_Mux EQU 2 +A_Mux EQU 1 +V_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -74,14 +74,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -A_com EQU 5 ;o -B_com EQU 4 ;o -C_com EQU 3 ;o -A_pwm EQU 2 ;o -B_pwm EQU 1 ;o -C_pwm EQU 0 ;o +; EQU 7 +; EQU 6 +A_com EQU 5 +B_com EQU 4 +C_com EQU 3 +A_pwm EQU 2 +B_pwm EQU 1 +C_pwm EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -93,7 +93,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/J.inc b/Layouts/J.inc index 19cb3c1..9f95cdd 100644 --- a/Layouts/J.inc +++ b/Layouts/J.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -LED_2 EQU 7 ;o -LED_1 EQU 6 ;o -LED_0 EQU 5 ;o -Rcp_In EQU 4 ;i -V_Mux EQU 3 ;i -B_Mux EQU 2 ;i -C_Mux EQU 1 ;i -A_Mux EQU 0 ;i +LED_2 EQU 7 +LED_1 EQU 6 +LED_0 EQU 5 +Rcp_In EQU 4 +V_Mux EQU 3 +B_Mux EQU 2 +C_Mux EQU 1 +A_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -74,14 +74,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -C_com EQU 5 ;o -B_com EQU 4 ;o -A_com EQU 3 ;o -C_pwm EQU 2 ;o -B_pwm EQU 1 ;o -A_pwm EQU 0 ;o +; EQU 7 +; EQU 6 +C_com EQU 5 +B_com EQU 4 +A_com EQU 3 +C_pwm EQU 2 +B_pwm EQU 1 +A_pwm EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -93,7 +93,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/K.inc b/Layouts/K.inc index e8fcb6a..1532b2c 100644 --- a/Layouts/K.inc +++ b/Layouts/K.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -C_Mux EQU 5 ;i -; EQU 4 ;i -B_Mux EQU 3 ;i -V_Mux EQU 2 ;i -A_Mux EQU 1 ;i -Rcp_In EQU 0 ;i +; EQU 7 +; EQU 6 +C_Mux EQU 5 +; EQU 4 +B_Mux EQU 3 +V_Mux EQU 2 +A_Mux EQU 1 +Rcp_In EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -A_pwm EQU 5 ;o -B_pwm EQU 4 ;o -C_pwm EQU 3 ;o -C_com EQU 2 ;o -B_com EQU 1 ;o -A_com EQU 0 ;o +; EQU 7 +; EQU 6 +A_pwm EQU 5 +B_pwm EQU 4 +C_pwm EQU 3 +C_com EQU 2 +B_com EQU 1 +A_com EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/L.inc b/Layouts/L.inc index d880559..e7fbf76 100644 --- a/Layouts/L.inc +++ b/Layouts/L.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -V_Mux EQU 3 ;i -A_Mux EQU 2 ;i -B_Mux EQU 1 ;i -C_Mux EQU 0 ;i +; EQU 7 +; EQU 6 +Rcp_In EQU 5 +; EQU 4 +V_Mux EQU 3 +A_Mux EQU 2 +B_Mux EQU 1 +C_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -74,14 +74,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -A_com EQU 5 ;o -B_com EQU 4 ;o -C_com EQU 3 ;o -A_pwm EQU 2 ;o -B_pwm EQU 1 ;o -C_pwm EQU 0 ;o +; EQU 7 +; EQU 6 +A_com EQU 5 +B_com EQU 4 +C_com EQU 3 +A_pwm EQU 2 +B_pwm EQU 1 +C_pwm EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -93,7 +93,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/M.inc b/Layouts/M.inc index 615309a..46eb85e 100644 --- a/Layouts/M.inc +++ b/Layouts/M.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -A_Mux EQU 7 ;i -C_Mux EQU 6 ;i -V_Mux EQU 5 ;i -B_Mux EQU 4 ;i -Rcp_In EQU 3 ;i -LED_0 EQU 2 ;i -; EQU 1 ;i -; EQU 0 ;i +A_Mux EQU 7 +C_Mux EQU 6 +V_Mux EQU 5 +B_Mux EQU 4 +Rcp_In EQU 3 +LED_0 EQU 2 +; EQU 1 +; EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU NOT(1 SHL LED_0) @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -C_com EQU 6 ;o -B_com EQU 5 ;o -A_com EQU 4 ;o -C_pwm EQU 3 ;i -B_pwm EQU 2 ;o -A_pwm EQU 1 ;o -; EQU 0 ;o +; EQU 7 +C_com EQU 6 +B_com EQU 5 +A_com EQU 4 +C_pwm EQU 3 +B_pwm EQU 2 +A_pwm EQU 1 +; EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/N.inc b/Layouts/N.inc index 8c343f1..13f495f 100644 --- a/Layouts/N.inc +++ b/Layouts/N.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -C_Mux EQU 3 ;i -B_Mux EQU 2 ;i -A_Mux EQU 1 ;i -V_Mux EQU 0 ;i +; EQU 7 +; EQU 6 +Rcp_In EQU 5 +; EQU 4 +C_Mux EQU 3 +B_Mux EQU 2 +A_Mux EQU 1 +V_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -C_pwm EQU 5 ;o -C_com EQU 4 ;o -B_pwm EQU 3 ;o -B_com EQU 2 ;o -A_pwm EQU 1 ;o -A_com EQU 0 ;o +; EQU 7 +; EQU 6 +C_pwm EQU 5 +C_com EQU 4 +B_pwm EQU 3 +B_com EQU 2 +A_pwm EQU 1 +A_com EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/O.inc b/Layouts/O.inc index a6ba672..a5b7056 100644 --- a/Layouts/O.inc +++ b/Layouts/O.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -V_Mux EQU 3 ;i -A_Mux EQU 2 ;i -C_Mux EQU 1 ;i -B_Mux EQU 0 ;i +; EQU 7 +; EQU 6 +Rcp_In EQU 5 +; EQU 4 +V_Mux EQU 3 +A_Mux EQU 2 +C_Mux EQU 1 +B_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -C_com EQU 5 ;o -C_pwm EQU 4 ;o -B_com EQU 3 ;o -B_pwm EQU 2 ;o -A_com EQU 1 ;o -A_pwm EQU 0 ;o +; EQU 7 +; EQU 6 +C_com EQU 5 +C_pwm EQU 4 +B_com EQU 3 +B_pwm EQU 2 +A_com EQU 1 +A_pwm EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -101,7 +101,7 @@ ENDM ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/P.inc b/Layouts/P.inc index 28a5c1a..36e1431 100644 --- a/Layouts/P.inc +++ b/Layouts/P.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -A_Mux EQU 4 ;i -V_Mux EQU 3 ;i -B_Mux EQU 2 ;i -C_Mux EQU 1 ;i -; EQU 0 ;i +; EQU 7 +; EQU 6 +Rcp_In EQU 5 +A_Mux EQU 4 +V_Mux EQU 3 +B_Mux EQU 2 +C_Mux EQU 1 +; EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -C_com EQU 6 ;o -B_com EQU 5 ;o -A_com EQU 4 ;o -C_pwm EQU 3 ;i -B_pwm EQU 2 ;o -A_pwm EQU 1 ;o -; EQU 0 ;o +; EQU 7 +C_com EQU 6 +B_com EQU 5 +A_com EQU 4 +C_pwm EQU 3 +B_pwm EQU 2 +A_pwm EQU 1 +; EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/Q.inc b/Layouts/Q.inc index 7efe4c7..079c005 100644 --- a/Layouts/Q.inc +++ b/Layouts/Q.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -C_pwm EQU 7 ;o -B_pwm EQU 6 ;o -A_pwm EQU 5 ;o -LED_1 EQU 4 ;i -LED_0 EQU 3 ;i -; EQU 2 ;i -Rcp_In EQU 1 ;i -; EQU 0 ;i +C_pwm EQU 7 +B_pwm EQU 6 +A_pwm EQU 5 +LED_1 EQU 4 +LED_0 EQU 3 +; EQU 2 +Rcp_In EQU 1 +; EQU 0 P0_DIGITAL EQU 0FFh @@ -73,14 +73,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -A_Mux EQU 6 ;i -B_Mux EQU 5 ;i -C_Mux EQU 4 ;i -V_Mux EQU 3 ;o -C_com EQU 2 ;o -B_com EQU 1 ;o -A_com EQU 0 ;o +; EQU 7 +A_Mux EQU 6 +B_Mux EQU 5 +C_Mux EQU 4 +V_Mux EQU 3 +C_com EQU 2 +B_com EQU 1 +A_com EQU 0 P_ApwmFET EQU P0.A_pwm @@ -139,7 +139,7 @@ ENDM ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/R.inc b/Layouts/R.inc index 2e89425..1d782cd 100644 --- a/Layouts/R.inc +++ b/Layouts/R.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -C_Mux EQU 3 ;i -B_Mux EQU 2 ;i -A_Mux EQU 1 ;i -V_Mux EQU 0 ;i +; EQU 7 +; EQU 6 +Rcp_In EQU 5 +; EQU 4 +C_Mux EQU 3 +B_Mux EQU 2 +A_Mux EQU 1 +V_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -74,14 +74,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -A_com EQU 5 ;o -B_com EQU 4 ;o -C_com EQU 3 ;o -A_pwm EQU 2 ;o -B_pwm EQU 1 ;o -C_pwm EQU 0 ;o +; EQU 7 +; EQU 6 +A_com EQU 5 +B_com EQU 4 +C_com EQU 3 +A_pwm EQU 2 +B_pwm EQU 1 +C_pwm EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -93,7 +93,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/S.inc b/Layouts/S.inc index fc26a01..79005e2 100644 --- a/Layouts/S.inc +++ b/Layouts/S.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -V_Mux EQU 3 ;i -A_Mux EQU 2 ;i -C_Mux EQU 1 ;i -B_Mux EQU 0 ;i +; EQU 7 +; EQU 6 +Rcp_In EQU 5 +; EQU 4 +V_Mux EQU 3 +A_Mux EQU 2 +C_Mux EQU 1 +B_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -C_pwm EQU 5 ;o -C_com EQU 4 ;o -B_pwm EQU 3 ;o -B_com EQU 2 ;o -A_pwm EQU 1 ;o -A_com EQU 0 ;o +; EQU 7 +; EQU 6 +C_pwm EQU 5 +C_com EQU 4 +B_pwm EQU 3 +B_com EQU 2 +A_pwm EQU 1 +A_com EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/T.inc b/Layouts/T.inc index 09e97eb..821aa70 100644 --- a/Layouts/T.inc +++ b/Layouts/T.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -Rcp_In EQU 7 ;i -; EQU 6 ;i -A_Mux EQU 5 ;i -; EQU 4 ;i -B_Mux EQU 3 ;i -V_Mux EQU 2 ;i -C_Mux EQU 1 ;i -; EQU 0 ;i +Rcp_In EQU 7 +; EQU 6 +A_Mux EQU 5 +; EQU 4 +B_Mux EQU 3 +V_Mux EQU 2 +C_Mux EQU 1 +; EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -C_pwm EQU 5 ;o -B_pwm EQU 4 ;o -A_pwm EQU 3 ;o -A_com EQU 2 ;o -B_com EQU 1 ;o -C_com EQU 0 ;o +; EQU 7 +; EQU 6 +C_pwm EQU 5 +B_pwm EQU 4 +A_pwm EQU 3 +A_com EQU 2 +B_com EQU 1 +C_com EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/U.inc b/Layouts/U.inc index 6810955..c1d42ec 100644 --- a/Layouts/U.inc +++ b/Layouts/U.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -A_Mux EQU 7 ;i -C_Mux EQU 6 ;i -V_Mux EQU 5 ;i -B_Mux EQU 4 ;i -Rcp_In EQU 3 ;i -LED_0 EQU 2 ;i -LED_1 EQU 1 ;i -LED_2 EQU 0 ;i +A_Mux EQU 7 +C_Mux EQU 6 +V_Mux EQU 5 +B_Mux EQU 4 +Rcp_In EQU 3 +LED_0 EQU 2 +LED_1 EQU 1 +LED_2 EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -C_com EQU 6 ;o -B_com EQU 5 ;o -A_com EQU 4 ;o -C_pwm EQU 3 ;i -B_pwm EQU 2 ;o -A_pwm EQU 1 ;o -; EQU 0 ;o +; EQU 7 +C_com EQU 6 +B_com EQU 5 +A_com EQU 4 +C_pwm EQU 3 +B_pwm EQU 2 +A_pwm EQU 1 +; EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/V.inc b/Layouts/V.inc index 92a8ef6..2e62258 100644 --- a/Layouts/V.inc +++ b/Layouts/V.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -C_com EQU 7 ;o -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -C_Mux EQU 3 ;i -V_Mux EQU 2 ;i -B_Mux EQU 1 ;i -A_Mux EQU 0 ;i +C_com EQU 7 +; EQU 6 +Rcp_In EQU 5 +; EQU 4 +C_Mux EQU 3 +V_Mux EQU 2 +B_Mux EQU 1 +A_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) @@ -73,14 +73,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -A_pwm EQU 6 ;i -A_com EQU 5 ;i -B_pwm EQU 4 ;o -; EQU 3 ;o -; EQU 2 ;o -B_com EQU 1 ;o -C_pwm EQU 0 ;o +; EQU 7 +A_pwm EQU 6 +A_com EQU 5 +B_pwm EQU 4 +; EQU 3 +; EQU 2 +B_com EQU 1 +C_pwm EQU 0 P_ApwmFET EQU P1.A_pwm @@ -139,7 +139,7 @@ ENDM ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/W.inc b/Layouts/W.inc index 7bee8a2..f0e00a0 100644 --- a/Layouts/W.inc +++ b/Layouts/W.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -Rcp_In EQU 7 ;i -C_Mux EQU 6 ;i -B_Mux EQU 5 ;i -; EQU 4 ;i -V_Mux EQU 3 ;i -A_Mux EQU 2 ;i -; EQU 1 ;i -; EQU 0 ;i +Rcp_In EQU 7 +C_Mux EQU 6 +B_Mux EQU 5 +; EQU 4 +V_Mux EQU 3 +A_Mux EQU 2 +; EQU 1 +; EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -A_pwm EQU 6 ;o -B_pwm EQU 5 ;o -C_pwm EQU 4 ;o -; EQU 3 ;i -; EQU 2 ;i -; EQU 1 ;i -; EQU 0 ;i +; EQU 7 +A_pwm EQU 6 +B_pwm EQU 5 +C_pwm EQU 4 +; EQU 3 +; EQU 2 +; EQU 1 +; EQU 0 ; pwm outputs start as analog in -> floating @@ -176,7 +176,7 @@ ENDM ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) diff --git a/Layouts/Z.inc b/Layouts/Z.inc index 966583a..cb9acf3 100644 --- a/Layouts/Z.inc +++ b/Layouts/Z.inc @@ -54,14 +54,14 @@ ENDIF ;********************* ; PORT 0 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -Rcp_In EQU 5 ;i -; EQU 4 ;i -V_Mux EQU 3 ;i -A_Mux EQU 2 ;i -C_Mux EQU 1 ;i -B_Mux EQU 0 ;i +; EQU 7 +; EQU 6 +Rcp_In EQU 5 +; EQU 4 +V_Mux EQU 3 +A_Mux EQU 2 +C_Mux EQU 1 +B_Mux EQU 0 P0_DIGITAL EQU NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL V_Mux)) P0_INIT EQU 0FFh @@ -72,14 +72,14 @@ P0_SKIP EQU 0FFh ;********************* ; PORT 1 definitions * ;********************* -; EQU 7 ;i -; EQU 6 ;i -C_pwm EQU 5 ;o -C_com EQU 4 ;o -B_pwm EQU 3 ;o -B_com EQU 2 ;o -A_pwm EQU 1 ;o -A_com EQU 0 ;o +; EQU 7 +; EQU 6 +C_pwm EQU 5 +C_com EQU 4 +B_pwm EQU 3 +B_com EQU 2 +A_pwm EQU 1 +A_com EQU 0 P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) @@ -91,7 +91,7 @@ P1_SKIP EQU 0FFh ;********************* ; PORT 2 definitions * ;********************* -DebugPin EQU 0 ;o +DebugPin EQU 0 P2_DIGITAL EQU (1 SHL DebugPin) P2_PUSHPULL EQU (1 SHL DebugPin) From 53ee4bc75944672ac7ccaa2cd70c81aa2b1aea1a Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Sat, 20 Feb 2021 00:09:53 +0100 Subject: [PATCH 18/19] style: Organize and clean up layouts --- Bluejay.asm | 10 +++++----- Layouts/Base.inc | 41 ++++++++++++++++++++++------------------- Layouts/C.inc | 36 +++++++++++++++++++----------------- Layouts/D.inc | 2 +- Layouts/E.inc | 2 +- Layouts/G.inc | 2 +- Layouts/J.inc | 2 -- Layouts/L.inc | 4 +--- Layouts/N.inc | 2 +- Layouts/O.inc | 19 +++++++++---------- Layouts/P.inc | 2 +- Layouts/Q.inc | 36 +++++++++++++++++++----------------- Layouts/R.inc | 4 +--- Layouts/S.inc | 2 +- Layouts/U.inc | 2 +- Layouts/V.inc | 36 +++++++++++++++++++----------------- Layouts/W.inc | 13 ++++++------- Layouts/Z.inc | 2 +- 18 files changed, 109 insertions(+), 108 deletions(-) diff --git a/Bluejay.asm b/Bluejay.asm index b76db73..35d82a3 100644 --- a/Bluejay.asm +++ b/Bluejay.asm @@ -75,13 +75,13 @@ H_ EQU 8 ; Cm Vn Bm Am __ __ __ RX Cc Bc Ac __ Cp Bp Ap __ I_ EQU 9 ; Vn Am Bm Cm __ RX __ __ Cp Bp Ap Cc Bc Ac __ __ J_ EQU 10 ; Am Cm Bm Vn RX L0 L1 L2 Ap Bp Cp Ac Bc Cc __ __ LEDs K_ EQU 11 ; RX Am Vn Bm __ Cm __ __ Ac Bc Cc Cp Bp Ap __ __ Com fets inverted -L_ EQU 12 ; Cm Bm Am Vn __ RX __ __ Cp Bp Ap Cc Bc Ac __ __ +L_ EQU 12 ; Cm Bm Am Vn __ RX __ __ Cp Bp Ap Cc Bc Ac __ __ Like I with different mux pins M_ EQU 13 ; __ __ L0 RX Bm Vn Cm Am __ Ap Bp Cp Ac Bc Cc __ LED -N_ EQU 14 ; Vn Am Bm Cm __ RX __ __ Ac Ap Bc Bp Cc Cp __ __ +N_ EQU 14 ; Vn Am Bm Cm __ RX __ __ Ac Ap Bc Bp Cc Cp __ __ Like B, with A and C fets swapped O_ EQU 15 ; Bm Cm Am Vn __ RX __ __ Ap Ac Bp Bc Cp Cc __ __ Like D, but low side pwm -P_ EQU 16 ; __ Cm Bm Vn Am RX __ __ __ Ap Bp Cp Ac Bc Cc __ +P_ EQU 16 ; __ Cm Bm Vn Am RX __ __ __ Ap Bp Cp Ac Bc Cc __ Like M, without LEDs and different mux Q_ EQU 17 ; __ RX __ L0 L1 Ap Bp Cp Ac Bc Cc Vn Cm Bm Am __ LEDs -R_ EQU 18 ; Vn Am Bm Cm __ RX __ __ Cp Bp Ap Cc Bc Ac __ __ +R_ EQU 18 ; Vn Am Bm Cm __ RX __ __ Cp Bp Ap Cc Bc Ac __ __ Like L, with different mux pins S_ EQU 19 ; Bm Cm Am Vn __ RX __ __ Ap Ac Bp Bc Cp Cc __ __ Like O, but com fets inverted T_ EQU 20 ; __ Cm Vn Bm __ Am __ RX Cc Bc Ac Ap Bp Cp __ __ U_ EQU 21 ; L2 L1 L0 RX Bm Vn Cm Am __ Ap Bp Cp Ac Bc Cc __ Like M, but with 3 LEDs @@ -89,7 +89,7 @@ V_ EQU 22 ; Am Bm Vn Cm __ RX __ Cc Cp Bc __ __ Bp Ac Ap __ W_ EQU 23 ; __ __ Am Vn __ Bm Cm RX __ __ __ __ Cp Bp Ap __ Tristate gate driver X_ EQU 24 Y_ EQU 25 -Z_ EQU 26 ; Bm Cm Am Vn __ RX __ __ Ac Ap Bc Bp Cc Cp __ __ +Z_ EQU 26 ; Bm Cm Am Vn __ RX __ __ Ac Ap Bc Bp Cc Cp __ __ Pwm fets inverted ;**** **** **** **** **** ; Select the port mapping to use (or unselect all for use with external batch compile file) diff --git a/Layouts/Base.inc b/Layouts/Base.inc index c1198ec..64bf781 100644 --- a/Layouts/Base.inc +++ b/Layouts/Base.inc @@ -34,6 +34,7 @@ ;**** **** **** **** **** ; Bootloader definitions ;**** **** **** **** **** +; Note: The RTX pin must be on port 0 because we use the IT01CF register for interrupts RTX_PORT EQU P0 ; Receive/Transmit port RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL @@ -122,12 +123,12 @@ Initialize_Comparator MACRO mov CMP_MD, #00h ;; Comparator response time 100ns ENDM +$endif + Read_Comp_Out MACRO mov A, CMP_CN0 ;; Read comparator output ENDM -$endif - ; Set comparator multiplexer to phase A Set_Comp_Phase_A MACRO mov CMP_MX, #((A_Mux SHL 4) + V_Mux) @@ -144,12 +145,30 @@ Set_Comp_Phase_C MACRO ENDM +; Toggle FETs 'on' and 'off' +IF PWM_ACTIVE_HIGH == 1 ; PWM FET active high +pON LIT 'setb' +pOFF LIT 'clr' +ELSE ; PWM FET active low +pON LIT 'clr' +pOFF LIT 'setb' +ENDIF + +IF COMPWM_ACTIVE_HIGH == 1 ; COM FET active high +cON LIT 'setb' +cOFF LIT 'clr' +ELSE ; COM FET active low +cON LIT 'clr' +cOFF LIT 'setb' +ENDIF + + ;**** **** **** **** **** ; PWM phase change ;**** **** **** **** **** $if NOT CUSTOM_PWM_PHASE -; All pwm and com pins must be on port 1 +; All pwm and complementary pwm pins must be on port 1 to use the base code below P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com P_BpwmFET EQU P1.B_pwm @@ -196,22 +215,6 @@ $endif ;**** **** **** **** **** $if NOT CUSTOM_FET_TOGGLING -IF PWM_ACTIVE_HIGH == 1 ; PWM FET active high -pON LIT 'setb' -pOFF LIT 'clr' -ELSE ; PWM FET active low -pON LIT 'clr' -pOFF LIT 'setb' -ENDIF - -IF COMPWM_ACTIVE_HIGH == 1 ; COM FET active high -cON LIT 'setb' -cOFF LIT 'clr' -ELSE ; COM FET active low -cON LIT 'clr' -cOFF LIT 'setb' -ENDIF - ApwmFET_on MACRO pON P_ApwmFET IF FETON_DELAY == 0 diff --git a/Layouts/C.inc b/Layouts/C.inc index 63eea99..d464ee7 100644 --- a/Layouts/C.inc +++ b/Layouts/C.inc @@ -83,6 +83,25 @@ B_com EQU 1 B_pwm EQU 0 +P1_DIGITAL EQU (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL B_com) + (1 SHL C_com) +P1_SKIP EQU 0FFh + + +;********************* +; PORT 2 definitions * +;********************* +DebugPin EQU 0 + +P2_DIGITAL EQU (1 SHL DebugPin) +P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh + + +;**** **** **** **** **** +; PWM Phase +;**** **** **** **** **** P_ApwmFET EQU P0.A_pwm P_AcomFET EQU P0.A_com P_BpwmFET EQU P1.B_pwm @@ -90,13 +109,6 @@ P_BcomFET EQU P1.B_com P_CpwmFET EQU P1.C_pwm P_CcomFET EQU P1.C_com - -P1_DIGITAL EQU (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL B_com) + (1 SHL C_com) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU 0FFh - - Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET @@ -136,16 +148,6 @@ Set_Pwms_Off MACRO ENDM -;********************* -; PORT 2 definitions * -;********************* -DebugPin EQU 0 - -P2_DIGITAL EQU (1 SHL DebugPin) -P2_PUSHPULL EQU (1 SHL DebugPin) -P2_SKIP EQU 0FFh - - ;**** **** **** **** **** ; Inherit base layout ;**** **** **** **** **** diff --git a/Layouts/D.inc b/Layouts/D.inc index 5109d1b..0725874 100644 --- a/Layouts/D.inc +++ b/Layouts/D.inc @@ -22,7 +22,7 @@ ; ;**** **** **** **** **** ; -; Hardware definition file "D". Com fets are active low for H/L_N driver and EN_N/PWM driver +; Hardware definition file "D". Com fets are active low for H/L_N driver and EN_N/PWM driver. A with different comp ; X X RC X CC MA MC MB X X Cc Cp Bc Bp Ac Ap ; ;**** **** **** **** **** diff --git a/Layouts/E.inc b/Layouts/E.inc index 590e663..6a3947f 100644 --- a/Layouts/E.inc +++ b/Layouts/E.inc @@ -99,7 +99,7 @@ P2_SKIP EQU 0FFh ;**** **** **** **** **** -; MCU specific +; ESC specific ;**** **** **** **** **** Initialize_Xbar MACRO mov XBR2, #40h ;; Xbar enabled diff --git a/Layouts/G.inc b/Layouts/G.inc index c301d73..0a1cc5b 100644 --- a/Layouts/G.inc +++ b/Layouts/G.inc @@ -22,7 +22,7 @@ ; ;**** **** **** **** **** ; -; Hardware definition file "G" +; Hardware definition file "G". A with different comp ordering ; X X RC X CC MA MC MB X X Cc Cp Bc Bp Ac Ap ; ;**** **** **** **** **** diff --git a/Layouts/J.inc b/Layouts/J.inc index 9f95cdd..5e704f8 100644 --- a/Layouts/J.inc +++ b/Layouts/J.inc @@ -69,8 +69,6 @@ P0_PUSHPULL EQU (1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2) P0_SKIP EQU 0FFh - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/L.inc b/Layouts/L.inc index e7fbf76..650ad78 100644 --- a/Layouts/L.inc +++ b/Layouts/L.inc @@ -22,7 +22,7 @@ ; ;**** **** **** **** **** ; -; Hardware definition file "L" +; Hardware definition file "L". I with different comp ordering ; X X RC X CC MA MB MC X X Ac Bc Cc Ap Bp Cp ; ;**** **** **** **** **** @@ -69,8 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/N.inc b/Layouts/N.inc index 13f495f..3a0aa5b 100644 --- a/Layouts/N.inc +++ b/Layouts/N.inc @@ -22,7 +22,7 @@ ; ;**** **** **** **** **** ; -; Hardware definition file "N" +; Hardware definition file "N". B with A and C fets swapped ; X X RC X MC MB MA CC X X Cp Cc Bp Bc Ap Ac ; ;**** **** **** **** **** diff --git a/Layouts/O.inc b/Layouts/O.inc index a5b7056..9a0597d 100644 --- a/Layouts/O.inc +++ b/Layouts/O.inc @@ -88,16 +88,6 @@ P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + P1_SKIP EQU 0FFh -Initialize_Comparator MACRO - mov CMP_CN0, #80h ;; Comparator enabled, no hysteresis - mov CMP_MD, #40h ;; Comparator response time 100ns, Output polarity inverted -ENDM - -Read_Comp_Out MACRO - mov A, CMP_CN0 ;; Read comparator output -ENDM - - ;********************* ; PORT 2 definitions * ;********************* @@ -108,6 +98,15 @@ P2_PUSHPULL EQU (1 SHL DebugPin) P2_SKIP EQU 0FFh +;**** **** **** **** **** +; Comparator setup +;**** **** **** **** **** +Initialize_Comparator MACRO + mov CMP_CN0, #80h ;; Comparator enabled, no hysteresis + mov CMP_MD, #40h ;; Comparator response time 100ns, Output polarity inverted +ENDM + + ;**** **** **** **** **** ; Inherit base layout ;**** **** **** **** **** diff --git a/Layouts/P.inc b/Layouts/P.inc index 36e1431..86cf601 100644 --- a/Layouts/P.inc +++ b/Layouts/P.inc @@ -22,7 +22,7 @@ ; ;**** **** **** **** **** ; -; Hardware definition file "P". +; Hardware definition file "P". M with different comp and no LEDs ; X X RC MA CC MB MC X X Cc Bc Ac Cp Bp Ap X ; ;**** **** **** **** **** diff --git a/Layouts/Q.inc b/Layouts/Q.inc index 079c005..20a7ecb 100644 --- a/Layouts/Q.inc +++ b/Layouts/Q.inc @@ -83,6 +83,25 @@ B_com EQU 1 A_com EQU 0 +P1_DIGITAL EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) +P1_SKIP EQU 0FFh + + +;********************* +; PORT 2 definitions * +;********************* +DebugPin EQU 0 + +P2_DIGITAL EQU (1 SHL DebugPin) +P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh + + +;**** **** **** **** **** +; PWM Phase +;**** **** **** **** **** P_ApwmFET EQU P0.A_pwm P_AcomFET EQU P1.A_com P_BpwmFET EQU P0.B_pwm @@ -90,13 +109,6 @@ P_BcomFET EQU P1.B_com P_CpwmFET EQU P0.C_pwm P_CcomFET EQU P1.C_com - -P1_DIGITAL EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) -P1_SKIP EQU 0FFh - - Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET @@ -136,16 +148,6 @@ Set_Pwms_Off MACRO ENDM -;********************* -; PORT 2 definitions * -;********************* -DebugPin EQU 0 - -P2_DIGITAL EQU (1 SHL DebugPin) -P2_PUSHPULL EQU (1 SHL DebugPin) -P2_SKIP EQU 0FFh - - ;**** **** **** **** **** ; LED configuration ;**** **** **** **** **** diff --git a/Layouts/R.inc b/Layouts/R.inc index 1d782cd..bdafb15 100644 --- a/Layouts/R.inc +++ b/Layouts/R.inc @@ -22,7 +22,7 @@ ; ;**** **** **** **** **** ; -; Hardware definition file "R". +; Hardware definition file "R". L with different comp ; X X RC X MC MB MA CC X X Ac Bc Cc Ap Bp Cp ; ;**** **** **** **** **** @@ -69,8 +69,6 @@ P0_PUSHPULL EQU 0 P0_SKIP EQU 0FFh - - ;********************* ; PORT 1 definitions * ;********************* diff --git a/Layouts/S.inc b/Layouts/S.inc index 79005e2..da79c10 100644 --- a/Layouts/S.inc +++ b/Layouts/S.inc @@ -22,7 +22,7 @@ ; ;**** **** **** **** **** ; -; Hardware definition file "S". like "O" but Com fets are active high, Pwm fets are active low +; Hardware definition file "S". like "O" but Com fets are active high, Pwm fets are active low. N with different comp ; X X RC X CC MA MC MB X X Cc Cp Bc Bp Ac Ap ; ;**** **** **** **** **** diff --git a/Layouts/U.inc b/Layouts/U.inc index c1d42ec..d83a192 100644 --- a/Layouts/U.inc +++ b/Layouts/U.inc @@ -22,7 +22,7 @@ ; ;**** **** **** **** **** ; -; Hardware definition file "U". +; Hardware definition file "U". Like M, but with 3 LEDs ; MA MC CC MB RC L0 L1 L2 X Cc Bc Ac Cp Bp Ap X ; ;**** **** **** **** **** diff --git a/Layouts/V.inc b/Layouts/V.inc index 2e62258..5dce934 100644 --- a/Layouts/V.inc +++ b/Layouts/V.inc @@ -83,6 +83,25 @@ B_com EQU 1 C_pwm EQU 0 +P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) +P1_INIT EQU 00h +P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) +P1_SKIP EQU 0FFh + + +;********************* +; PORT 2 definitions * +;********************* +DebugPin EQU 0 + +P2_DIGITAL EQU (1 SHL DebugPin) +P2_PUSHPULL EQU (1 SHL DebugPin) +P2_SKIP EQU 0FFh + + +;**** **** **** **** **** +; PWM Phase +;**** **** **** **** **** P_ApwmFET EQU P1.A_pwm P_AcomFET EQU P1.A_com P_BpwmFET EQU P1.B_pwm @@ -90,13 +109,6 @@ P_BcomFET EQU P1.B_com P_CpwmFET EQU P1.C_pwm P_CcomFET EQU P0.C_com - -P1_DIGITAL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) -P1_INIT EQU 00h -P1_PUSHPULL EQU (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) -P1_SKIP EQU 0FFh - - Set_Pwm_A MACRO IF FETON_DELAY == 0 cON P_AcomFET @@ -136,16 +148,6 @@ Set_Pwms_Off MACRO ENDM -;********************* -; PORT 2 definitions * -;********************* -DebugPin EQU 0 - -P2_DIGITAL EQU (1 SHL DebugPin) -P2_PUSHPULL EQU (1 SHL DebugPin) -P2_SKIP EQU 0FFh - - ;**** **** **** **** **** ; Inherit base layout ;**** **** **** **** **** diff --git a/Layouts/W.inc b/Layouts/W.inc index f0e00a0..d8b50e4 100644 --- a/Layouts/W.inc +++ b/Layouts/W.inc @@ -87,12 +87,11 @@ C_pwm EQU 4 P1_DIGITAL EQU NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm)) P1_INIT EQU 00h P1_PUSHPULL EQU ((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm)) -; P1_SKIP EQU 0FFh ApwmFET_on MACRO - setb P1.A_pwm ; set pin to high + setb P1.A_pwm ; set pin to high orl P1MDIN, #(1 SHL A_pwm) ; enable pin driver ENDM @@ -101,7 +100,7 @@ ApwmFET_off MACRO ENDM BpwmFET_on MACRO - setb P1.B_pwm ; set pin to high + setb P1.B_pwm ; set pin to high orl P1MDIN, #(1 SHL B_pwm) ; enable pin driver ENDM @@ -110,7 +109,7 @@ BpwmFET_off MACRO ENDM CpwmFET_on MACRO - setb P1.C_pwm ; set pin to high + setb P1.C_pwm ; set pin to high orl P1MDIN, #(1 SHL C_pwm) ; enable pin driver ENDM @@ -123,7 +122,7 @@ All_pwmFETs_Off MACRO ENDM AcomFET_on MACRO - clr P1.A_pwm ; set pin to low + clr P1.A_pwm ; set pin to low orl P1MDIN, #(1 SHL A_pwm) ; enable pin driver ENDM @@ -132,7 +131,7 @@ AcomFET_off MACRO ENDM BcomFET_on MACRO - clr P1.B_pwm ; set pin to low + clr P1.B_pwm ; set pin to low orl P1MDIN, #(1 SHL B_pwm) ; enable pin driver ENDM @@ -141,7 +140,7 @@ BcomFET_off MACRO ENDM CcomFET_on MACRO - clr P1.C_pwm ; set pin to low + clr P1.C_pwm ; set pin to low orl P1MDIN, #(1 SHL C_pwm) ; enable pin driver ENDM diff --git a/Layouts/Z.inc b/Layouts/Z.inc index cb9acf3..452a87f 100644 --- a/Layouts/Z.inc +++ b/Layouts/Z.inc @@ -22,7 +22,7 @@ ; ;**** **** **** **** **** ; -; Hardware definition file "Z" +; Hardware definition file "Z". N different comp and pwm active low ; X X RC X CC MA MC MB X X Cp Cc Bp Bc Ap Ac ; ;**** **** **** **** **** From c09a81e46207afd8e0dc3025836af617de65889c Mon Sep 17 00:00:00 2001 From: Mathias Rasmussen Date: Sat, 20 Feb 2021 06:02:29 +0100 Subject: [PATCH 19/19] refactor: Center align all pwm channels --- Common.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Common.inc b/Common.inc index 809a36a..1430639 100644 --- a/Common.inc +++ b/Common.inc @@ -159,7 +159,7 @@ Initialize_PCA MACRO mov PCA0PWM, #(80h + PWM_BITS_H) ;; Enable PCA auto-reload registers and set pwm cycle length (8-11 bits) IF PWM_CENTERED == 1 - mov PCA0CENT, #03h ;; Center aligned pwm + mov PCA0CENT, #07h ;; Center aligned pwm ELSE mov PCA0CENT, #00h ;; Edge aligned pwm ENDIF