diff --git a/targets/A.inc b/targets/A.inc
index f62c116..611fe54 100644
--- a/targets/A.inc
+++ b/targets/A.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -48,9 +52,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -84,30 +85,12 @@ A_com		EQU	1	;o
 A_pwm		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -118,3 +101,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/B.inc b/targets/B.inc
index ef43558..e82e083 100644
--- a/targets/B.inc
+++ b/targets/B.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -49,9 +53,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -85,28 +86,12 @@ C_pwm		EQU	1	;o
 C_com		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -117,3 +102,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/Base.inc b/targets/Base.inc
index f82f1b0..86ab53c 100644
--- a/targets/Base.inc
+++ b/targets/Base.inc
@@ -1,14 +1,44 @@
-
+;**** **** **** **** ****
+;
+; Bluejay digital ESC firmware for controlling brushless motors in multirotors
+;
+; Copyright 2020 Mathias Rasmussen
+; Copyright 2011, 2012 Steffen Skaug
+;
+; This file is part of Bluejay.
+;
+; Bluejay is free software: you can redistribute it and/or modify
+; it under the terms of the GNU General Public License as published by
+; the Free Software Foundation, either version 3 of the License, or
+; (at your option) any later version.
+;
+; Bluejay is distributed in the hope that it will be useful,
+; but WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+; GNU General Public License for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with Bluejay.  If not, see <http://www.gnu.org/licenses/>.
+;
+;**** **** **** **** ****
+;
+; Base layout
+;
+; The inheriting layout should
+; - Specify PWM_ACTIVE_HIGH, COMPWM_ACTIVE_HIGH and COMP_PORT
+; - Set CUSTOM_* flags to override default implementation
+;
+;**** **** **** **** ****
 
 
 ;**** **** **** **** ****
 ; Bootloader definitions
 ;**** **** **** **** ****
-RTX_PORT				EQU	P0		; Receive/Transmit port
-RTX_MDOUT				EQU	P0MDOUT	; Set to 1 for PUSHPULL
-RTX_MDIN				EQU	P0MDIN	; Set to 1 for DIGITAL
-RTX_SKIP				EQU	P0SKIP	; Set to 1 for SKIP
-RTX_PIN				EQU	Rcp_In	; RTX pin
+RTX_PORT		EQU	P0				; Receive/Transmit port
+RTX_MDOUT		EQU	P0MDOUT			; Set to 1 for PUSHPULL
+RTX_MDIN		EQU	P0MDIN			; Set to 1 for DIGITAL
+RTX_SKIP		EQU	P0SKIP			; Set to 1 for SKIP
+RTX_PIN		EQU	Rcp_In			; RTX pin
 
 
 ;**** **** **** **** ****
@@ -17,8 +47,8 @@ RTX_PIN				EQU	Rcp_In	; RTX pin
 $if NOT CUSTOM_PWM_SETUP
 
 Initialize_Xbar MACRO
-	mov	XBR2, #40h	;; Xbar enabled
-	mov	XBR1, #02h	;; CEX0 and CEX1 routed to pins
+	mov	XBR2, #40h				;; Xbar enabled
+	mov	XBR1, #02h				;; CEX0 and CEX1 routed to pins
 ENDM
 
 Set_Pwm_Polarity MACRO
@@ -36,41 +66,41 @@ $endif
 ; Comparator setup and phase change
 ;**** **** **** **** ****
 IF COMP_PORT == 0
-CMP_CN0	EQU	CMP0CN0
-CMP_MD	EQU	CMP0MD
-CMP_MX	EQU	CMP0MX
+CMP_CN0		EQU	CMP0CN0
+CMP_MD		EQU	CMP0MD
+CMP_MX		EQU	CMP0MX
 ELSE
-CMP_CN0	EQU	CMP1CN0
-CMP_MD	EQU	CMP1MD
-CMP_MX	EQU	CMP1MX
+CMP_CN0		EQU	CMP1CN0
+CMP_MD		EQU	CMP1MD
+CMP_MX		EQU	CMP1MX
 ENDIF
 
 $if NOT CUSTOM_COMP_SETUP
 
 Initialize_Comparator MACRO
-	mov	CMP_CN0, #80h	;; Comparator enabled, no hysteresis
-	mov	CMP_MD, #00h	;; Comparator response time 100ns
+	mov	CMP_CN0, #80h				;; Comparator enabled, no hysteresis
+	mov	CMP_MD, #00h				;; Comparator response time 100ns
 ENDM
 
 Read_Comp_Out MACRO
-	mov	A, CMP_CN0	;; Read comparator output
+	mov	A, CMP_CN0				;; Read comparator output
 ENDM
 
 $endif
 
 ; Set comparator multiplexer to phase A
 Set_Comp_Phase_A MACRO
-	mov CMP_MX, #((A_Mux SHL 4) + Comp_Com)
+	mov	CMP_MX, #((A_Mux SHL 4) + Comp_Com)
 ENDM
 
 ; Set comparator multiplexer to phase B
 Set_Comp_Phase_B MACRO
-	mov CMP_MX, #((B_Mux SHL 4) + Comp_Com)
+	mov	CMP_MX, #((B_Mux SHL 4) + Comp_Com)
 ENDM
 
 ; Set comparator multiplexer to phase C
 Set_Comp_Phase_C MACRO
-	mov CMP_MX, #((C_Mux SHL 4) + Comp_Com)
+	mov	CMP_MX, #((C_Mux SHL 4) + Comp_Com)
 ENDM
 
 
@@ -122,22 +152,22 @@ $endif
 
 
 ;**** **** **** **** ****
-; Fets on/off toggling
+; Toggling FETs on/off
 ;**** **** **** **** ****
 $if NOT CUSTOM_FET_TOGGLING
 
-IF PWM_ACTIVE_HIGH == 1		; fet active high
+IF PWM_ACTIVE_HIGH == 1				; PWM FET active high
 pON	LIT	'setb'
 pOFF	LIT	'clr'
-ELSE						; fet active low
+ELSE								; PWM FET active low
 pON	LIT	'clr'
 pOFF	LIT	'setb'
 ENDIF
 
-IF COMPWM_ACTIVE_HIGH == 1	; comfet active high
+IF COMPWM_ACTIVE_HIGH == 1			; COM FET active high
 cON	LIT	'setb'
 cOFF	LIT	'clr'
-ELSE						; comfet active low
+ELSE								; COM FET active low
 cON	LIT	'clr'
 cOFF	LIT	'setb'
 ENDIF
@@ -194,7 +224,6 @@ All_pwmFETs_Off MACRO
 ENDM
 
 
-
 AcomFET_on MACRO
 IF FETON_DELAY == 0
 	pOFF	P_ApwmFET
@@ -237,39 +266,11 @@ ENDM
 $endif
 
 
-$if NOT CUSTOM_LED
-
-Set_LED_0 MACRO
-ENDM
-
-Clear_LED_0 MACRO
-ENDM
-
-Set_LED_1 MACRO
-ENDM
-
-Clear_LED_1 MACRO
-ENDM
-
-Set_LED_2 MACRO
-ENDM
-
-Clear_LED_2 MACRO
-ENDM
-
-Set_LED_3 MACRO
-ENDM
-
-Clear_LED_3 MACRO
-ENDM
-
-$endif
-
 ;**** **** **** **** ****
 ; ADC and temperature measurement
 ;**** **** **** **** ****
-TEMP_LIMIT			EQU	49		; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1)
-TEMP_LIMIT_STEP		EQU	9		; Temperature measurement ADC value increment for another 10degC
+TEMP_LIMIT		EQU	49			; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1)
+TEMP_LIMIT_STEP	EQU	9			; Temperature measurement ADC value increment for another 10degC
 
 Initialize_Adc MACRO
 	mov	REF0CN, #0Ch				;; Set vdd (3.3V) as reference. Enable temp sensor and bias
@@ -296,3 +297,33 @@ Stop_Adc MACRO
 ENDM
 
 
+;**** **** **** **** ****
+; LEDs
+;**** **** **** **** ****
+$if NOT CUSTOM_LED
+
+Set_LED_0 MACRO
+ENDM
+
+Clear_LED_0 MACRO
+ENDM
+
+Set_LED_1 MACRO
+ENDM
+
+Clear_LED_1 MACRO
+ENDM
+
+Set_LED_2 MACRO
+ENDM
+
+Clear_LED_2 MACRO
+ENDM
+
+Set_LED_3 MACRO
+ENDM
+
+Clear_LED_3 MACRO
+ENDM
+
+$endif
diff --git a/targets/C.inc b/targets/C.inc
index 416ba1b..9e5eb4e 100644
--- a/targets/C.inc
+++ b/targets/C.inc
@@ -27,8 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
-
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 ;*********************
@@ -44,15 +47,11 @@ Comp_Com		EQU	2	;i
 Rcp_In		EQU	0	;i
 
 
-
 P0_DIGITAL	EQU	NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com))
 P0_INIT		EQU	NOT((1 SHL A_pwm) + (1 SHL A_com))
 P0_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL A_com)
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -86,7 +85,6 @@ B_com		EQU	1	;o
 B_pwm		EQU	0	;o
 
 
-
 P_ApwmFET		EQU	P0.A_pwm
 P_AcomFET		EQU	P0.A_com
 P_BpwmFET		EQU	P1.B_pwm
@@ -94,12 +92,6 @@ P_BcomFET		EQU	P1.B_com
 P_CpwmFET		EQU	P1.C_pwm
 P_CcomFET		EQU	P1.C_com
 
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-$set(CUSTOM_PWM_PHASE)
-
-$include (Base.inc)
 
 P1_DIGITAL	EQU	(1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
@@ -107,7 +99,6 @@ P1_PUSHPULL	EQU	(1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
 Set_Pwm_A MACRO
 IF FETON_DELAY == 0
 	cON	P_AcomFET
@@ -147,8 +138,6 @@ Set_Pwms_Off MACRO
 ENDM
 
 
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -159,3 +148,8 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$set(CUSTOM_PWM_PHASE)
+$include (Base.inc)
diff --git a/targets/D.inc b/targets/D.inc
index 7303830..a111e05 100644
--- a/targets/D.inc
+++ b/targets/D.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	0		; Damping non-inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -48,9 +52,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	0		; Damping non-inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -84,28 +85,12 @@ A_com		EQU	1	;o
 A_pwm		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	(1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -116,3 +101,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/E.inc b/targets/E.inc
index a2b431a..26d498a 100644
--- a/targets/E.inc
+++ b/targets/E.inc
@@ -27,8 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
-
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 ;*********************
@@ -48,9 +51,6 @@ P0_INIT		EQU	NOT((1 SHL LED_0) + (1 SHL LED_1))
 P0_PUSHPULL	EQU	(1 SHL LED_0) + (1 SHL LED_1)
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -84,29 +84,12 @@ A_com		EQU	1	;o
 A_pwm		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-$set(CUSTOM_PWM_SETUP, CUSTOM_LED)
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) + (1 SHL LED_2)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com) + (1 SHL LED_2)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -117,20 +100,19 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
-;**********************
-; MCU specific macros *
-;**********************
-
+;**** **** **** **** ****
+; MCU specific
+;**** **** **** **** ****
 Initialize_Xbar MACRO
 	mov	XBR2, #40h	;; Xbar enabled
 	mov	XBR1, #02h	;; CEX0 and CEX1 routed to pins
 
 	All_pwmFETs_off	;; For unlocking of HIP2103/4 driver circuits
-	call wait100ms
+	call	wait100ms
 	AcomFET_on
 	BcomFET_on
 	CcomFET_on
-	call wait1ms
+	call	wait1ms
 	All_comFETs_off
 ENDM
 
@@ -142,6 +124,10 @@ ELSE
 ENDIF
 ENDM
 
+
+;**** **** **** **** ****
+; LED configuration
+;**** **** **** **** ****
 Set_LED_0 MACRO
 	setb	P0.LED_0
 ENDM
@@ -171,3 +157,10 @@ ENDM
 
 Clear_LED_3 MACRO
 ENDM
+
+
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$set(CUSTOM_PWM_SETUP, CUSTOM_LED)
+$include (Base.inc)
diff --git a/targets/F.inc b/targets/F.inc
index 43aaeab..07a2074 100644
--- a/targets/F.inc
+++ b/targets/F.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -48,9 +52,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -84,28 +85,12 @@ A_com		EQU	1	;o
 A_pwm		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -116,3 +101,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/G.inc b/targets/G.inc
index 4252f5d..93c2ad4 100644
--- a/targets/G.inc
+++ b/targets/G.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -48,9 +52,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -84,28 +85,12 @@ A_com		EQU	1	;o
 A_pwm		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -116,3 +101,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/H.inc b/targets/H.inc
index e55a88e..bfca774 100644
--- a/targets/H.inc
+++ b/targets/H.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -49,9 +53,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -85,28 +86,12 @@ B_com		EQU	1	;o
 C_com		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -117,3 +102,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/I.inc b/targets/I.inc
index 9c3d088..b8ab17c 100644
--- a/targets/I.inc
+++ b/targets/I.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -48,9 +52,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -83,26 +84,12 @@ B_pwm		EQU	1	;o
 C_pwm		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -113,3 +100,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/J.inc b/targets/J.inc
index 70a2169..02a43a1 100644
--- a/targets/J.inc
+++ b/targets/J.inc
@@ -27,8 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
-
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 ;*********************
@@ -48,9 +51,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	(1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2)
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -83,25 +83,12 @@ B_pwm		EQU	1	;o
 A_pwm		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-$set(CUSTOM_LED)
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -112,10 +99,9 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
-;**********************
-; MCU specific macros *
-;**********************
-
+;**** **** **** **** ****
+; LED configuration
+;**** **** **** **** ****
 Set_LED_0 MACRO
 	clr	P0.LED_0
 ENDM
@@ -145,3 +131,10 @@ ENDM
 
 Clear_LED_3 MACRO
 ENDM
+
+
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$set(CUSTOM_LED)
+$include (Base.inc)
diff --git a/targets/K.inc b/targets/K.inc
index 4b7f45c..48f6992 100644
--- a/targets/K.inc
+++ b/targets/K.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	0		; Damping non-inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -48,9 +52,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	0		; Damping non-inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -84,28 +85,12 @@ B_com		EQU	1	;o
 A_com		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	(1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -116,3 +101,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/L.inc b/targets/L.inc
index 0376a18..a26f558 100644
--- a/targets/L.inc
+++ b/targets/L.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -48,9 +52,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -83,24 +84,12 @@ B_pwm		EQU	1	;o
 C_pwm		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -111,3 +100,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/M.inc b/targets/M.inc
index 0d738df..b6dc880 100644
--- a/targets/M.inc
+++ b/targets/M.inc
@@ -27,9 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
-
-
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 ;*********************
@@ -49,9 +51,6 @@ P0_INIT		EQU	NOT(1 SHL LED_0)
 P0_PUSHPULL	EQU	(1 SHL LED_0)
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -72,7 +71,6 @@ ELSE
 ENDIF
 
 
-
 ;*********************
 ; PORT 1 definitions *
 ;*********************
@@ -86,29 +84,12 @@ A_pwm		EQU	1	;o
 ;			EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-$set(CUSTOM_LED)
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -119,13 +100,9 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
-;**********************
-; MCU specific macros *
-;**********************
-
-
-
-
+;**** **** **** **** ****
+; LED configuration
+;**** **** **** **** ****
 Set_LED_0 MACRO
 	setb	P0.LED_0
 ENDM
@@ -151,3 +128,10 @@ ENDM
 
 Clear_LED_3 MACRO
 ENDM
+
+
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$set(CUSTOM_LED)
+$include (Base.inc)
diff --git a/targets/N.inc b/targets/N.inc
index 7ea0803..cd4147c 100644
--- a/targets/N.inc
+++ b/targets/N.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -49,9 +53,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -85,28 +86,12 @@ A_pwm		EQU	1	;o
 A_com		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -117,3 +102,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/O.inc b/targets/O.inc
index d07e875..bffcf9d 100644
--- a/targets/O.inc
+++ b/targets/O.inc
@@ -27,8 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	0		; Damping non-inverted
 
-
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 ;*********************
@@ -48,9 +51,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	0		; Damping non-inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -84,16 +84,6 @@ A_com		EQU	1	;o
 A_pwm		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-$set(CUSTOM_COMP_SETUP)
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	(1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
@@ -110,8 +100,6 @@ Read_Comp_Out MACRO
 ENDM
 
 
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -122,3 +110,8 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$set(CUSTOM_COMP_SETUP)
+$include (Base.inc)
diff --git a/targets/P.inc b/targets/P.inc
index b6cdbd9..1419448 100644
--- a/targets/P.inc
+++ b/targets/P.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -49,9 +53,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -72,7 +73,6 @@ ELSE
 ENDIF
 
 
-
 ;*********************
 ; PORT 1 definitions *
 ;*********************
@@ -86,28 +86,12 @@ A_pwm		EQU	1	;o
 ;			EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -118,3 +102,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/Q.inc b/targets/Q.inc
index ed7292c..c0c7652 100644
--- a/targets/Q.inc
+++ b/targets/Q.inc
@@ -27,8 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
-
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	1
 
 
 ;*********************
@@ -44,15 +47,11 @@ Rcp_In		EQU	1	;i
 ;			EQU	0	;i
 
 
-
 P0_DIGITAL	EQU	0FFh
 P0_INIT		EQU	(1 SHL Rcp_In)
 P0_PUSHPULL	EQU	(1 SHL LED_0) + (1 SHL LED_1) + (1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm)
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -86,7 +85,6 @@ B_com		EQU	1	;o
 A_com		EQU	0	;o
 
 
-
 P_ApwmFET		EQU	P0.A_pwm
 P_AcomFET		EQU	P1.A_com
 P_BpwmFET		EQU	P0.B_pwm
@@ -94,12 +92,6 @@ P_BcomFET		EQU	P1.B_com
 P_CpwmFET		EQU	P0.C_pwm
 P_CcomFET		EQU	P1.C_com
 
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	1
-
-$set(CUSTOM_PWM_PHASE, CUSTOM_LED)
-
-$include (Base.inc)
 
 P1_DIGITAL	EQU	(1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
@@ -107,7 +99,6 @@ P1_PUSHPULL	EQU	(1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
 Set_Pwm_A MACRO
 IF FETON_DELAY == 0
 	cON	P_AcomFET
@@ -147,7 +138,6 @@ Set_Pwms_Off MACRO
 ENDM
 
 
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -158,12 +148,9 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
-;**********************
-; MCU specific macros *
-;**********************
-
-
-
+;**** **** **** **** ****
+; LED configuration
+;**** **** **** **** ****
 Set_LED_0 MACRO
 	setb	P0.LED_0
 ENDM
@@ -191,3 +178,10 @@ ENDM
 
 Clear_LED_3 MACRO
 ENDM
+
+
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$set(CUSTOM_PWM_PHASE, CUSTOM_LED)
+$include (Base.inc)
diff --git a/targets/R.inc b/targets/R.inc
index 113e921..436e370 100644
--- a/targets/R.inc
+++ b/targets/R.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -48,9 +52,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -83,28 +84,12 @@ B_pwm		EQU	1	;o
 C_pwm		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -115,3 +100,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/S.inc b/targets/S.inc
index 8e3752a..5940b3f 100644
--- a/targets/S.inc
+++ b/targets/S.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -48,9 +52,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -84,28 +85,12 @@ A_pwm		EQU	1	;o
 A_com		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -116,3 +101,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/T.inc b/targets/T.inc
index de1310b..23ae520 100644
--- a/targets/T.inc
+++ b/targets/T.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -49,9 +53,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -85,28 +86,12 @@ B_com		EQU	1	;o
 C_com		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -117,3 +102,7 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)
diff --git a/targets/U.inc b/targets/U.inc
index 5ad6297..978fac1 100644
--- a/targets/U.inc
+++ b/targets/U.inc
@@ -27,9 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
-
-
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 ;*********************
@@ -49,9 +51,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	(1 SHL LED_0) + (1 SHL LED_1) + (1 SHL LED_2)
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -72,7 +71,6 @@ ELSE
 ENDIF
 
 
-
 ;*********************
 ; PORT 1 definitions *
 ;*********************
@@ -86,29 +84,12 @@ A_pwm		EQU	1	;o
 ;			EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-$set(CUSTOM_LED)
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -119,13 +100,9 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
-;**********************
-; MCU specific macros *
-;**********************
-
-
-
-
+;**** **** **** **** ****
+; LED configuration
+;**** **** **** **** ****
 Set_LED_0 MACRO
 	clr	P0.LED_0
 ENDM
@@ -155,3 +132,10 @@ ENDM
 
 Clear_LED_3 MACRO
 ENDM
+
+
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$set(CUSTOM_LED)
+$include (Base.inc)
diff --git a/targets/V.inc b/targets/V.inc
index 1535c50..1306413 100644
--- a/targets/V.inc
+++ b/targets/V.inc
@@ -27,8 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
-
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 ;*********************
@@ -44,15 +47,11 @@ B_Mux		EQU	1	;i
 A_Mux		EQU	0	;i
 
 
-
 P0_DIGITAL	EQU	NOT((1 SHL A_Mux) + (1 SHL B_Mux) + (1 SHL C_Mux) + (1 SHL Comp_Com))
 P0_INIT		EQU	NOT(1 SHL C_com)
 P0_PUSHPULL	EQU	(1 SHL C_com)
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -80,13 +79,12 @@ ENDIF
 A_pwm		EQU	6	;i
 A_com		EQU	5	;i
 B_pwm		EQU	4	;o
-;    		EQU	3	;o
-;    		EQU	2	;o
+;			EQU	3	;o
+;			EQU	2	;o
 B_com		EQU	1	;o
 C_pwm		EQU	0	;o
 
 
-
 P_ApwmFET		EQU	P1.A_pwm
 P_AcomFET		EQU	P1.A_com
 P_BpwmFET		EQU	P1.B_pwm
@@ -94,12 +92,6 @@ P_BcomFET		EQU	P1.B_com
 P_CpwmFET		EQU	P1.C_pwm
 P_CcomFET		EQU	P0.C_com
 
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-$set(CUSTOM_PWM_PHASE)
-
-$include (Base.inc)
 
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com)
 P1_INIT		EQU	00h
@@ -107,7 +99,6 @@ P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) +
 P1_SKIP		EQU	0FFh
 
 
-
 Set_Pwm_A MACRO
 IF FETON_DELAY == 0
 	cON	P_AcomFET
@@ -147,8 +138,6 @@ Set_Pwms_Off MACRO
 ENDM
 
 
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -159,3 +148,8 @@ P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
 
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$set(CUSTOM_PWM_PHASE)
+$include (Base.inc)
diff --git a/targets/W.inc b/targets/W.inc
index 01a5d8f..db35f8f 100644
--- a/targets/W.inc
+++ b/targets/W.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 ;*********************
@@ -48,9 +52,6 @@ P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
 
-PWM_ACTIVE_HIGH	EQU	1		; Pwm non-inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
 	PCA0_POWER_L		EQU	PCA0CPL0
@@ -82,12 +83,6 @@ C_pwm		EQU	4	;o
 ;		EQU	1	;i
 ;		EQU	0	;i
 
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-$set(CUSTOM_PWM_PHASE, CUSTOM_FET_TOGGLING)
-
-$include (Base.inc)
 
 ; pwm outputs start as analog in -> floating
 ; this ensures all mosfet drivers start with floating outputs
@@ -95,69 +90,69 @@ P1_DIGITAL	EQU	NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm))
 P1_INIT		EQU	00h
 P1_PUSHPULL	EQU	((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm))
 ;
-P1_SKIP		EQU    0FFh
+P1_SKIP		EQU	0FFh
 
 
 ApwmFET_on MACRO
-	setb     P1.A_pwm		; set pin to high
-	orl P1MDIN, #(1 SHL A_pwm)	; enable pin driver
+	setb	P1.A_pwm		; set pin to high
+	orl	P1MDIN, #(1 SHL A_pwm)	; enable pin driver
 ENDM
 
 ApwmFET_off MACRO
-	anl P1MDIN, #(NOT(1 SHL A_pwm))	; analog in -> pullup, driver and digital in is disable = floating
+	anl	P1MDIN, #(NOT(1 SHL A_pwm))	; analog in -> pullup, driver and digital in is disable = floating
 ENDM
 
 BpwmFET_on MACRO
-	setb P1.B_pwm		; set pin to high
-	orl P1MDIN, #(1 SHL B_pwm)	; enable pin driver
+	setb	P1.B_pwm		; set pin to high
+	orl	P1MDIN, #(1 SHL B_pwm)	; enable pin driver
 ENDM
 
 BpwmFET_off MACRO
-	anl P1MDIN, #(NOT(1 SHL B_pwm))	; analog in -> pullup, driver and digital in is disable = floating
+	anl	P1MDIN, #(NOT(1 SHL B_pwm))	; analog in -> pullup, driver and digital in is disable = floating
 ENDM
 
 CpwmFET_on MACRO
-	setb     P1.C_pwm		; set pin to high
-	orl P1MDIN, #(1 SHL C_pwm)	; enable pin driver
+	setb	P1.C_pwm		; set pin to high
+	orl	P1MDIN, #(1 SHL C_pwm)	; enable pin driver
 ENDM
 
 CpwmFET_off MACRO
-	anl P1MDIN, #(NOT(1 SHL C_pwm))	; analog in -> pullup, driver and digital in is disable = floating
+	anl	P1MDIN, #(NOT(1 SHL C_pwm))	; analog in -> pullup, driver and digital in is disable = floating
 ENDM
 
 All_pwmFETs_Off MACRO
-	anl P1MDIN, #(NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm)))	; analog in -> pullup, driver and digital in is disable = floating
+	anl	P1MDIN, #(NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm)))	; analog in -> pullup, driver and digital in is disable = floating
 ENDM
 
 AcomFET_on MACRO
-	clr P1.A_pwm			; set pin to low
-	orl P1MDIN, #(1 SHL A_pwm)	; enable pin driver
+	clr	P1.A_pwm			; set pin to low
+	orl	P1MDIN, #(1 SHL A_pwm)	; enable pin driver
 ENDM
 
 AcomFET_off MACRO
-	anl P1MDIN, #(NOT(1 SHL A_pwm))	; analog in -> pullup, driver and digital in is disable = floating
+	anl	P1MDIN, #(NOT(1 SHL A_pwm))	; analog in -> pullup, driver and digital in is disable = floating
 ENDM
 
 BcomFET_on MACRO
-	clr P1.B_pwm			; set pin to low
-	orl P1MDIN, #(1 SHL B_pwm)	; enable pin driver
+	clr	P1.B_pwm			; set pin to low
+	orl	P1MDIN, #(1 SHL B_pwm)	; enable pin driver
 ENDM
 
 BcomFET_off MACRO
-	anl P1MDIN, #(NOT(1 SHL B_pwm))	; analog in -> pullup, driver and digital in is disable = floating
+	anl	P1MDIN, #(NOT(1 SHL B_pwm))	; analog in -> pullup, driver and digital in is disable = floating
 ENDM
 
 CcomFET_on MACRO
-	clr P1.C_pwm			; set pin to low
-	orl P1MDIN, #(1 SHL C_pwm)	; enable pin driver
+	clr	P1.C_pwm			; set pin to low
+	orl	P1MDIN, #(1 SHL C_pwm)	; enable pin driver
 ENDM
 
 CcomFET_off MACRO
-	anl P1MDIN, #(NOT(1 SHL C_pwm))	; analog in -> pullup, driver and digital in is disable = floating
+	anl	P1MDIN, #(NOT(1 SHL C_pwm))	; analog in -> pullup, driver and digital in is disable = floating
 ENDM
 
 All_comFETs_Off MACRO
-	anl P1MDIN, #(NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm)))	; analog in -> pullup, driver and digital in is disable = floating
+	anl	P1MDIN, #(NOT((1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm)))	; analog in -> pullup, driver and digital in is disable = floating
 ENDM
 
 Set_Pwm_A MACRO
@@ -180,8 +175,6 @@ Set_Pwms_Off MACRO
 ENDM
 
 
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -190,3 +183,10 @@ DebugPin		EQU	0	;o
 P2_DIGITAL	EQU	(1 SHL DebugPin)
 P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
+
+
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$set(CUSTOM_PWM_PHASE, CUSTOM_FET_TOGGLING)
+$include (Base.inc)
diff --git a/targets/Z.inc b/targets/Z.inc
index c035d01..0d9978c 100644
--- a/targets/Z.inc
+++ b/targets/Z.inc
@@ -27,7 +27,11 @@
 ;
 ;**** **** **** **** ****
 
+PWM_ACTIVE_HIGH	EQU	0		; Pwm inverted
+COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
 
+; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
+COMP_PORT		EQU	0
 
 
 
@@ -48,9 +52,6 @@ P0_INIT		EQU	0FFh
 P0_PUSHPULL	EQU	0
 P0_SKIP		EQU	0FFh
 
-PWM_ACTIVE_HIGH	EQU	0		; Pwm inverted
-COMPWM_ACTIVE_HIGH	EQU	1		; Damping inverted
-
 
 IF FETON_DELAY == 0
 	PCA0_POWER_MODULE	EQU	PCA0CPM0
@@ -84,28 +85,12 @@ A_pwm		EQU	1	;o
 A_com		EQU	0	;o
 
 
-
-
-
-; Note: currently all comparator pins (Comp_ and Mux_) must be on the same port
-COMP_PORT		EQU	0
-
-
-
-$include (Base.inc)
-
 P1_DIGITAL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_INIT		EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm)
 P1_PUSHPULL	EQU	(1 SHL A_pwm) + (1 SHL B_pwm) + (1 SHL C_pwm) + (1 SHL A_com) + (1 SHL B_com) + (1 SHL C_com)
 P1_SKIP		EQU	0FFh
 
 
-
-
-
-
-
-
 ;*********************
 ; PORT 2 definitions *
 ;*********************
@@ -115,3 +100,8 @@ P2_DIGITAL	EQU	(1 SHL DebugPin)
 P2_PUSHPULL	EQU	(1 SHL DebugPin)
 P2_SKIP		EQU	0FFh
 
+
+;**** **** **** **** ****
+; Inherit base layout
+;**** **** **** **** ****
+$include (Base.inc)