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260 lines
14 KiB
260 lines
14 KiB
;------------------------------------------------------------------------------
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; C8051F410.INC
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;------------------------------------------------------------------------------
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; Copyright 2005 Silicon Laboratories, Inc.
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; http://www.silabs.com
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;
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; Program Description:
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;
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; Register/bit definitions for the C8051F41x family.
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;
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;
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; FID: 41X000004
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; Target: C8051F410, F411, F412, F413
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; Tool chain: Keil
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; Command Line: None
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;
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;
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; Release 1.0
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; -Initial Revision (GP, PKC)
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; -26 JAN 2006
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;
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;------------------------------------------------------------------------------
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; Byte Registers
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;------------------------------------------------------------------------------
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P0 DATA 080H ; Port 0 latch
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SP DATA 081H ; Stack pointer
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DPL DATA 082H ; Data pointer low
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DPH DATA 083H ; Data pointer high
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CRC0CN DATA 084H ; CRC0 control
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CRC0IN DATA 085H ; CRC0 input data
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CRC0DAT DATA 086H ; CRC0 output data
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PCON DATA 087H ; Power control
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TCON DATA 088H ; Timer/counter control
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TMOD DATA 089H ; Timer/counter mode
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TL0 DATA 08AH ; Timer/counter 0 low
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TL1 DATA 08BH ; Timer/counter 1 low
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TH0 DATA 08CH ; Timer/counter 0 high
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TH1 DATA 08DH ; Timer/counter 1 high
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CKCON DATA 08EH ; Clock control
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PSCTL DATA 08FH ; Program store R/W control
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P1 DATA 090H ; Port 1 latch
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TMR3CN DATA 091H ; Timer/counter 3 control
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TMR3RLL DATA 092H ; Timer/counter 3 reload low
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TMR3RLH DATA 093H ; Timer/counter 3 reload high
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TMR3L DATA 094H ; Timer/counter 3 low
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TMR3H DATA 095H ; Timer/counter 3 high
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IDA0L DATA 096H ; Current mode DAC0 low
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IDA0H DATA 097H ; Current mode DAC0 high
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SCON0 DATA 098H ; UART0 control
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SBUF0 DATA 099H ; UART0 data buffer
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CPT1CN DATA 09AH ; Comparator1 control
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CPT0CN DATA 09BH ; Comparator0 control
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CPT1MD DATA 09CH ; Comparator1 mode selection
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CPT0MD DATA 09DH ; Comparator0 mode selection
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CPT1MX DATA 09EH ; Comparator1 mux selection
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CPT0MX DATA 09FH ; Comparator0 mux selection
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P2 DATA 0A0H ; Port 2 latch
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SPI0CFG DATA 0A1H ; SPI0 configuration
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SPI0CKR DATA 0A2H ; SPI0 clock rate control
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SPI0DAT DATA 0A3H ; SPI0 data
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P0MDOUT DATA 0A4H ; Port 0 output mode configuration
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P1MDOUT DATA 0A5H ; Port 1 output mode configuration
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P2MDOUT DATA 0A6H ; Port 2 output mode configuration
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IE DATA 0A8H ; Interrupt enable
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CLKSEL DATA 0A9H ; Clock select
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EMI0CN DATA 0AAH ; External memory interface control
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CLKMUL DATA 0ABH ; Clock multiplier
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RTC0ADR DATA 0ACH ; RTC0 address
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RTC0DAT DATA 0ADH ; RTC0 data
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RTC0KEY DATA 0AEH ; RTC0 lock and key
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ONESHOT DATA 0AFH ; Flash oneshot timing
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P0ODEN DATA 0B0H ; Port0 Hi-Z overdrive mode enable
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OSCXCN DATA 0B1H ; External oscillator control
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OSCICN DATA 0B2H ; Internal oscillator control
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OSCICL DATA 0B3H ; Internal oscillator calibration
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IDA1CN DATA 0B5H ; Current mode DAC1 control
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FLSCL DATA 0B6H ; Flash scale
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FLKEY DATA 0B7H ; Flash lock and key
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IP DATA 0B8H ; Interrupt priority
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IDA0CN DATA 0B9H ; Current mode DAC0 control
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ADC0TK DATA 0BAH ; ADC0 tracking
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ADC0MX DATA 0BBH ; ADC0 mux
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ADC0CF DATA 0BCH ; ADC0 configuration
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ADC0L DATA 0BDH ; ADC0 data low
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ADC0H DATA 0BEH ; ADC0 data high
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P1MASK DATA 0BFH ; Port1 mask
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SMB0CN DATA 0C0H ; SMBus0 control
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SMB0CF DATA 0C1H ; SMBus0 configuration
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SMB0DAT DATA 0C2H ; SMBus0 data
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ADC0GTL DATA 0C3H ; ADC0 window greater than low byte
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ADC0GTH DATA 0C4H ; ADC0 window greater than high byte
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ADC0LTL DATA 0C5H ; ADC0 window less than low byte
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ADC0LTH DATA 0C6H ; ADC0 window less than high byte
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P0MASK DATA 0C7H ; Port0 mask
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TMR2CN DATA 0C8H ; Timer/counter 2 control
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REG0CN DATA 0C9H ; Voltage regulator control
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TMR2RLL DATA 0CAH ; Timer/counter 2 reload low
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TMR2RLH DATA 0CBH ; Timer/counter 2 reload high
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TMR2L DATA 0CCH ; Timer/counter 2 low
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TMR2H DATA 0CDH ; Timer/counter 2 high
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PCA0CPM5 DATA 0CEH ; PCA0 module 5 mode
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P1MAT DATA 0CFH ; Port1 match
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PSW DATA 0D0H ; Program status word
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REF0CN DATA 0D1H ; Voltage reference control
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PCA0CPL5 DATA 0D2H ; PCA0 module 5 low
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PCA0CPH5 DATA 0D3H ; PCA0 module 5 high
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P0SKIP DATA 0D4H ; Port 0 skip
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P1SKIP DATA 0D5H ; Port 1 skip
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P2SKIP DATA 0D6H ; Port 2 skip
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P0MAT DATA 0D7H ; Port 0 match
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PCA0CN DATA 0D8H ; PCA0 control
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PCA0MD DATA 0D9H ; PCA0 mode
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PCA0CPM0 DATA 0DAH ; PCA0 module 0 mode
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PCA0CPM1 DATA 0DBH ; PCA0 module 1 mode
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PCA0CPM2 DATA 0DCH ; PCA0 module 2 mode
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PCA0CPM3 DATA 0DDH ; PCA0 module 3 mode
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PCA0CPM4 DATA 0DEH ; PCA0 module 4 mode
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CRC0FLIP DATA 0DFH ; CRC0 bit flip
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ACC DATA 0E0H ; Accumulator
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XBR0 DATA 0E1H ; Port I/O crossbar control 0
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XBR1 DATA 0E2H ; Port I/O crossbar control 1
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PFE0CN DATA 0E3H ; Prefetch engine control
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IT01CF DATA 0E4H ; INT0/INT1 configuration
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EIE1 DATA 0E6H ; Extended interrupt enable 1
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EIE2 DATA 0E7H ; Extended interrupt enable 2
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ADC0CN DATA 0E8H ; ADC0 control
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PCA0CPL1 DATA 0E9H ; PCA0 module 1 capture low
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PCA0CPH1 DATA 0EAH ; PCA0 module 1 capture high
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PCA0CPL2 DATA 0EBH ; PCA0 module 2 capture low
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PCA0CPH2 DATA 0ECH ; PCA0 module 2 capture high
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PCA0CPL3 DATA 0EDH ; PCA0 module 3 capture low
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PCA0CPH3 DATA 0EEH ; PCA0 module 3 capture high
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RSTSRC DATA 0EFH ; Reset source configuration/status
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B DATA 0F0H ; B register
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P0MDIN DATA 0F1H ; Port 0 input mode configuration
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P1MDIN DATA 0F2H ; Port 1 input mode configuration
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P2MDIN DATA 0F3H ; Port 2 input mode configuration
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IDA1L DATA 0F4H ; Current mode DAC1 data low
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IDA1H DATA 0F5H ; Current mode DAC1 data high
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EIP1 DATA 0F6H ; Extended interrupt priority 1
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EIP2 DATA 0F7H ; Extended interrupt priority 2
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SPI0CN DATA 0F8H ; SPI0 control
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PCA0L DATA 0F9H ; PCA0 counter low
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PCA0H DATA 0FAH ; PCA0 counter high
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PCA0CPL0 DATA 0FBH ; PCA0 module 0 capture low
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PCA0CPH0 DATA 0FCH ; PCA0 module 0 capture high
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PCA0CPL4 DATA 0FDH ; PCA0 module 4 capture low
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PCA0CPH4 DATA 0FEH ; PCA0 module 4 capture high
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VDM0CN DATA 0FFH ; VDD monitor control
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;------------------------------------------------------------------------------
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; Bit Definitions
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;------------------------------------------------------------------------------
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; TCON 0x88
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TF1 BIT TCON.7 ; Timer 1 overflow flag
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TR1 BIT TCON.6 ; Timer 1 on/off control
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TF0 BIT TCON.5 ; Timer 0 overflow flag
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TR0 BIT TCON.4 ; Timer 0 on/off control
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IE1 BIT TCON.3 ; Ext. Interrupt 1 edge flag
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IT1 BIT TCON.2 ; Ext. Interrupt 1 type
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IE0 BIT TCON.1 ; Ext. Interrupt 0 edge flag
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IT0 BIT TCON.0 ; Ext. Interrupt 0 type
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; SCON0 0x98
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S0MODE BIT SCON0.7 ; UART0 mode
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; Bit 6 Unused
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MCE0 BIT SCON0.5 ; UART0 MCE
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REN0 BIT SCON0.4 ; UART0 RX enable
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TB80 BIT SCON0.3 ; UART0 TX bit 8
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RB80 BIT SCON0.2 ; UART0 RX bit 8
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TI0 BIT SCON0.1 ; UART0 TX interrupt flag
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RI0 BIT SCON0.0 ; UART0 RX interrupt flag
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; IE 0xA8
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EA BIT IE.7 ; Global interrupt enable
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ESPI0 BIT IE.6 ; SPI0 interrupt enable
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ET2 BIT IE.5 ; Timer 2 interrupt enable
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ES0 BIT IE.4 ; UART0 interrupt enable
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ET1 BIT IE.3 ; Timer 1 interrupt enable
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EX1 BIT IE.2 ; External interrupt 1 enable
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ET0 BIT IE.1 ; Timer 0 interrupt enable
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EX0 BIT IE.0 ; External interrupt 0 enable
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; IP 0xB8
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; Bit 7 Unused
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PSPI0 BIT IP.6 ; SPI0 priority
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PT2 BIT IP.5 ; Timer 2 priority
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PS0 BIT IP.4 ; UART0 priority
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PT1 BIT IP.3 ; Timer 1 priority
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PX1 BIT IP.2 ; External interrupt 1 priority
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PT0 BIT IP.1 ; Timer 0 priority
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PX0 BIT IP.0 ; External interrupt 0 priority
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; SMB0CN 0xC0
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MASTER BIT SMB0CN.7 ; SMBus0 master/slave
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TXMODE BIT SMB0CN.6 ; SMBus0 transmit mode
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STA BIT SMB0CN.5 ; SMBus0 start flag
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STO BIT SMB0CN.4 ; SMBus0 stop flag
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ACKRQ BIT SMB0CN.3 ; SMBus0 acknowledge request
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ARBLOST BIT SMB0CN.2 ; SMBus0 arbitration lost
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ACK BIT SMB0CN.1 ; SMBus0 acknowledge flag
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SI BIT SMB0CN.0 ; SMBus0 interrupt pending flag
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; TMR2CN 0xC8
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TF2H BIT TMR2CN.7 ; Timer 2 high byte overflow flag
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TF2L BIT TMR2CN.6 ; Timer 2 low byte overflow flag
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TF2LEN BIT TMR2CN.5 ; Timer 2 low byte interrupt enable
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TF2CEN BIT TMR2CN.4 ; Timer 2 capture enable
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T2SPLIT BIT TMR2CN.3 ; Timer 2 split mode enable
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TR2 BIT TMR2CN.2 ; Timer 2 on/off control
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T2RCLK BIT TMR2CN.1 ; Timer 2 RTC capture mode select
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T2XCLK BIT TMR2CN.0 ; Timer 2 external clock select
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; PSW 0xD0
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CY BIT PSW.7 ; Carry flag
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AC BIT PSW.6 ; Auxiliary carry flag
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F0 BIT PSW.5 ; User flag 0
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RS1 BIT PSW.4 ; Register bank select 1
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RS0 BIT PSW.3 ; Register bank select 0
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OV BIT PSW.2 ; Overflow flag
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F1 BIT PSW.1 ; User flag 1
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P BIT PSW.0 ; Accumulator parity flag
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; PCA0CN 0xD8
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CF BIT PCA0CN.7 ; PCA0 counter overflow flag
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CR BIT PCA0CN.6 ; PCA0 counter run control bit
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CCF5 BIT PCA0CN.5 ; PCA0 module 5 interrupt flag
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CCF4 BIT PCA0CN.4 ; PCA0 module 4 interrupt flag
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CCF3 BIT PCA0CN.3 ; PCA0 module 3 interrupt flag
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CCF2 BIT PCA0CN.2 ; PCA0 module 2 interrupt flag
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CCF1 BIT PCA0CN.1 ; PCA0 module 1 interrupt flag
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CCF0 BIT PCA0CN.0 ; PCA0 module 0 interrupt flag
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; ADC0CN 0xE8
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AD0EN BIT ADC0CN.7 ; ADC0 enable
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BURSTEN BIT ADC0CN.6 ; ADC0 burst mode enable
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AD0INT BIT ADC0CN.5 ; ADC0 conv. complete interrupt flag
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AD0BUSY BIT ADC0CN.4 ; ADC0 busy flag
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AD0WINT BIT ADC0CN.3 ; ADC0 window compare interrupt flag
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AD0LJST BIT ADC0CN.2 ; ADC0 left justify select
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AD0CM1 BIT ADC0CN.1 ; ADC0 conversion mode select 1
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AD0CM0 BIT ADC0CN.0 ; ADC0 conversion mode select 0
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; SPI0CN 0xF8
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SPIF BIT SPI0CN.7 ; SPI0 interrupt flag
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WCOL BIT SPI0CN.6 ; SPI0 write collision flag
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MODF BIT SPI0CN.5 ; SPI0 mode fault flag
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RXOVRN BIT SPI0CN.4 ; SPI0 RX overrun flag
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NSSMD1 BIT SPI0CN.3 ; SPI0 slave select mode 1
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NSSMD0 BIT SPI0CN.2 ; SPI0 slave select mode 0
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TXBMT BIT SPI0CN.1 ; SPI0 TX buffer empty flag
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SPIEN BIT SPI0CN.0 ; SPI0 SPI0 enable
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;------------------------------------------------------------------------------
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; End Of File
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;------------------------------------------------------------------------------
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