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458 lines
10 KiB
458 lines
10 KiB
;**** **** **** **** ****
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;
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; BLHeli program for controlling brushless motors in helicopters and multirotors
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;
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; Copyright 2011, 2012 Steffen Skaug
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; This program is distributed under the terms of the GNU General Public License
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;
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; This file is part of BLHeli.
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;
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; BLHeli is free software: you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation, either version 3 of the License, or
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; (at your option) any later version.
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;
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; BLHeli is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
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;
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;**** **** **** **** ****
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;
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; YEP 7A hardware definition file
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;
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;**** **** **** **** ****
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;*********************
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; Device Atmega168PA
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;*********************
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.INCLUDE "m168PAdef.inc"
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;**** **** **** **** ****
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; Fuses must be set to external oscillator = 16Mhz
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;**** **** **** **** ****
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;**** **** **** **** ****
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; Constant definitions
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;**** **** **** **** ****
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.ESEG ; EEprom segment
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.ORG 0x40
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Eep_ESC_Layout: .DB "#YEP_7A# " ; ESC layout tag
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.ORG 0x50
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Eep_ESC_MCU: .DB "#BLHELI#Am168PA#" ; Project and MCU tag (16 Bytes)
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.EQU HIGH_BEC_VOLTAGE = 0 ; Set to 1 or more if high BEC voltage is supported
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.EQU DAMPED_MODE_ENABLE = 0 ; Set to 1 if fully damped mode is supported
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.EQU NFETON_DELAY = 65 ; Wait delay from pfets off to nfets on
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.EQU PFETON_DELAY = 5 ; Wait delay from nfets off to pfets on
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.EQU ADC_LIMIT_L = 231 ; 2k/22k divider. Power supply measurement ADC value for which motor power is limited (low byte)
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.EQU ADC_LIMIT_H = 0 ; 2k/22k divider. Power supply measurement ADC value for which motor power is limited (2 MSBs)
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.EQU TEMP_LIMIT = 0 ; No temp sensor. Temperature measurement ADC value for which main motor power is limited
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.EQU TEMP_LIMIT_STEP = 0 ; No temp sensor. Temperature measurement ADC value increment for which main motor power is further limited
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;**** **** **** **** ****
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; ESC specific defaults
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;**** **** **** **** ****
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.EQU DEFAULT_PGM_MAIN_SPOOLUP_TIME = 7 ; Main motor spoolup time
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.EQU DEFAULT_PGM_MAIN_STARTUP_PWR = 11 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
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.EQU DEFAULT_PGM_TAIL_STARTUP_PWR = 11 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
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.EQU DEFAULT_PGM_MULTI_STARTUP_PWR = 11 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
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.EQU DEFAULT_PGM_MAIN_STARTUP_METHOD = 2 ; 1=Stepped 2=Direct
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.EQU DEFAULT_PGM_TAIL_STARTUP_METHOD = 2 ; 1=Stepped 2=Direct
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.EQU DEFAULT_PGM_MULTI_STARTUP_METHOD = 2 ; 1=Stepped 2=Direct
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;*********************
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; PORT D definitions *
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;*********************
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;.EQU = 7 ;i
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;.EQU = 6 ;i
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;.EQU = 5 ;i
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;.EQU = 4 ;i
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;.EQU = 3 ;i
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.EQU Rcp_In = 2 ;i
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;.EQU = 1 ;i
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;.EQU = 0 ;i
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.equ INIT_PD = 0x00
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.equ DIR_PD = 0x00
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.MACRO Get_Rcp_Capture_Values
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lds @0, TCNT1L
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lds @1, TCNT1H
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.ENDMACRO
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.MACRO Read_Rcp_Int
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in @0, PIND
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sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity negative?
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com @0 ; Yes - invert
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.ENDMACRO
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.MACRO Get_Rcp_Int_Enable_State
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in @0, EIMSK ; Get int0 enable state (giving 0 is off, anything else is on)
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andi @0, (1<<INT0)
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.ENDMACRO
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.MACRO Rcp_Int_Enable
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ldi @0, (1<<INT0) ; Enable int0
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out EIMSK, @0
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.ENDMACRO
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.MACRO Rcp_Int_Disable
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ldi @0, 0 ; Disable int0
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out EIMSK, @0
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.ENDMACRO
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.MACRO Rcp_Int_First
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ldi @0, (1<<ISC01)+(1<<ISC00); Default - set next int0 to rising
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sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity negative?
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ldi @0, (1<<ISC01) ; Yes - set next int0 to falling
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sts EICRA, @0
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.ENDMACRO
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.MACRO Rcp_Int_Second
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ldi @0, (1<<ISC01) ; Default - set next int0 to falling
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sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity negative?
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ldi @0, (1<<ISC01)+(1<<ISC00); Yes - set next int0 to rising
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sts EICRA, @0
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.ENDMACRO
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.MACRO Rcp_Clear_Int_Flag
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clr @0
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sbr @0, (1<<INTF0) ; Clear ext0int flag
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out EIFR, @0
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.ENDMACRO
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.MACRO T0_Int_Disable
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lds @0, TIMSK0 ; Disable timer0 interrupts
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cbr @0, (1<<TOIE0)
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sts TIMSK0, @0
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.ENDMACRO
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.MACRO T0_Int_Enable
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lds @0, TIMSK0 ; Enable timer0 interrupts
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sbr @0, (1<<TOIE0)
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sts TIMSK0, @0
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.ENDMACRO
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.MACRO T1oca_Clear_Int_Flag
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ldi @0, (1<<OCF1A) ; Clear oc1a flag
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out TIFR1, @0
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.ENDMACRO
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.MACRO T1oca_Int_Disable
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lds @0, TIMSK1 ; Disable oc1a interrupts
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cbr @0, (1<<OCIE1A)
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sts TIMSK1, @0
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.ENDMACRO
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.MACRO T1oca_Int_Enable
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lds @0, TIMSK1 ; Enable oc1a interrupts
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sbr @0, (1<<OCIE1A)
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sts TIMSK1, @0
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.ENDMACRO
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.MACRO T2_Clear_Int_Flag
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clr @0
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sbr @0, (1<<TOV2) ; Clear tov2 flag
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out TIFR2, @0
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.ENDMACRO
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;*********************
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; PORT C definitions *
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;*********************
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;.EQU = 7 ; i
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;.EQU = 6 ; i
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.EQU Mux_A = 5 ; i
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.EQU Mux_B = 4 ; i
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.EQU Mux_C = 3 ; i
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;.EQU = 2 ; i
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;.EQU = 1 ; i
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.EQU Volt_Ip = 0 ; i
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.equ INIT_PC = 0x00
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.equ DIR_PC = 0x00
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.MACRO AnFET_on
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sbi PORTB, AnFET
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.ENDMACRO
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.MACRO AnFET_off
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cbi PORTB, AnFET
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.ENDMACRO
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.MACRO BnFET_on
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sbi PORTB, BnFET
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.ENDMACRO
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.MACRO BnFET_off
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cbi PORTB, BnFET
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.ENDMACRO
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.MACRO CnFET_on
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sbi PORTB, CnFET
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.ENDMACRO
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.MACRO CnFET_off
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cbi PORTB, CnFET
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.ENDMACRO
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.MACRO All_nFETs_Off
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cbi PORTB, AnFET
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cbi PORTB, BnFET
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cbi PORTB, CnFET
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.ENDMACRO
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.MACRO ApFET_on
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sbi PORTB, ApFET
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.ENDMACRO
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.MACRO ApFET_off
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cbi PORTB, ApFET
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.ENDMACRO
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.MACRO BpFET_on
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sbi PORTB, BpFET
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.ENDMACRO
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.MACRO BpFET_off
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cbi PORTB, BpFET
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.ENDMACRO
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.MACRO CpFET_on
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sbi PORTB, CpFET
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.ENDMACRO
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.MACRO CpFET_off
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cbi PORTB, CpFET
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.ENDMACRO
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.MACRO All_pFETs_Off
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cbi PORTB, ApFET
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cbi PORTB, BpFET
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cbi PORTB, CpFET
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.ENDMACRO
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.MACRO Brake_FETs_On
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AnFET_on
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BnFET_on
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CnFET_on
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.ENDMACRO
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.MACRO Damping_FET_On
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lds @0, DampingFET
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sbrc @0, 0
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sbi PORTB, ApFET
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sbrc @0, 1
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sbi PORTB, BpFET
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sbrc @0, 2
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sbi PORTB, CpFET
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.ENDMACRO
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.MACRO Comp_Init
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lds @0, ADCSRB ; Toggle Analog Comparator Multiplexer Enable
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cbr @0, (1<<ACME)
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sts ADCSRB, @0
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Read_Comp_Out @0
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lds @0, ADCSRB
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sbr @0, (1<<ACME)
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sts ADCSRB, @0
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.ENDMACRO
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.MACRO Set_Comp_Phase_A
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ldi @0, Mux_A ; Set comparator multiplexer to phase A
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ori @0, (1<<REFS1)+(1<<REFS0)
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sts ADMUX, @0
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.ENDMACRO
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.MACRO Set_Comp_Phase_B
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ldi @0, Mux_B ; Set comparator multiplexer to phase B
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ori @0, (1<<REFS1)+(1<<REFS0)
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sts ADMUX, @0
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.ENDMACRO
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.MACRO Set_Comp_Phase_C
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ldi @0, Mux_C ; Set comparator multiplexer to phase C
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ori @0, (1<<REFS1)+(1<<REFS0)
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sts ADMUX, @0
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.ENDMACRO
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.MACRO Read_Comp_Out
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in @0, ACSR ; Read comparator output
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.ENDMACRO
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;*********************
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; PORT B definitions *
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;*********************
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;.EQU = 7 ; i
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;.EQU = 6 ; i
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.EQU CnFET = 5 ; o
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.EQU BnFET = 4 ; o
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.EQU AnFET = 3 ; o
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.EQU ApFET = 2 ; o
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.EQU CpFET = 1 ; o
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.EQU BpFET = 0 ; o
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.EQU INIT_PB = 0
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.EQU DIR_PB = (1<<AnFET)+(1<<BnFET)+(1<<CnFET)+(1<<ApFET)+(1<<BpFET)+(1<<CpFET)
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;**********************
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; MCU specific macros *
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;**********************
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.MACRO Interrupt_Table_Definition
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jmp reset
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rjmp rcp_int ; ext_int0
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nop
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nop ; ext_int1
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nop
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nop ; pci0_int
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nop
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nop ; pci1_int
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nop
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nop ; pci2_int
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nop
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nop ; wdt_int
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nop
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nop ; t2oca_int
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nop
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nop ; t2ocb_int
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nop
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rjmp t2_int ; t2ovfl_int
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nop
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nop ; icp1_int
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nop
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rjmp t1oca_int ; t1oca_int
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nop
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nop ; t1ocb_int
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nop
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nop ; t1ovfl_int
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nop
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nop ; t0oca_int
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nop
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nop ; t0ocb_int
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nop
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rjmp t0_int ; t0ovfl_int
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nop
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nop ; spi_int
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nop
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nop ; urxc
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nop
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nop ; udre
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nop
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nop ; utxc
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nop
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; nop ; adc_int
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; nop ; eep_int
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; nop ; aci_int
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; nop ; wire2_int
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; nop ; spmc_int
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.ENDMACRO
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.MACRO Disable_Watchdog
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cli ; Disable interrupts
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wdr ; Reset watchdog timer
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in @0, MCUSR ; Clear WDRF in MCUSR
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andi @0, (0xFF & (0<<WDRF))
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out MCUSR, @0
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lds @0, WDTCSR ; Write logical one to WDCE and WDE
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ori @0, (1<<WDCE) | (1<<WDE)
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sts WDTCSR, @0
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ldi @0, (0<<WDE) ; Turn off WDT
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sts WDTCSR, @0
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.ENDMACRO
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.MACRO Enable_Watchdog
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ldi @0, (1<<WDE) ; Turn on WDT
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sts WDTCSR, @0
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.ENDMACRO
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.MACRO Initialize_MCU
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.ENDMACRO
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.MACRO Initialize_Interrupts
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ldi @0, (1<<TOIE0)
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out TIFR0, @0 ; Clear interrupts
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sts TIMSK0, @0 ; Enable interrupts
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ldi @0, (1<<OCIE1A)
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out TIFR1, @0 ; Clear interrupts
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sts TIMSK1, @0 ; Enable interrupts
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ldi @0, (1<<TOIE2)
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out TIFR2, @0 ; Clear interrupts
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sts TIMSK2, @0 ; Enable interrupts
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.ENDMACRO
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.MACRO Initialize_Adc
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ldi @0, Volt_Ip
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ori @0, (1<<REFS1)+(1<<REFS0)
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sts ADMUX, @0 ; Set ADMUX register
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lds @0, ADCSRA ; Set ADCSRA register (1MHz clock)
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sbr @0, (1<<ADPS2)
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sbr @0, (1<<ADEN) ; Enable ADC
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sts ADCSRA, @0
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.ENDMACRO
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.MACRO Set_Adc_Ip_Volt
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cbr Flags1, (1<<ADC_READ_TEMP)
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.ENDMACRO
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.MACRO Set_Adc_Ip_Temp
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sbr Flags1, (1<<ADC_READ_TEMP)
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.ENDMACRO
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.MACRO Start_Adc
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ldi @0, Volt_Ip
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sbrc Flags1, ADC_READ_TEMP
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ldi @0, Volt_Ip
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ori @0, (1<<REFS1)+(1<<REFS0)
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sts ADMUX, @0 ; Set ADMUX register (1.1V reference, selected input)
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lds @0, ADCSRA
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sbr @0, (1<<ADEN) ; Enable ADC
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sbr @0, (1<<ADSC) ; Start ADC conversion
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sts ADCSRA, @0
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.ENDMACRO
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.MACRO Get_Adc_Status
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lds @0, ADCSRA
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.ENDMACRO
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.MACRO Read_Adc_Result
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lds @0, ADCL
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lds @1, ADCH
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.ENDMACRO
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.MACRO Stop_Adc
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lds @0, ADCSRA
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cbr @0, (1<<ADEN) ; Disable ADC
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sts ADCSRA, @0
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.ENDMACRO
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.MACRO Set_Timer0_CS0
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out TCCR0B, @0
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.ENDMACRO
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.MACRO Set_Timer1_CS1
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sts TCCR1B, @0
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.ENDMACRO
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.MACRO Set_Timer2_CS2
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sts TCCR2B, @0
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.ENDMACRO
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.MACRO Read_TCNT1L
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lds @0, TCNT1L
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.ENDMACRO
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.MACRO Read_TCNT1H
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lds @0, TCNT1H
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.ENDMACRO
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.MACRO Set_OCR1AL
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sts OCR1AL, @0
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.ENDMACRO
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.MACRO Set_OCR1AH
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sts OCR1AH, @0
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.ENDMACRO
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.MACRO Read_TCNT2
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lds @0, TCNT2
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.ENDMACRO
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.MACRO Set_TCNT2
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sts TCNT2, @0
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.ENDMACRO
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.MACRO Check_Eeprom_Ready
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sbic EECR, EEPE
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.ENDMACRO
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.MACRO Set_Eeprom_Address
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out EEARL, @0
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out EEARH, @1
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.ENDMACRO
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.MACRO Start_Eeprom_Write
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sbi EECR, EEMPE
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sbi EECR, EEPE
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.ENDMACRO
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.MACRO Prepare_Lock_Or_Fuse_Read
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ldi @0, ((1<<BLBSET)+(1<<SELFPRGEN))
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out SPMCSR, @0
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.ENDMACRO
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.MACRO xcall
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call @0
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.ENDMACRO
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.MACRO Set_RPM_Out
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.ENDMACRO
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.MACRO Clear_RPM_Out
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.ENDMACRO
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