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490 lines
10 KiB
490 lines
10 KiB
;**** **** **** **** ****
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;
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; BLHeli program for controlling brushless motors in helicopters and multirotors
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;
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; Copyright 2011, 2012 Steffen Skaug
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; This program is distributed under the terms of the GNU General Public License
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;
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; This file is part of BLHeli.
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;
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; BLHeli is free software: you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation, either version 3 of the License, or
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; (at your option) any later version.
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;
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; BLHeli is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
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;
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;**** **** **** **** ****
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;
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; Hardware definition file "A"
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; X X RC X MC MB MA CC X X Cc Cp Bc Bp Ac Ap
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;
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;**** **** **** **** ****
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;*********************
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; Device SiLabs EFM8BB1x/2x
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;*********************
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IF MCU_48MHZ == 0
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$include (SI_EFM8BB1_Defs.inc)
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ELSE
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$include (SI_EFM8BB2_Defs.inc)
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ENDIF
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;**** **** **** **** ****
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; Uses internal calibrated oscillator set to 24/48Mhz
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;**** **** **** **** ****
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;**** **** **** **** ****
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; Constant definitions
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;**** **** **** **** ****
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IF MCU_48MHZ == 0
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CSEG AT 1A40h
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IF FETON_DELAY == 0
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Eep_ESC_Layout: DB "#A_L_00# " ; ESC layout tag
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ELSEIF FETON_DELAY == 5
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Eep_ESC_Layout: DB "#A_L_05# "
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ELSEIF FETON_DELAY == 10
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Eep_ESC_Layout: DB "#A_L_10# "
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ELSEIF FETON_DELAY == 15
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Eep_ESC_Layout: DB "#A_L_15# "
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ELSEIF FETON_DELAY == 20
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Eep_ESC_Layout: DB "#A_L_20# "
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ELSEIF FETON_DELAY == 25
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Eep_ESC_Layout: DB "#A_L_25# "
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ELSEIF FETON_DELAY == 30
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Eep_ESC_Layout: DB "#A_L_30# "
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ELSEIF FETON_DELAY == 40
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Eep_ESC_Layout: DB "#A_L_40# "
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ELSEIF FETON_DELAY == 50
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Eep_ESC_Layout: DB "#A_L_50# "
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ELSEIF FETON_DELAY == 70
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Eep_ESC_Layout: DB "#A_L_70# "
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ELSEIF FETON_DELAY == 90
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Eep_ESC_Layout: DB "#A_L_90# "
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ENDIF
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CSEG AT 1A50h
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Eep_ESC_MCU: DB "#BLHELI$EFM8B10#" ; Project and MCU tag (16 Bytes)
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ELSE
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CSEG AT 1A40h
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IF FETON_DELAY == 0
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Eep_ESC_Layout: DB "#A_H_00# " ; ESC layout tag
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ELSEIF FETON_DELAY == 5
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Eep_ESC_Layout: DB "#A_H_05# "
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ELSEIF FETON_DELAY == 10
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Eep_ESC_Layout: DB "#A_H_10# "
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ELSEIF FETON_DELAY == 15
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Eep_ESC_Layout: DB "#A_H_15# "
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ELSEIF FETON_DELAY == 20
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Eep_ESC_Layout: DB "#A_H_20# "
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ELSEIF FETON_DELAY == 25
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Eep_ESC_Layout: DB "#A_H_25# "
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ELSEIF FETON_DELAY == 30
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Eep_ESC_Layout: DB "#A_H_30# "
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ELSEIF FETON_DELAY == 40
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Eep_ESC_Layout: DB "#A_H_40# "
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ELSEIF FETON_DELAY == 50
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Eep_ESC_Layout: DB "#A_H_50# "
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ELSEIF FETON_DELAY == 70
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Eep_ESC_Layout: DB "#A_H_70# "
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ELSEIF FETON_DELAY == 90
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Eep_ESC_Layout: DB "#A_H_90# "
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ENDIF
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CSEG AT 1A50h
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Eep_ESC_MCU: DB "#BLHELI$EFM8B21#" ; Project and MCU tag (16 Bytes)
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ENDIF
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ONE_S_CAPABLE EQU 0 ; Set to 1 if ESC can operate at 1S
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TEMP_LIMIT EQU 49 ; Temperature measurement ADC value for which main motor power is limited at 80degC (low byte, assuming high byte is 1)
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TEMP_LIMIT_STEP EQU 9 ; Temperature measurement ADC value increment for another 10degC
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;**** **** **** **** ****
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; Bootloader definitions
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;**** **** **** **** ****
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RTX_PORT EQU P0 ; Receive/Transmit port
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RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL
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RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL
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RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP
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RTX_PIN EQU 5 ; RTX pin
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SIGNATURE_001 EQU 0E8h ; Device signature
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IF MCU_48MHZ == 0
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SIGNATURE_002 EQU 0B1h
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ELSE
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SIGNATURE_002 EQU 0B2h
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ENDIF
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;*********************
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; PORT 0 definitions *
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;*********************
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; EQU 7 ;i
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; EQU 6 ;i
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Rcp_In EQU 5 ;i
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; EQU 4 ;i
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Mux_C EQU 3 ;i
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Mux_B EQU 2 ;i
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Mux_A EQU 1 ;i
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Comp_Com EQU 0 ;i
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P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com))
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P0_INIT EQU 0FFh
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P0_PUSHPULL EQU 0
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P0_SKIP EQU 0FFh
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Get_Rcp_Capture_Values MACRO
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anl TCON, #0EFh ; Disable timer0
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mov Temp1, TL0 ; Get timer0 values
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mov Temp2, TH0
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IF MCU_48MHZ == 1
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mov Temp3, Timer0_X
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jnb TCON_TF0, ($+4) ; Check if interrupt is pending
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inc Temp3 ; If it is pending, then timer has already wrapped
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ENDIF
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mov TL0, #0 ; Reset timer0
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mov TH0, #0
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IF MCU_48MHZ == 1
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mov Timer0_X, #0
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ENDIF
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orl TCON, #10h ; Enable timer0 again
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IF MCU_48MHZ == 1
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mov A, Clock_Set_At_48MHz
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jnz Get_Rcp_End
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clr C
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mov A, Temp1
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rlc A
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mov Temp1, A
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mov A, Temp2
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rlc A
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mov Temp2, A
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mov A, Temp3
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rlc A
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mov Temp3, A
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Get_Rcp_End:
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ENDIF
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ENDM
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Initialize_PCA MACRO
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mov PCA0CN0, #40h ; PCA enabled
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mov PCA0MD, #08h ; PCA clock is system clock
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IF FETON_DELAY == 0
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IF MCU_48MHZ == 0
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mov PCA0PWM, #82h ; PCA ARSEL set and 10bits pwm
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ELSE
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mov PCA0PWM, #83h ; PCA ARSEL set and 11bits pwm
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ENDIF
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mov PCA0CENT, #00h ; Edge aligned pwm
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ELSE
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IF MCU_48MHZ == 0
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mov PCA0PWM, #81h ; PCA ARSEL set and 9bits pwm
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ELSE
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mov PCA0PWM, #82h ; PCA ARSEL set and 10bits pwm
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ENDIF
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mov PCA0CENT, #03h ; Center aligned pwm
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ENDIF
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ENDM
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Set_Pwm_Polarity MACRO
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mov PCA0POL, #02h ; Damping inverted, pwm noninverted
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ENDM
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Enable_Power_Pwm_Module MACRO
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IF FETON_DELAY == 0
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mov PCA0CPM0, #4Ah ; Enable comparator of module, enable match, set pwm mode
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ELSE
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mov PCA0CPM0, #42h ; Enable comparator of module, set pwm mode
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ENDIF
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ENDM
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Enable_Damp_Pwm_Module MACRO
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IF FETON_DELAY == 0
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mov PCA0CPM1, #00h ; Disable
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ELSE
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mov PCA0CPM1, #42h ; Enable comparator of module, set pwm mode
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ENDIF
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ENDM
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Set_Power_Pwm_Regs MACRO
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IF FETON_DELAY == 0
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mov PCA0CPL0, Power_Pwm_Reg_L
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mov PCA0CPH0, Power_Pwm_Reg_H
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ELSE
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clr C
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mov A, Power_Pwm_Reg_H
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rrc A
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mov Temp1, A
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mov A, Power_Pwm_Reg_L
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rrc A
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mov PCA0CPL0, A
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mov PCA0CPH0, Temp1
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ENDIF
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ENDM
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Set_Damp_Pwm_Regs MACRO
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IF FETON_DELAY == 0
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mov PCA0CPL1, Damp_Pwm_Reg_L
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mov PCA0CPH1, Damp_Pwm_Reg_H
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ELSE
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clr C
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mov A, Damp_Pwm_Reg_H
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rrc A
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mov Temp1, A
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mov A, Damp_Pwm_Reg_L
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rrc A
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mov PCA0CPL1, A
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mov PCA0CPH1, Temp1
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ENDIF
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ENDM
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Clear_COVF_Interrupt MACRO
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anl PCA0PWM, #0DFh
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ENDM
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Clear_CCF_Interrupt MACRO
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anl PCA0CN0, #0FEh
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ENDM
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Enable_COVF_Interrupt MACRO
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orl PCA0PWM, #40h
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ENDM
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Enable_CCF_Interrupt MACRO
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orl PCA0CPM0,#01h
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ENDM
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Disable_COVF_Interrupt MACRO
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anl PCA0PWM, #0BFh
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ENDM
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Disable_CCF_Interrupt MACRO
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anl PCA0CPM0,#0FEh
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ENDM
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;*********************
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; PORT 1 definitions *
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;*********************
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; EQU 7 ;i
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; EQU 6 ;i
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CcomFET EQU 5 ;o
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CpwmFET EQU 4 ;o
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BcomFET EQU 3 ;o
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BpwmFET EQU 2 ;o
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AcomFET EQU 1 ;o
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ApwmFET EQU 0 ;o
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P1_DIGITAL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET)
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P1_INIT EQU 00h
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P1_PUSHPULL EQU (1 SHL ApwmFET)+(1 SHL BpwmFET)+(1 SHL CpwmFET)+(1 SHL AcomFET)+(1 SHL BcomFET)+(1 SHL CcomFET)
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P1_SKIP EQU 3Fh
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ApwmFET_on MACRO
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setb P1.ApwmFET
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IF FETON_DELAY == 0
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setb P1.AcomFET
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ENDIF
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ENDM
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ApwmFET_off MACRO
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IF FETON_DELAY != 0
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clr P1.ApwmFET
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ELSE
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clr P1.AcomFET
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ENDIF
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ENDM
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BpwmFET_on MACRO
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setb P1.BpwmFET
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IF FETON_DELAY == 0
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setb P1.BcomFET
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ENDIF
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ENDM
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BpwmFET_off MACRO
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IF FETON_DELAY != 0
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clr P1.BpwmFET
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ELSE
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clr P1.BcomFET
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ENDIF
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ENDM
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CpwmFET_on MACRO
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setb P1.CpwmFET
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IF FETON_DELAY == 0
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setb P1.CcomFET
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ENDIF
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ENDM
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CpwmFET_off MACRO
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IF FETON_DELAY != 0
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clr P1.CpwmFET
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ELSE
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clr P1.CcomFET
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ENDIF
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ENDM
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All_pwmFETs_Off MACRO
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IF FETON_DELAY != 0
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clr P1.ApwmFET
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clr P1.BpwmFET
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clr P1.CpwmFET
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ELSE
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clr P1.AcomFET
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clr P1.BcomFET
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clr P1.CcomFET
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ENDIF
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ENDM
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AcomFET_on MACRO
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IF FETON_DELAY == 0
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clr P1.ApwmFET
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ENDIF
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setb P1.AcomFET
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ENDM
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AcomFET_off MACRO
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clr P1.AcomFET
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ENDM
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BcomFET_on MACRO
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IF FETON_DELAY == 0
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clr P1.BpwmFET
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ENDIF
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setb P1.BcomFET
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ENDM
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BcomFET_off MACRO
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clr P1.BcomFET
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ENDM
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CcomFET_on MACRO
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IF FETON_DELAY == 0
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clr P1.CpwmFET
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ENDIF
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setb P1.CcomFET
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ENDM
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CcomFET_off MACRO
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clr P1.CcomFET
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ENDM
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All_comFETs_Off MACRO
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clr P1.AcomFET
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clr P1.BcomFET
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clr P1.CcomFET
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ENDM
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Set_Pwm_A MACRO
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IF FETON_DELAY == 0
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setb P1.AcomFET
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mov P1SKIP, #3Eh
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ELSE
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mov P1SKIP, #3Ch
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ENDIF
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ENDM
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Set_Pwm_B MACRO
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IF FETON_DELAY == 0
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setb P1.BcomFET
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mov P1SKIP, #3Bh
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ELSE
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mov P1SKIP, #33h
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ENDIF
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ENDM
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Set_Pwm_C MACRO
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IF FETON_DELAY == 0
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setb P1.CcomFET
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mov P1SKIP, #2Fh
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ELSE
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mov P1SKIP, #0Fh
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ENDIF
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ENDM
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Set_Pwms_Off MACRO
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mov P1SKIP, #3Fh
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ENDM
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Set_Comp_Phase_A MACRO
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mov CMP0MX, #10h ; Set comparator multiplexer to phase A
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ENDM
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Set_Comp_Phase_B MACRO
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mov CMP0MX, #20h ; Set comparator multiplexer to phase B
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ENDM
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Set_Comp_Phase_C MACRO
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mov CMP0MX, #30h ; Set comparator multiplexer to phase C
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ENDM
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Read_Comp_Out MACRO
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mov A, CMP0CN0 ; Read comparator output
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ENDM
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;*********************
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; PORT 2 definitions *
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;*********************
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DebugPin EQU 0 ;o
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P2_PUSHPULL EQU (1 SHL DebugPin)
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;**********************
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; MCU specific macros *
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;**********************
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Interrupt_Table_Definition MACRO
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CSEG AT 0 ; Code segment start
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jmp reset
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CSEG AT 03h ; Int0 interrupt
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jmp int0_int
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IF MCU_48MHZ == 1
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CSEG AT 0Bh ; Timer0 overflow interrupt
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jmp t0_int
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ENDIF
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CSEG AT 2Bh ; Timer2 overflow interrupt
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jmp t2_int
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CSEG AT 5Bh ; Pca interrupt
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jmp pca_int
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CSEG AT 73h ; Timer3 overflow/compare interrupt
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jmp t3_int
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ENDM
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Initialize_Xbar MACRO
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mov XBR2, #40h ; Xbar enabled
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mov XBR1, #02h ; CEX0 and CEX1 routed to pins
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ENDM
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Initialize_Adc MACRO
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mov REF0CN, #0Ch ; Set vdd (3.3V) as reference. Enable temp sensor and bias
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IF MCU_48MHZ == 0
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mov ADC0CF, #59h ; ADC clock 2MHz, PGA gain 1
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ELSE
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mov ADC0CF, #0B9h ; ADC clock 2MHz, PGA gain 1
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ENDIF
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mov ADC0MX, #10h ; Select temp sensor input
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mov ADC0CN0, #80h ; ADC enabled
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mov ADC0CN1, #01h ; Common mode buffer enabled
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ENDM
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Start_Adc MACRO
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mov ADC0CN0, #90h ; ADC start
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ENDM
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Read_Adc_Result MACRO
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mov Temp1, ADC0L
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mov Temp2, ADC0H
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ENDM
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Stop_Adc MACRO
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ENDM
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Set_RPM_Out MACRO
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ENDM
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Clear_RPM_Out MACRO
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ENDM
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Set_MCU_Clk_24MHz MACRO
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mov CLKSEL, #13h ; Set clock to 24MHz
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mov SFRPAGE, #10h
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mov PFE0CN, #00h ; Set flash timing for 24MHz
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mov SFRPAGE, #00h
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mov Clock_Set_At_48MHz, #0
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ENDM
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Set_MCU_Clk_48MHz MACRO
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mov SFRPAGE, #10h
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mov PFE0CN, #30h ; Set flash timing for 48MHz
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mov SFRPAGE, #00h
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mov CLKSEL, #03h ; Set clock to 48MHz
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mov Clock_Set_At_48MHz, #1
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ENDM
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Set_LED_0 MACRO
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ENDM
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Clear_LED_0 MACRO
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ENDM
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Set_LED_1 MACRO
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ENDM
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Clear_LED_1 MACRO
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ENDM
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Set_LED_2 MACRO
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ENDM
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Clear_LED_2 MACRO
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ENDM
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Set_LED_3 MACRO
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ENDM
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Clear_LED_3 MACRO
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ENDM
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