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329 lines
7.7 KiB
329 lines
7.7 KiB
;**** **** **** **** ****
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;
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; BLHeli program for controlling brushless motors in helicopters and multirotors
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;
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; Copyright 2011, 2012 Steffen Skaug
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; This program is distributed under the terms of the GNU General Public License
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;
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; This file is part of BLHeli.
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;
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; BLHeli is free software: you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation, either version 3 of the License, or
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; (at your option) any later version.
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;
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; BLHeli is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
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;
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;**** **** **** **** ****
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;
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; BLHeliTxPgm SiLabs
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;
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; EEPROM is not available in SiLabs MCUs
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; Therefore a segment of the flash is used as "EEPROM"
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;
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;**** **** **** **** ****
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Read all eeprom parameters routine
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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read_all_eeprom_parameters:
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; Check initialized signature
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mov DPTR, #Eep_Initialized_L
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mov Temp1, #Bit_Access
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call read_eeprom_byte
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mov A, Bit_Access
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cjne A, #055h, read_eeprom_store_defaults
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inc DPTR ; Now Eep_Initialized_H
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call read_eeprom_byte
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mov A, Bit_Access
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cjne A, #0AAh, read_eeprom_store_defaults
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jmp read_eeprom_read
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read_eeprom_store_defaults:
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mov Flash_Key_1, #0A5h
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mov Flash_Key_2, #0F1h
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call set_default_parameters
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call erase_and_store_all_in_eeprom
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mov Flash_Key_1, #0
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mov Flash_Key_2, #0
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jmp read_eeprom_exit
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read_eeprom_read:
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; Read eeprom
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mov DPTR, #_Eep_Pgm_Gov_P_Gain
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mov Temp1, #_Pgm_Gov_P_Gain
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mov Temp4, #10
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read_eeprom_block1:
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call read_eeprom_byte
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inc DPTR
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inc Temp1
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djnz Temp4, read_eeprom_block1
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mov DPTR, #Eep_Enable_TX_Program
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mov Temp1, #Pgm_Enable_TX_Program
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mov Temp4, #26 ; 26 parameters
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read_eeprom_block2:
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call read_eeprom_byte
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inc DPTR
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inc Temp1
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djnz Temp4, read_eeprom_block2
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mov DPTR, #Eep_Dummy ; Set pointer to uncritical area
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read_eeprom_exit:
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ret
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Erase flash and store all parameter value in EEPROM routine
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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erase_and_store_all_in_eeprom:
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clr IE_EA ; Disable interrupts
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call read_tags
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call erase_flash ; Erase flash
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mov DPTR, #Eep_FW_Main_Revision ; Store firmware main revision
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mov A, #EEPROM_FW_MAIN_REVISION
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call write_eeprom_byte_from_acc
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inc DPTR ; Now firmware sub revision
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mov A, #EEPROM_FW_SUB_REVISION
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call write_eeprom_byte_from_acc
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inc DPTR ; Now layout revision
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mov A, #EEPROM_LAYOUT_REVISION
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call write_eeprom_byte_from_acc
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; Write eeprom
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mov DPTR, #_Eep_Pgm_Gov_P_Gain
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mov Temp1, #_Pgm_Gov_P_Gain
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mov Temp4, #10
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write_eeprom_block1:
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call write_eeprom_byte
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inc DPTR
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inc Temp1
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djnz Temp4, write_eeprom_block1
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mov DPTR, #Eep_Enable_TX_Program
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mov Temp1, #Pgm_Enable_TX_Program
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mov Temp4, #26 ; 26 parameters
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write_eeprom_block2:
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call write_eeprom_byte
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inc DPTR
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inc Temp1
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djnz Temp4, write_eeprom_block2
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call write_tags
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call write_eeprom_signature
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mov DPTR, #Eep_Dummy ; Set pointer to uncritical area
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ret
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Read eeprom byte routine
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;
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; Gives data in A and in address given by Temp1. Assumes address in DPTR
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; Also assumes address high byte to be zero
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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read_eeprom_byte:
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clr A
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movc A, @A+DPTR ; Read from flash
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mov @Temp1, A
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ret
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Write eeprom byte routine
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;
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; Assumes data in address given by Temp1, or in accumulator. Assumes address in DPTR
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; Also assumes address high byte to be zero
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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write_eeprom_byte:
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mov A, @Temp1
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write_eeprom_byte_from_acc:
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orl PSCTL, #01h ; Set the PSWE bit
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anl PSCTL, #0FDh ; Clear the PSEE bit
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mov Temp8, A
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clr C
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mov A, DPH ; Check that address is not in bootloader area
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subb A, #1Ch
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jc ($+3)
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ret
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mov A, Temp8
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mov FLKEY, Flash_Key_1 ; First key code
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mov FLKEY, Flash_Key_2 ; Second key code
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movx @DPTR, A ; Write to flash
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anl PSCTL, #0FEh ; Clear the PSWE bit
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ret
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Erase flash routine (erases the flash segment used for "eeprom" variables)
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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erase_flash:
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orl PSCTL, #02h ; Set the PSEE bit
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orl PSCTL, #01h ; Set the PSWE bit
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mov FLKEY, Flash_Key_1 ; First key code
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mov FLKEY, Flash_Key_2 ; Second key code
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mov DPTR, #Eep_Initialized_L
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movx @DPTR, A
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anl PSCTL, #0FCh ; Clear the PSEE and PSWE bits
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ret
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Write eeprom signature routine
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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write_eeprom_signature:
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mov DPTR, #Eep_Initialized_L
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mov A, #055h
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call write_eeprom_byte_from_acc
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mov DPTR, #Eep_Initialized_H
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mov A, #0AAh
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call write_eeprom_byte_from_acc
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ret
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Read all tags from flash and store in temporary storage
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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read_tags:
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mov Temp3, #48 ; Number of tags
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mov Temp2, #Temp_Storage ; Set RAM address
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mov Temp1, #Bit_Access
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mov DPTR, #Eep_ESC_Layout ; Set flash address
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read_tag:
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call read_eeprom_byte
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mov A, Bit_Access
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mov @Temp2, A ; Write to RAM
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inc Temp2
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inc DPTR
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djnz Temp3, read_tag
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ret
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Write all tags from temporary storage and store in flash
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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write_tags:
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mov Temp3, #48 ; Number of tags
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mov Temp2, #Temp_Storage ; Set RAM address
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mov DPTR, #Eep_ESC_Layout ; Set flash address
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write_tag:
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mov A, @Temp2 ; Read from RAM
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call write_eeprom_byte_from_acc
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inc Temp2
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inc DPTR
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djnz Temp3, write_tag
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ret
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;**;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Wait 1 second routine
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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wait1s:
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mov Temp5, #5
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wait1s_loop:
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call wait200ms
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djnz Temp5, wait1s_loop
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ret
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;**;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Success beep routine
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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success_beep:
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clr IE_EA ; Disable all interrupts
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call beep_f1
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call beep_f2
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call beep_f3
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call beep_f4
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call wait10ms
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call beep_f1
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call beep_f2
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call beep_f3
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call beep_f4
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call wait10ms
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call beep_f1
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call beep_f2
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call beep_f3
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call beep_f4
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setb IE_EA ; Enable all interrupts
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ret
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;**;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Success beep inverted routine
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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success_beep_inverted:
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clr IE_EA ; Disable all interrupts
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call beep_f4
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call beep_f3
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call beep_f2
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call beep_f1
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call wait10ms
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call beep_f4
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call beep_f3
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call beep_f2
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call beep_f1
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call wait10ms
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call beep_f4
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call beep_f3
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call beep_f2
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call beep_f1
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setb IE_EA ; Enable all interrupts
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ret
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