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804 lines
18 KiB
804 lines
18 KiB
;**** **** **** **** ****
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;
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; BLHeli program for controlling brushless motors in helicopters and multirotors
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;
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; Copyright 2011, 2012 Steffen Skaug
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; This program is distributed under the terms of the GNU General Public License
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;
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; This file is part of BLHeli.
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;
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; BLHeli is free software: you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation, either version 3 of the License, or
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; (at your option) any later version.
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;
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; BLHeli is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
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;
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;**** **** **** **** ****
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;
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; BLHeliTxPgm SiLabs
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;
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; EEPROM is not available in SiLabs MCUs
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; Therefore a segment of the flash is used as "EEPROM"
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;
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;**** **** **** **** ****
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Read all eeprom parameters routine
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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read_all_eeprom_parameters:
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; Check initialized signature
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mov DPTR, #Eep_Initialized_L
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mov Temp1, #Bit_Access
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call read_eeprom_byte
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mov A, Bit_Access
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cjne A, #055h, read_eeprom_store_defaults
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inc DPTR ; Now Eep_Initialized_H
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call read_eeprom_byte
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mov A, Bit_Access
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cjne A, #0AAh, read_eeprom_store_defaults
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jmp read_eeprom_read
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read_eeprom_store_defaults:
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call set_default_parameters
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call erase_and_store_all_in_eeprom
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jmp read_eeprom_exit
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read_eeprom_read:
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; Read eeprom
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mov DPTR, #Eep_Pgm_Gov_P_Gain
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mov Temp1, #Pgm_Gov_P_Gain
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mov Temp4, #33;10
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read_eeprom_block1:
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call read_eeprom_byte
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inc DPTR
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inc Temp1
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djnz Temp4, read_eeprom_block1
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/*
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mov DPTR, #Eep_Enable_TX_Program
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mov Temp1, #Pgm_Enable_TX_Program
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mov Temp4, #19
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read_eeprom_block2:
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call read_eeprom_byte
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inc DPTR
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inc Temp1
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djnz Temp4, read_eeprom_block2
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*/
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mov DPTR, #Eep_Dummy ; Set pointer to uncritical area
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read_eeprom_exit:
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ret
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Erase flash and store all parameter value in EEPROM routine
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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erase_and_store_all_in_eeprom:
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clr EA ; Disable interrupts
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;call read_tags
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mov A,#0x0D
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mov UpDate_Flg,#1
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call erase_flash ; Erase flash
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/*
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mov DPTR, #Eep_FW_Main_Revision ; Store firmware main revision
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mov A, #EEPROM_FW_MAIN_REVISION
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call write_eeprom_byte_from_acc
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inc DPTR ; Now firmware sub revision
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mov A, #EEPROM_FW_SUB_REVISION
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call write_eeprom_byte_from_acc
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inc DPTR ; Now layout revision
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mov A, #EEPROM_LAYOUT_REVISION
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call write_eeprom_byte_from_acc
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*/
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; Write eeprom
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mov DPTR, #Eep_Pgm_Gov_P_Gain
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mov Temp1, #Pgm_Gov_P_Gain
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mov Temp4, #33;#10
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write_eeprom_block1:
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call write_eeprom_byte
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inc DPTR
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inc Temp1
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djnz Temp4, write_eeprom_block1
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/*
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mov DPTR, #Eep_Enable_TX_Program
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mov Temp1, #Pgm_Enable_TX_Program
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mov Temp4, #19
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write_eeprom_block2:
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call write_eeprom_byte
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inc DPTR
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inc Temp1
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djnz Temp4, write_eeprom_block2
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;call write_tags
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call write_eeprom_signature
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*/
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mov DPTR, #Eep_Dummy ; Set pointer to uncritical area
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ret
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;**;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Wait 1 second routine
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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wait1s:
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mov Temp5, #5
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wait1s_loop:
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call wait200ms
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djnz Temp5, wait1s_loop
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ret
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;**;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Success beep routine
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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success_beep:
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clr EA ; Disable all interrupts
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call beep_f1
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call beep_f2
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call beep_f3
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call beep_f4
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call wait10ms
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call beep_f1
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call beep_f2
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call beep_f3
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call beep_f4
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call wait10ms
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call beep_f1
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call beep_f2
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call beep_f3
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call beep_f4
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setb EA ; Enable all interrupts
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ret
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Write eeprom signature routine
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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write_eeprom_signature:
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mov DPTR, #Eep_Initialized_L
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mov A, #055h
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call write_eeprom_byte_from_acc
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mov DPTR, #Eep_Initialized_H
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mov A, #0AAh
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call write_eeprom_byte_from_acc
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ret
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;**;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Success beep inverted routine
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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/*
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success_beep_inverted:
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clr EA ; Disable all interrupts
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call beep_f4
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call beep_f3
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call beep_f2
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call beep_f1
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call wait10ms
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call beep_f4
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call beep_f3
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call beep_f2
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call beep_f1
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call wait10ms
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call beep_f4
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call beep_f3
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call beep_f2
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call beep_f1
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setb EA ; Enable all interrupts
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ret
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*/
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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CSEG AT 1C00h ; Last code segment. Take care that there is enough space!
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Read eeprom byte routine
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;
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; Gives data in A and in address given by Temp1. Assumes address in DPTR
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; Also assumes address high byte to be zero
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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read_eeprom_byte:
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clr A
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movc A, @A+DPTR ; Read from flash
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mov @Temp1, A
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ret
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Write eeprom byte routine
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;
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; Assumes data in address given by Temp1, or in accumulator. Assumes address in DPTR
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; Also assumes address high byte to be zero
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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write_eeprom_byte:
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mov A, @Temp1
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write_eeprom_byte_from_acc:
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orl PSCTL, #01h ; Set the PSWE bit
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anl PSCTL, #0FDh ; Clear the PSEE bit
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mov RSTSRC, #02h ; Set VDD monitor as a reset source (PORSF)
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mov FLKEY, #0A5h ; First key code
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mov FLKEY, #0F1h ; Second key code
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movx @DPTR, A ; Write to flash
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anl PSCTL, #0FEh ; Clear the PSWE bit
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ret
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Erase flash routine (erases the flash segment used for "eeprom" variables)
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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erase_flash:
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djnz UpDate_Flg,ret_ret
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;mov Temp1,A
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;mov A,RSTSRC
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;jnb ACC.0,ret_ret
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;mov A,Temp1
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orl PSCTL, #02h ; Set the PSEE bit
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orl PSCTL, #01h ; Set the PSWE bit
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mov RSTSRC, #02h ; Set VDD monitor as a reset source (PORSF)
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mov FLKEY, #0A5h ; First key code
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mov FLKEY, #0F1h ; Second key code
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add A,ACC
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mov DPL,#0x00
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mov DPH,A
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clr A
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; mov DPTR, #Eep_Initialized_L
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movx @DPTR, A
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anl PSCTL, #0FCh ; Clear the PSEE and PSWE bits
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ret_ret:
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mov UpDate_Flg,#0
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ret
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SEND_ONEBYTE:
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jnb TI0,$
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clr TI0
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orl P0MDOUT,#10h
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mov SBUF0,A
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jnb RI0,$
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clr RI0
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anl P0MDOUT,#0EFh
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ret
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boot:
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clr A
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mov Power_On_Wait_Cnt_L,A ;buflen
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mov Power_On_Wait_Cnt_H,A
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mov Stepper_Step_Beg_L,A ;flashPos
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mov Stepper_Step_Beg_H,A
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mov Initial_Arm,A ;Had13
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mov Stepper_Step_End_L,A
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mov Stepper_Step_End_H,A ;Reclen
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mov Startup_Rot_Cnt,A ;Page
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clr EA
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mov SP,#0x40
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setb TI0
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mov A,#0xE4
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call SEND_ONEBYTE
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DIE_LOOP:
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mov A,Initial_Arm
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xrl A,#0x03
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jz LOOPREAD
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jmp HAD13_EQU2
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LOOPREAD:
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clr C
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mov A,Power_On_Wait_Cnt_L
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subb A,Stepper_Step_End_L
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mov A,Power_On_Wait_Cnt_H
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subb A,Stepper_Step_End_H
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jnc SKIP_READ
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jnb RI0,$
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clr RI0
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mov A,#0x00
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add A,Power_On_Wait_Cnt_L
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mov DPL,A
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mov A,#0x00
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addc A,Power_On_Wait_Cnt_H
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mov DPH,A
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mov A,SBUF0
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movx @DPTR,A
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inc Power_On_Wait_Cnt_L
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mov A,Power_On_Wait_Cnt_L
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jnz LOOPREAD
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inc Power_On_Wait_Cnt_H
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jmp LOOPREAD
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SKIP_READ:
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clr RI0
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mov A,Startup_Rot_Cnt
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mov UpDate_Flg,#1
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call erase_flash
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inc Startup_Rot_Cnt
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clr A
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mov Temp8,A
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mov Temp7,A
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PRO_FLASH:
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clr C
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mov A,Temp8
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subb A,Power_On_Wait_Cnt_L
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mov A,Temp7
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subb A,Power_On_Wait_Cnt_H
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jnc SEND_OK
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clr C
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mov A,#0x00
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add A,Temp8
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mov DPL,A
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mov A,#0x00
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addc A,Temp7
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mov DPH,A
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movx A,@DPTR
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mov Temp1,A
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mov A,Stepper_Step_Beg_L
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mov DPL,A
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mov A,Stepper_Step_Beg_H
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mov DPH,A
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mov A,Temp1
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call write_eeprom_byte_from_acc
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inc Stepper_Step_Beg_L
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mov A,Stepper_Step_Beg_L
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/* cjne A,0xFF,Zero_D
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inc Stepper_Step_Beg_L
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mov A,Stepper_Step_Beg_L
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Zero_D: */
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cjne A,#0x00,$+5
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inc Stepper_Step_Beg_H
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inc Temp8
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cjne Temp8,#0x00,$+4
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inc Temp7
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jmp PRO_FLASH
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SEND_OK:
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mov A,#0x6F
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call SEND_ONEBYTE
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mov A,#0x6B
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call SEND_ONEBYTE
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clr C
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mov A,Stepper_Step_Beg_L
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subb A,Prev_Comm_L
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mov A,Stepper_Step_Beg_H
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subb A,Prev_Comm_H
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jnc $+5
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ljmp SIGNED_2
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mov Initial_Arm,#0x00
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ljmp DIE_LOOP
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HAD13_EQU2:
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mov A,Initial_Arm
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xrl A,#0x02
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jnz HAD13_EQU1
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clr A
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mov Power_On_Wait_Cnt_L,A ;buflen
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mov Power_On_Wait_Cnt_H,A
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jnb RI0,$
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clr RI0
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mov A,SBUF0
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mov Stepper_Step_End_H,A
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jnb RI0,$
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clr RI0
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mov A,SBUF0
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mov Stepper_Step_End_L,A
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mov Initial_Arm,#0x03
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ljmp DIE_LOOP
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HAD13_EQU1:
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mov A,Initial_Arm
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xrl A,#0x01
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jnz HAD13_DEFAULT
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jnb RI0,$
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clr RI0
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mov A,SBUF0
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add A,#0x7F
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jz H81_DET
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add A,#0xB2
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jz CF_DET
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add A,#0x51
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jnz DEFA_DET
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mov A,#0x6F
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call SEND_ONEBYTE
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mov A,#0x6B
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call SEND_ONEBYTE
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mov Initial_Arm,#0x01
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ljmp DIE_LOOP
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H81_DET:
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mov Initial_Arm,#0x00
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setb TI0
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mov A,#0x6F
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call SEND_ONEBYTE
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mov A,#0x6B
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call SEND_ONEBYTE
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ljmp DIE_LOOP
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CF_DET:
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mov Temp2, #200
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waitxms_o1:
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mov Temp1, #23
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waitxms_m1:
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clr A
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djnz ACC, $ ; Inner loop (42.7us - 1024 cycles)
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djnz Temp1, waitxms_m1
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djnz Temp2, waitxms_o1
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orl RSTSRC,#0x10
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ljmp DIE_LOOP
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DEFA_DET:
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mov A,SBUF0
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mov Prev_Comm_H,A
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jnb RI0,$
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clr RI0
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mov A,SBUF0
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mov Prev_Comm_L,A
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SIGNED_2:
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mov Initial_Arm,#0x02
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ljmp DIE_LOOP
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HAD13_DEFAULT:
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jnb RI0,$
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clr RI0
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mov A,SBUF0
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cjne A,#0xE4,H13_DET
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mov Initial_Arm,#0x00
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mov A,#0xE4
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call SEND_ONEBYTE
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ljmp DIE_LOOP
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H13_DET:
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xrl A,#0x13
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jz $+5
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ljmp DIE_LOOP
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mov Initial_Arm,#0x01
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ljmp DIE_LOOP
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/*
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Read all tags from flash and store in temporary storage
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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read_tags:
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mov Temp3, #48 ; Number of tags
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mov Temp2, #Temparry ; Set RAM address
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mov Temp1, #Bit_Access
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mov DPTR, #Eep_ESC_Layout ; Set flash address
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read_tag:
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call read_eeprom_byte
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mov A, Bit_Access
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mov @Temp2, A ; Write to RAM
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inc Temp2
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inc DPTR
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djnz Temp3, read_tag
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ret
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write_tags:
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mov Temp3, #48 ; Number of tags
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mov Temp2, #Temparry ; Set RAM address
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mov DPTR, #Eep_ESC_Layout ; Set flash address
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write_tag:
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mov A, @Temp2 ; Read from RAM
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call write_eeprom_byte_from_acc
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inc Temp2
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inc DPTR
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djnz Temp3, write_tag
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ret
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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;
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; Store new parameter value in ram routine
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;
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; No assumptions
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;
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;**** **** **** **** **** **** **** **** **** **** **** **** ****
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store_new_value_in_ram:
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mov Temp4, Tx_Pgm_Func_No ; Function no
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mov Temp1, Tx_Pgm_Paraval_No ; Parameter value no
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IF MODE == 0
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store_main_func_1:
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cjne Temp4, #1, store_main_func_2
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mov Temp2, #Pgm_Gov_P_Gain
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store_main_func_2:
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cjne Temp4, #2, store_main_func_3
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mov Temp2, #Pgm_Gov_I_Gain
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store_main_func_3:
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cjne Temp4, #3, store_main_func_4
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mov Temp2, #Pgm_Gov_Mode
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store_main_func_4:
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cjne Temp4, #4, store_main_func_5
|
|
mov Temp2, #Pgm_Gov_Range
|
|
|
|
store_main_func_5:
|
|
cjne Temp4, #5, store_main_func_6
|
|
mov Temp2, #Pgm_Low_Voltage_Lim
|
|
|
|
store_main_func_6:
|
|
cjne Temp4, #6, store_main_func_7
|
|
mov Temp2, #Pgm_Startup_Pwr
|
|
|
|
store_main_func_7:
|
|
cjne Temp4, #7, store_main_func_8
|
|
mov Temp2, #Pgm_Comm_Timing
|
|
|
|
store_main_func_8:
|
|
cjne Temp4, #8, store_main_func_9
|
|
mov Temp2, #Pgm_Pwm_Freq
|
|
|
|
store_main_func_9:
|
|
cjne Temp4, #9, store_main_func_10
|
|
mov Temp2, #Pgm_Demag_Comp
|
|
|
|
store_main_func_10:
|
|
cjne Temp4, #10, store_main_func_11
|
|
mov Temp2, #Pgm_Direction
|
|
|
|
store_main_func_11:
|
|
cjne Temp4, #11, store_in_ram_exit
|
|
mov Temp2, #Pgm_Input_Pol
|
|
ENDIF
|
|
IF MODE == 1
|
|
store_tail_func_1:
|
|
cjne Temp4, #1, store_tail_func_2
|
|
mov Temp2, #Pgm_Motor_Gain
|
|
|
|
store_tail_func_2:
|
|
cjne Temp4, #2, store_tail_func_3
|
|
mov Temp2, #Pgm_Motor_Idle
|
|
|
|
store_tail_func_3:
|
|
cjne Temp4, #3, store_tail_func_4
|
|
mov Temp2, #Pgm_Startup_Pwr
|
|
|
|
store_tail_func_4:
|
|
cjne Temp4, #4, store_tail_func_5
|
|
mov Temp2, #Pgm_Comm_Timing
|
|
|
|
store_tail_func_5:
|
|
cjne Temp4, #5, store_tail_func_6
|
|
mov Temp2, #Pgm_Pwm_Freq
|
|
|
|
store_tail_func_6:
|
|
cjne Temp4, #6, store_tail_func_7
|
|
mov Temp2, #Pgm_Demag_Comp
|
|
|
|
store_tail_func_7:
|
|
cjne Temp4, #7, store_tail_func_8
|
|
mov Temp2, #Pgm_Direction
|
|
|
|
store_tail_func_8:
|
|
cjne Temp4, #8, store_in_ram_exit
|
|
mov Temp2, #Pgm_Input_Pol
|
|
ENDIF
|
|
IF MODE == 2
|
|
store_multi_func_1:
|
|
cjne Temp4, #1, store_multi_func_2
|
|
mov Temp2, #Pgm_Gov_P_Gain
|
|
|
|
store_multi_func_2:
|
|
cjne Temp4, #2, store_multi_func_3
|
|
mov Temp2, #Pgm_Gov_I_Gain
|
|
|
|
store_multi_func_3:
|
|
cjne Temp4, #3, store_multi_func_4
|
|
mov Temp2, #Pgm_Gov_Mode
|
|
|
|
store_multi_func_4:
|
|
cjne Temp4, #4, store_multi_func_5
|
|
mov Temp2, #Pgm_Motor_Gain
|
|
|
|
store_multi_func_5:
|
|
cjne Temp4, #5, store_multi_func_6
|
|
mov Temp2, #Pgm_Low_Voltage_Lim
|
|
|
|
store_multi_func_6:
|
|
cjne Temp4, #6, store_multi_func_7
|
|
mov Temp2, #Pgm_Startup_Pwr
|
|
|
|
store_multi_func_7:
|
|
cjne Temp4, #7, store_multi_func_8
|
|
mov Temp2, #Pgm_Comm_Timing
|
|
|
|
store_multi_func_8:
|
|
cjne Temp4, #8, store_multi_func_9
|
|
mov Temp2, #Pgm_Pwm_Freq
|
|
|
|
store_multi_func_9:
|
|
cjne Temp4, #9, store_multi_func_10
|
|
mov Temp2, #Pgm_Demag_Comp
|
|
|
|
store_multi_func_10:
|
|
cjne Temp4, #10, store_multi_func_11
|
|
mov Temp2, #Pgm_Direction
|
|
|
|
store_multi_func_11:
|
|
cjne Temp4, #11, store_in_ram_exit
|
|
mov Temp2, #Pgm_Input_Pol
|
|
ENDIF
|
|
|
|
store_in_ram_exit:
|
|
mov A, Temp1
|
|
mov @Temp2, A
|
|
ret
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
function_paraval_beep:
|
|
mov Temp7, Tx_Pgm_Func_No ; Function no
|
|
mov Temp8, Tx_Pgm_Paraval_No ; Parameter value no
|
|
clr EA ; Disable all interrupts
|
|
function_beep:
|
|
call beep_f1
|
|
call beep_f1
|
|
call beep_f1
|
|
call wait10ms
|
|
djnz Temp7, function_beep
|
|
paraval_beep:
|
|
call beep_f4
|
|
call wait10ms
|
|
djnz Temp8, paraval_beep
|
|
setb EA ; Enable all interrupts
|
|
ret
|
|
|
|
|
|
;**** **** **** **** **** **** **** **** **** **** **** **** ****
|
|
;
|
|
; Program by TX routine
|
|
;
|
|
; No assumptions
|
|
;
|
|
;**** **** **** **** **** **** **** **** **** **** **** **** ****
|
|
program_by_tx:
|
|
; Programming mode entry beeps
|
|
call success_beep
|
|
call wait1s
|
|
call wait1s
|
|
|
|
; Start at function 1, parameter value 1
|
|
mov Tx_Pgm_Func_No, #1
|
|
paraval_no_entry:
|
|
mov Tx_Pgm_Paraval_No, #1
|
|
beep_no_entry:
|
|
mov Tx_Pgm_Beep_No, #0
|
|
func_paraval:
|
|
call function_paraval_beep
|
|
mov Temp5, #5 ; Wait is 5x 200ms
|
|
func_paraval_wait:
|
|
mov Temp6, New_Rcp ; Load RC pulse
|
|
call wait200ms
|
|
clr C
|
|
mov A, Temp6
|
|
subb A, New_Rcp ; Is RC pulse stable? (Avoid issues from 3in1 interference)
|
|
jnz func_paraval_wait ; No - branch
|
|
clr C
|
|
mov A, New_Rcp ; Load new RC pulse value
|
|
subb A, #RCP_STOP ; Below stop?
|
|
jc func_paraval_store ; Yes - branch
|
|
|
|
clr C
|
|
mov A, New_Rcp ; Load new RC pulse value
|
|
subb A, #RCP_MAX ; Below max?
|
|
jc function_next ; Yes - branch
|
|
|
|
ljmp func_paraval_cont_wait ; No - branch
|
|
|
|
func_paraval_store:
|
|
call store_new_value_in_ram ; Yes - store new value in RAM
|
|
call erase_and_store_all_in_eeprom ; Store all values in EEPROM
|
|
call success_beep ; Beep success
|
|
clr EA ; Disable all interrupts
|
|
IF ONE_S_CAPABLE == 0
|
|
mov RSTSRC, #12h ; Generate hardware reset and set VDD monitor
|
|
ELSE
|
|
mov RSTSRC, #10h ; Generate hardware reset and disable VDD monitor
|
|
ENDIF
|
|
call wait1s
|
|
|
|
func_paraval_cont_wait:
|
|
djnz Temp5, func_paraval_wait
|
|
inc Tx_Pgm_Beep_No ; Check number of beeps
|
|
clr C
|
|
mov A, Tx_Pgm_Beep_No
|
|
subb A, #3 ; Three beeps done?
|
|
jnc paraval_next ; Yes - Next parameter value
|
|
|
|
jmp func_paraval ; No - go back
|
|
|
|
paraval_next:
|
|
call wait1s
|
|
inc Tx_Pgm_Paraval_No ; Parameter value no
|
|
IF MODE == 0
|
|
mov A, Tx_Pgm_Func_No ; Decode number of parameters
|
|
dec A
|
|
mov DPTR, #TX_PGM_PARAMS_MAIN
|
|
movc A, @A+DPTR
|
|
mov Temp1, A
|
|
ENDIF
|
|
IF MODE == 1
|
|
mov A, Tx_Pgm_Func_No ; Decode number of parameters
|
|
dec A
|
|
mov DPTR, #TX_PGM_PARAMS_TAIL
|
|
movc A, @A+DPTR
|
|
mov Temp1, A
|
|
ENDIF
|
|
IF MODE == 2
|
|
mov A, Tx_Pgm_Func_No ; Decode number of parameters
|
|
dec A
|
|
mov DPTR, #TX_PGM_PARAMS_MULTI
|
|
movc A, @A+DPTR
|
|
mov Temp1, A
|
|
ENDIF
|
|
inc Temp1
|
|
clr C
|
|
mov A, Tx_Pgm_Paraval_No
|
|
subb A, Temp1
|
|
jnc function_next ; Last parameter value?
|
|
jmp beep_no_entry ; No - go back
|
|
|
|
function_next: ; Yes - Next function value
|
|
call wait1s
|
|
call wait1s
|
|
inc Tx_Pgm_Func_No ; Function value no
|
|
IF MODE == 0
|
|
clr C
|
|
mov A, Tx_Pgm_Func_No
|
|
subb A, #12 ; Main has 11 functions
|
|
ENDIF
|
|
IF MODE == 1
|
|
clr C
|
|
mov A, Tx_Pgm_Func_No
|
|
subb A, #9 ; Tail has 8 functions
|
|
ENDIF
|
|
IF MODE == 2
|
|
clr C
|
|
mov A, Tx_Pgm_Func_No
|
|
subb A, #12 ; Multi has 11 functions
|
|
ENDIF
|
|
jnc program_by_tx_exit ; Last function value?
|
|
jmp paraval_no_entry ; No - go back
|
|
|
|
program_by_tx_exit:
|
|
call set_default_parameters ; Load all defaults
|
|
call erase_and_store_all_in_eeprom ; Erase flash and program
|
|
clr EA ; Disable all interrupts
|
|
IF ONE_S_CAPABLE == 0
|
|
mov RSTSRC, #12h ; Generate hardware reset and set VDD monitor
|
|
ELSE
|
|
mov RSTSRC, #10h ; Generate hardware reset and disable VDD monitor
|
|
ENDIF
|
|
call wait1s
|
|
*/
|