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318 lines
7.0 KiB
318 lines
7.0 KiB
;**** **** **** **** ****
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;
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; BLHeli program for controlling brushless motors in helicopters
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;
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; Copyright 2011, 2012 Steffen Skaug
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; This program is distributed under the terms of the GNU General Public License
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;
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; This file is part of BLHeli.
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;
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; BLHeli is free software: you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation, either version 3 of the License, or
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; (at your option) any later version.
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;
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; BLHeli is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
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;
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;**** **** **** **** ****
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;*********************
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; Device Atmega8
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;*********************
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.include "m8def.inc"
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.equ ICP = 0 ; Choose input pin. Set to 0 for INT0 (pin32) and 1 for ICP1 (pin12)
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;**** **** **** **** ****
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; Fuses must be set to internal calibrated oscillator = 8Mhz
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;**** **** **** **** ****
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;**** **** **** **** ****
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; Constant definitions
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;**** **** **** **** ****
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.equ ADC_LIMIT_L = 211 ; Power supply measurement ADC value for which main motor power is limited (low byte)
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.equ ADC_LIMIT_H = 0 ; Power supply measurement ADC value for which main motor power is limited (2 MSBs)
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;*********************
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; PORT D definitions *
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;*********************
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;.equ = 7 ;i
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.equ Comp_Com = 6 ;i Comparator common input (AIN0)
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.equ ApFET = 5 ;o
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.equ CpFET = 4 ;o
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.equ BpFET = 3 ;o
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.equ Rcp_In = 2 ;i RC pulse input
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;.equ = 1 ;i
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;.equ = 0 ;i
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.equ INIT_PD = 0
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.equ DIR_PD = (1<<ApFET)+(1<<BpFET)+(1<<CpFET)
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.MACRO Read_Rcp_Int
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in @0, PIND
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sbrc Flags2, PGM_RCP_PWM_POL ; Is pwm polarity negative?
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com @0 ; Yes - invert
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.ENDMACRO
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.MACRO Read_Rcp_Icp_Int
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in @0, PINB
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sbrc Flags2, PGM_RCP_PWM_POL ; Is pwm polarity negative?
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com @0 ; Yes - invert
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.ENDMACRO
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.MACRO Rcp_Int_Enable
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ldi @0, (1<<INT0) ; Enable ext0int
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out GICR, @0
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.ENDMACRO
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.MACRO Rcp_Int_Disable
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ldi @0, 0 ; Disable ext0int
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out GICR, @0
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.ENDMACRO
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.MACRO Rcp_Int_First
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sbrs Flags2, PGM_RCP_PWM_POL ; Is pwm polarity positive?
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ldi @0, (1<<ISC01)+(1<<ISC00) ; Yes - set next int0 to rising
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sbrc Flags2, PGM_RCP_PWM_POL ; Is pwm polarity negative?
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ldi @0, (1<<ISC01) ; Yes - set next int0 to falling
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out MCUCR, @0
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.ENDMACRO
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.MACRO Rcp_Int_Second
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sbrs Flags2, PGM_RCP_PWM_POL ; Is pwm polarity positive?
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ldi @0, (1<<ISC01) ; Yes - set next int0 to falling
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sbrc Flags2, PGM_RCP_PWM_POL ; Is pwm polarity negative?
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ldi @0, (1<<ISC01)+(1<<ISC00) ; Yes - set next int0 to rising
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out MCUCR, @0
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.ENDMACRO
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.MACRO Clear_Int_Flag
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clr @0
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sbr @0, (1<<INTF0) ; Clear ext0int flag
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out GIFR, @0
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.ENDMACRO
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.MACRO ApFET_on
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sbi PORTD,5
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.ENDMACRO
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.MACRO ApFET_off
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cbi PORTD,5
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.ENDMACRO
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.MACRO CpFET_on
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sbi PORTD,4
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.ENDMACRO
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.MACRO CpFET_off
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cbi PORTD,4
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.ENDMACRO
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.MACRO BpFET_on
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sbi PORTD,3
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.ENDMACRO
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.MACRO BpFET_off
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cbi PORTD,3
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.ENDMACRO
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.MACRO All_pFETs_Off
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in @0, PORTD
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cbr @0, (1<<ApFET)+(1<<BpFET)+(1<<CpFET)
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out PORTD, @0
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.ENDMACRO
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.MACRO All_pFETs_On
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in @0, PORTD
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sbr @0, (1<<ApFET)+(1<<BpFET)+(1<<CpFET)
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out PORTD, @0
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.ENDMACRO
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;*********************
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; PORT C definitions *
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;*********************
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;.equ = 7 ; ADC7
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;.equ = 6 ; ADC6
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.equ Mux_A = 5 ; Phase A input
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.equ Mux_C = 4 ; Phase C input
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;.equ = 3 ; ADC3
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.equ Mux_B = 2 ; Phase B input
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;.equ = 1 ; ADC1
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;.equ = 0 ; ADC0
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.equ INIT_PC = 0
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.equ DIR_PC = 0
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.MACRO Comp_Init
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in @0, SFIOR ; Set Analog Comparator Multiplexer Enable
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sbr @0, (1<<ACME)
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out SFIOR, @0
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cbi ADCSRA, ADEN ; Disable ADC
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.ENDMACRO
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.MACRO Set_Comp_Phase_A
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ldi @0, Mux_A ; Set comparator multiplexer to phase A
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out ADMUX, @0
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.ENDMACRO
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.MACRO Set_Comp_Phase_B
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ldi @0, Mux_B ; Set comparator multiplexer to phase B
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out ADMUX, @0
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.ENDMACRO
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.MACRO Set_Comp_Phase_C
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ldi @0, Mux_C ; Set comparator multiplexer to phase C
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out ADMUX, @0
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.ENDMACRO
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.MACRO Read_Comp_Out
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in @0, ACSR ; Read comparator output
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.ENDMACRO
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;*********************
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; PORT B definitions *
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;*********************
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;.equ = 7
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;.equ = 6
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;.equ = 5 (sck stk200 interface)
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.equ DebugPin = 4 ;(miso stk200 interface)
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;.equ = 3 (mosi stk200 interface)
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.equ AnFET = 2
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.equ CnFET = 1
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.equ BnFET = 0
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.equ INIT_PB = 0
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.equ DIR_PB = (1<<DebugPin)+(1<<AnFET)+(1<<BnFET)+(1<<CnFET)
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.MACRO AnFET_on
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sbi PORTB,2
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.ENDMACRO
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.MACRO AnFET_off
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cbi PORTB,2
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.ENDMACRO
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.MACRO CnFET_on
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sbi PORTB,1
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.ENDMACRO
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.MACRO CnFET_off
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cbi PORTB,1
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.ENDMACRO
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.MACRO BnFET_on
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sbi PORTB,0
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.ENDMACRO
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.MACRO BnFET_off
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cbi PORTB,0
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.ENDMACRO
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.MACRO All_nFETs_Off
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in @0, PORTB
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cbr @0, (1<<AnFET)+(1<<BnFET)+(1<<CnFET)
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out PORTB, @0
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.ENDMACRO
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;**********************
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; MCU specific macros *
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;**********************
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.MACRO Disable_Watchdog
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cli ; Disable interrupts
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wdr ; Reset watchdog timer
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in @0, WDTCR ; Write logical one to WDCE and WDE
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ori @0, (1<<WDCE)|(1<<WDE)
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out WDTCR, @0
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ldi @0, (0<<WDE) ; Turn off WDT
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out WDTCR, @0
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.ENDMACRO
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.MACRO Enable_Watchdog
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ldi @0, (1<<WDE) ; Turn on WDT
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sts WDTCR, @0
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.ENDMACRO
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.MACRO Initialize_MCU
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.ENDMACRO
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.MACRO Interrupt_Table_Definition
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rjmp reset
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rjmp ext_int0 ; ext_int0
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nop ; ext_int1
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nop ; t2oc_int
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rjmp t2ovfl_int; t2ovfl_int
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nop ; icp1_int
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rjmp t1oca_int ; t1oca_int
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nop ; t1ocb_int
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rjmp t1ovfl_int; t1ovfl_int
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rjmp t0ovfl_int; t0ovfl_int
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nop ; spi_int
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nop ; urxc
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nop ; udre
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nop ; utxc
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; nop ; adc_int
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; nop ; eep_int
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; nop ; aci_int
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; nop ; wire2_int
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; nop ; spmc_int
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.ENDMACRO
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.MACRO Initialize_Interrupts
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ldi Temp1, (1<<TOIE0)+(1<<TOIE1)+(1<<OCIE1A)+(1<<TOIE2)
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out TIFR, Temp1 ; Clear interrupts
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out TIMSK, Temp1 ; Enable interrupts
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.ENDMACRO
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.MACRO Initialize_Adc
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in Temp1, ADCSRA ; Set ADCSRA register (1MHz clock)
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sbr Temp1, (1<<ADPS1)
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sbr Temp1, (1<<ADPS0)
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out ADCSRA, Temp1
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.ENDMACRO
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.MACRO Start_Adc
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ldi Temp1, (1<<REFS1)+(1<<REFS0)
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out ADMUX, Temp1 ; Set ADMUX register (2.56V reference, left adj result, input 0)
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in @0, ADCSRA
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sbr @0, (1<<ADEN) ; Enable ADC
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sbr @0, (1<<ADSC) ; Start ADC conversion
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out ADCSRA, @0
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.ENDMACRO
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.MACRO Get_Adc_Status
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in @0, ADCSRA
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.ENDMACRO
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.MACRO Read_Adc_Result
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in @0, ADCL
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in @1, ADCH
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.ENDMACRO
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.MACRO Stop_Adc
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in @0, ADCSRA
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cbr @0, (1<<ADEN) ; Disable ADC
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out ADCSRA, @0
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.ENDMACRO
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.MACRO Set_Timer0_CS0
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out TCCR0, @0
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.ENDMACRO
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.MACRO Set_Timer1_CS1
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out TCCR1B, @0
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.ENDMACRO
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.MACRO Set_Timer2_CS2
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out TCCR2, @0
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.ENDMACRO
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.MACRO Read_TCNT1L
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in @0, TCNT1L
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.ENDMACRO
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.MACRO Read_TCNT1H
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in @0, TCNT1H
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.ENDMACRO
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.MACRO Set_OCR1AL
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out OCR1AL, @0
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.ENDMACRO
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.MACRO Set_OCR1AH
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out OCR1AH, @0
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.ENDMACRO
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.MACRO Set_TCNT2
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out TCNT2, @0
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.ENDMACRO
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.MACRO Check_Eeprom_Ready
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sbic EECR, EEWE
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.ENDMACRO
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.MACRO Set_Eeprom_Address
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out EEARL, @0
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out EEARH, @1
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.ENDMACRO
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.MACRO Start_Eeprom_Write
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sbi EECR, EEMWE
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sbi EECR, EEWE
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.ENDMACRO
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