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472 lines
16 KiB
472 lines
16 KiB
;---------------------------------------------------------------------------
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;
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;
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;
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;
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; FILE NAME: C8051F330.INC
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; TARGET MCUs: C8051F330, F331
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; DESCRIPTION: Register/bit definitions for the C8051F330 product family.
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;
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; REVISION 1.0
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;
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;---------------------------------------------------------------------------
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;REGISTER DEFINITIONS
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;
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P0 DATA 080H ; PORT 0 LATCH
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SP DATA 081H ; STACK POINTER
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DPL DATA 082H ; DATA POINTER LOW
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DPH DATA 083H ; DATA POINTER HIGH
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PCON DATA 087H ; POWER CONTROL
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TCON DATA 088H ; TIMER/COUNTER CONTROL
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TMOD DATA 089H ; TIMER/COUNTER MODE
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TL0 DATA 08AH ; TIMER/COUNTER 0 LOW
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TL1 DATA 08BH ; TIMER/COUNTER 1 LOW
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TH0 DATA 08CH ; TIMER/COUNTER 0 HIGH
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TH1 DATA 08DH ; TIMER/COUNTER 1 HIGH
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CKCON DATA 08EH ; CLOCK CONTROL
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PSCTL DATA 08FH ; PROGRAM STORE R/W CONTROL
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P1 DATA 090H ; PORT 1 LATCH
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TMR3CN DATA 091H ; TIMER/COUNTER 3 CONTROL
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TMR3RLL DATA 092H ; TIMER/COUNTER 3 RELOAD LOW
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TMR3RLH DATA 093H ; TIMER/COUNTER 3 RELOAD HIGH
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TMR3L DATA 094H ; TIMER/COUNTER 3 LOW
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TMR3H DATA 095H ; TIMER/COUNTER 3 HIGH
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IDA0L DATA 096H ; CURRENT MODE DAC0 LOW
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IDA0H DATA 097H ; CURRENT MODE DAC0 HIGH
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SCON0 DATA 098H ; UART0 CONTROL
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SBUF0 DATA 099H ; UART0 DATA BUFFER
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CPT0CN DATA 09BH ; COMPARATOR0 CONTROL
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CPT0MD DATA 09DH ; COMPARATOR0 MODE SELECTION
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CPT0MX DATA 09FH ; COMPARATOR0 MUX SELECTION
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P2 DATA 0A0H ; PORT 2 LATCH
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SPI0CFG DATA 0A1H ; SPI CONFIGURATION
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SPI0CKR DATA 0A2H ; SPI CLOCK RATE CONTROL
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SPI0DAT DATA 0A3H ; SPI DATA
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P0MDOUT DATA 0A4H ; PORT 0 OUTPUT MODE CONFIGURATION
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P1MDOUT DATA 0A5H ; PORT 1 OUTPUT MODE CONFIGURATION
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P2MDOUT DATA 0A6H ; PORT 2 OUTPUT MODE CONFIGURATION
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IE DATA 0A8H ; INTERRUPT ENABLE
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CLKSEL DATA 0A9H ; CLOCK SELECT
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EMI0CN DATA 0AAH ; EXTERNAL MEMORY INTERFACE CONTROL
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OSCXCN DATA 0B1H ; EXTERNAL OSCILLATOR CONTROL
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OSCICN DATA 0B2H ; INTERNAL OSCILLATOR CONTROL
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OSCICL DATA 0B3H ; INTERNAL OSCILLATOR CALIBRATION
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FLSCL DATA 0B6H ; FLASH SCALE
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FLKEY DATA 0B7H ; FLASH LOCK AND KEY
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IP DATA 0B8H ; INTERRUPT PRIORITY
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IDA0CN DATA 0B9H ; CURRENT MODE DAC0 CONTROL
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AMX0N DATA 0BAH ; AMUX0 NEGATIVE CHANNEL SELECT
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AMX0P DATA 0BBH ; AMUX0 POSITIVE CHANNEL SELECT
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ADC0CF DATA 0BCH ; ADC0 CONFIGURATION
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ADC0L DATA 0BDH ; ADC0 LOW
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ADC0H DATA 0BEH ; ADC0 HIGH
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SMB0CN DATA 0C0H ; SMBUS CONTROL
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SMB0CF DATA 0C1H ; SMBUS CONFIGURATION
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SMB0DAT DATA 0C2H ; SMBUS DATA
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ADC0GTL DATA 0C3H ; ADC0 GREATER-THAN COMPARE LOW
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ADC0GTH DATA 0C4H ; ADC0 GREATER-THAN COMPARE HIGH
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ADC0LTL DATA 0C5H ; ADC0 LESS-THAN COMPARE WORD LOW
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ADC0LTH DATA 0C6H ; ADC0 LESS-THAN COMPARE WORD HIGH
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TMR2CN DATA 0C8H ; TIMER/COUNTER 2 CONTROL
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TMR2RLL DATA 0CAH ; TIMER/COUNTER 2 RELOAD LOW
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TMR2RLH DATA 0CBH ; TIMER/COUNTER 2 RELOAD HIGH
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TMR2L DATA 0CCH ; TIMER/COUNTER 2 LOW
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TMR2H DATA 0CDH ; TIMER/COUNTER 2 HIGH
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PSW DATA 0D0H ; PROGRAM STATUS WORD
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REF0CN DATA 0D1H ; VOLTAGE REFERENCE CONTROL
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P0SKIP DATA 0D4H ; PORT 0 SKIP
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P1SKIP DATA 0D5H ; PORT 1 SKIP
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PCA0CN DATA 0D8H ; PCA CONTROL
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PCA0MD DATA 0D9H ; PCA MODE
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PCA0CPM0 DATA 0DAH ; PCA MODULE 0 MODE REGISTER
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PCA0CPM1 DATA 0DBH ; PCA MODULE 1 MODE REGISTER
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PCA0CPM2 DATA 0DCH ; PCA MODULE 2 MODE REGISTER
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ACC DATA 0E0H ; ACCUMULATOR
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XBR0 DATA 0E1H ; PORT I/O CROSSBAR CONTROL 0
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XBR1 DATA 0E2H ; PORT I/O CROSSBAR CONTROL 1
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OSCLCN DATA 0E3H ; LOW-FREQUENCY OSCILLATOR CONTROL
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IT01CF DATA 0E4H ; INT0/INT1 CONFIGURATION
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EIE1 DATA 0E6H ; EXTENDED INTERRUPT ENABLE 1
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ADC0CN DATA 0E8H ; ADC0 CONTROL
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PCA0CPL1 DATA 0E9H ; PCA CAPTURE 1 LOW
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PCA0CPH1 DATA 0EAH ; PCA CAPTURE 1 HIGH
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PCA0CPL2 DATA 0EBH ; PCA CAPTURE 2 LOW
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PCA0CPH2 DATA 0ECH ; PCA CAPTURE 2 HIGH
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RSTSRC DATA 0EFH ; RESET SOURCE CONFIGURATION/STATUS
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B DATA 0F0H ; B REGISTER
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P0MDIN DATA 0F1H ; PORT 0 INPUT MODE CONFIGURATION
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P1MDIN DATA 0F2H ; PORT 1 INPUT MODE CONFIGURATION
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EIP1 DATA 0F6H ; EXTENDED INTERRUPT PRIORITY 1
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SPI0CN DATA 0F8H ; SPI CONTROL
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PCA0L DATA 0F9H ; PCA COUNTER LOW
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PCA0H DATA 0FAH ; PCA COUNTER HIGH
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PCA0CPL0 DATA 0FBH ; PCA CAPTURE 0 LOW
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PCA0CPH0 DATA 0FCH ; PCA CAPTURE 0 HIGH
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VDM0CN DATA 0FFH ; VDD MONITOR CONTROL
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;
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;------------------------------------------------------------------------------
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;BIT DEFINITIONS
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;
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; TCON 088H
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TF1 BIT 08FH ; TIMER 1 OVERFLOW FLAG
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TR1 BIT 08EH ; TIMER 1 ON/OFF CONTROL
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TF0 BIT 08DH ; TIMER 0 OVERFLOW FLAG
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TR0 BIT 08CH ; TIMER 0 ON/OFF CONTROL
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IE1 BIT 08BH ; EXT. INTERRUPT 1 EDGE FLAG
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IT1 BIT 08AH ; EXT. INTERRUPT 1 TYPE
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IE0 BIT 089H ; EXT. INTERRUPT 0 EDGE FLAG
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IT0 BIT 088H ; EXT. INTERRUPT 0 TYPE
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; SCON0 098H
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S0MODE BIT 09FH ; UART 0 MODE
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MCE0 BIT 09DH ; UART 0 MCE
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REN0 BIT 09CH ; UART 0 RX ENABLE
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TB80 BIT 09BH ; UART 0 TX BIT 8
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RB80 BIT 09AH ; UART 0 RX BIT 8
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TI0 BIT 099H ; UART 0 TX INTERRUPT FLAG
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RI0 BIT 098H ; UART 0 RX INTERRUPT FLAG
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; IE 0A8H
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EA BIT 0AFH ; GLOBAL INTERRUPT ENABLE
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ESPI0 BIT 0AEH ; SPI0 INTERRUPT ENABLE
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ET2 BIT 0ADH ; TIMER 2 INTERRUPT ENABLE
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ES0 BIT 0ACH ; UART0 INTERRUPT ENABLE
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ET1 BIT 0ABH ; TIMER 1 INTERRUPT ENABLE
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EX1 BIT 0AAH ; EXTERNAL INTERRUPT 1 ENABLE
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ET0 BIT 0A9H ; TIMER 0 INTERRUPT ENABLE
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EX0 BIT 0A8H ; EXTERNAL INTERRUPT 0 ENABLE
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; IP 0B8H
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PSPI0 BIT 0BEH ; SPI0 PRIORITY
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PT2 BIT 0BDH ; TIMER 2 PRIORITY
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PS0 BIT 0BCH ; UART0 PRIORITY
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PT1 BIT 0BBH ; TIMER 1 PRIORITY
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PX1 BIT 0BAH ; EXTERNAL INTERRUPT 1 PRIORITY
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PT0 BIT 0B9H ; TIMER 0 PRIORITY
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PX0 BIT 0B8H ; EXTERNAL INTERRUPT 0 PRIORITY
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; SMB0CN 0C0H
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MASTER BIT 0C7H ; SMBUS 0 MASTER/SLAVE
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TXMODE BIT 0C6H ; SMBUS 0 TRANSMIT MODE
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STA BIT 0C5H ; SMBUS 0 START FLAG
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STO BIT 0C4H ; SMBUS 0 STOP FLAG
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ACKRQ BIT 0C3H ; SMBUS 0 ACKNOWLEDGE REQUEST
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ARBLOST BIT 0C2H ; SMBUS 0 ARBITRATION LOST
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ACK BIT 0C1H ; SMBUS 0 ACKNOWLEDGE FLAG
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SI BIT 0C0H ; SMBUS 0 INTERRUPT PENDING FLAG
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; TMR2CN 0C8H
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TF2H BIT 0CFH ; TIMER 2 HIGH BYTE OVERFLOW FLAG
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TF2L BIT 0CEH ; TIMER 2 LOW BYTE OVERFLOW FLAG
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TF2LEN BIT 0CDH ; TIMER 2 LOW BYTE INTERRUPT ENABLE
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TF2CEN BIT 0CCH ; TIMER 2 LFO CAPTURE ENABLE
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T2SPLIT BIT 0CBH ; TIMER 2 SPLIT MODE ENABLE
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TR2 BIT 0CAH ; TIMER 2 ON/OFF CONTROL
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T2XCLK BIT 0C8H ; TIMER 2 EXTERNAL CLOCK SELECT
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; PSW 0D0H
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CY BIT 0D7H ; CARRY FLAG
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AC BIT 0D6H ; AUXILIARY CARRY FLAG
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F0 BIT 0D5H ; USER FLAG 0
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RS1 BIT 0D4H ; REGISTER BANK SELECT 1
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RS0 BIT 0D3H ; REGISTER BANK SELECT 0
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OV BIT 0D2H ; OVERFLOW FLAG
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F1 BIT 0D1H ; USER FLAG 1
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P BIT 0D0H ; ACCUMULATOR PARITY FLAG
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; PCA0CN 0D8H
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CF BIT 0DFH ; PCA 0 COUNTER OVERFLOW FLAG
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CR BIT 0DEH ; PCA 0 COUNTER RUN CONTROL BIT
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CCF2 BIT 0DAH ; PCA 0 MODULE 2 INTERRUPT FLAG
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CCF1 BIT 0D9H ; PCA 0 MODULE 1 INTERRUPT FLAG
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CCF0 BIT 0D8H ; PCA 0 MODULE 0 INTERRUPT FLAG
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; ADC 0 WINDOW INTERRUPT FLAG
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; ADC0CN 0E8H
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AD0EN BIT 0EFH ; ADC 0 ENABLE
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AD0TM BIT 0EEH ; ADC 0 TRACK MODE
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AD0INT BIT 0EDH ; ADC 0 EOC INTERRUPT FLAG
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AD0BUSY BIT 0ECH ; ADC 0 BUSY FLAG
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AD0WINT BIT 0EBH ; ADC 0 WINDOW INTERRUPT FLAG
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AD0CM2 BIT 0EAH ; ADC 0 CONVERT START MODE BIT 2
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AD0CM1 BIT 0E9H ; ADC 0 CONVERT START MODE BIT 1
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AD0CM0 BIT 0E8H ; ADC 0 CONVERT START MODE BIT 0
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; SPI0CN 0F8H
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SPIF BIT 0FFH ; SPI 0 INTERRUPT FLAG
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WCOL BIT 0FEH ; SPI 0 WRITE COLLISION FLAG
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MODF BIT 0FDH ; SPI 0 MODE FAULT FLAG
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RXOVRN BIT 0FCH ; SPI 0 RX OVERRUN FLAG
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NSSMD1 BIT 0FBH ; SPI 0 SLAVE SELECT MODE 1
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NSSMD0 BIT 0FAH ; SPI 0 SLAVE SELECT MODE 0
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TXBMT BIT 0F9H ; SPI 0 TX BUFFER EMPTY FLAG
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SPIEN BIT 0F8H ; SPI 0 SPI ENABLE
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;**** **** **** **** ****
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; Uses internal calibrated oscillator set to 24Mhz
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;**** **** **** **** ****
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;**** **** **** **** ****
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; Constant definitions
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;**** **** **** **** ****
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CSEG AT 1A40h
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Eep_ESC_Layout: DB "#XP18A# " ; ESC layout tag
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CSEG AT 1A50h
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Eep_ESC_MCU: DB "#BLHELI#F330# " ; Project and MCU tag (16 Bytes)
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PORT3_EXIST EQU 0 ; Set to 1 if MCU has port3
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COMP1_USED EQU 0 ; Set to 1 if MCU has comparator 1 and it is being used
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DUAL_BEC_VOLTAGE EQU 0 ; Set to 1 if dual BEC voltage is supported
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DAMPED_MODE_ENABLE EQU 1 ; Damped mode disabled
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NFETON_DELAY EQU 1 ; Wait delay from pfets off to nfets on
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PFETON_DELAY EQU 1 ; Wait delay from nfets off to pfets on
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COMP_PWM_HIGH_ON_DELAY EQU 15 ; Wait delay from pwm on until comparator can be read (for high pwm frequency)
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COMP_PWM_HIGH_OFF_DELAY EQU 20 ; Wait delay from pwm off until comparator can be read (for high pwm frequency)
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COMP_PWM_LOW_ON_DELAY EQU 5 ; Wait delay from pwm on until comparator can be read (for low pwm frequency)
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COMP_PWM_LOW_OFF_DELAY EQU 7 ; Wait delay from pwm off until comparator can be read (for low pwm frequency)
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ADC_LIMIT_L EQU 80 ;改一节电池低压基值 2.8V 2013.05.31
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;ADC_LIMIT_L EQU 85 ; Power supply measurement ADC value for which main motor power is limited (low byte)
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ADC_LIMIT_H EQU 0 ; Power supply measurement ADC value for which main motor power is limited (2 MSBs)
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TEMP_LIMIT EQU 92 ; 2013.8.20 温度140改120 Temperature measurement ADC value for which main motor power is limited (low byte, assuming high byte is 1)
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TEMP_LIMIT_STEP EQU 5 ; Temperature measurement ADC value increment for which main motor power is further limited
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MAIN_SPOOLUP_TIME EQU 10 ; Main motor spoolup time
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;**** **** **** **** ****
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; ESC specific defaults
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;**** **** **** **** ****
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DEFAULT_PGM_MAIN_STARTUP_PWR EQU 10 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
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DEFAULT_PGM_TAIL_STARTUP_PWR EQU 10 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
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DEFAULT_PGM_MULTI_STARTUP_PWR EQU 10 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
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DEFAULT_PGM_MAIN_STARTUP_METHOD EQU 2 ; 1=Stepped 2=Direct
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DEFAULT_PGM_TAIL_STARTUP_METHOD EQU 2 ; 1=Stepped 2=Direct
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DEFAULT_PGM_MULTI_STARTUP_METHOD EQU 2 ; 1=Stepped 2=Direct
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;*********************
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; PORT 0 definitions *
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;*********************
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Rcp_In EQU 7 ;i
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Adc_Ip EQU 6 ;i
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Mux_A EQU 5 ;i
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; EQU 4 ;i
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Mux_B EQU 3 ;i
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Comp_Com EQU 2 ;i
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Mux_C EQU 1 ;i
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Vref EQU 0 ;i
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P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)+(1 SHL Adc_Ip)+(1 SHL Vref))
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P0_INIT EQU 0FFh
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P0_PUSHPULL EQU 0
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P0_SKIP EQU NOT(1 SHL Rcp_In) AND 0FFh
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MACRO Read_Rcp_Int
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mov A, P0
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jnb Flags3.PGM_RCP_PWM_POL, ($+4) ; Is pwm polarity negative?
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cpl A ; Yes - invert
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ENDM
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MACRO Rcp_Int_Enable
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orl PCA0CPM0, #01h ; Interrupt enabled
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ENDM
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MACRO Rcp_Int_Disable
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anl PCA0CPM0, #0FEh ; Interrupt disabled
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ENDM
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MACRO Rcp_Int_First
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anl PCA0CPM0, #0CFh
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jb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity positive?
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orl PCA0CPM0, #20h ; Capture rising edge
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jnb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity negative?
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orl PCA0CPM0, #10h ; Capture falling edge
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ENDM
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MACRO Rcp_Int_Second
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anl PCA0CPM0, #0CFh
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jb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity positive?
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orl PCA0CPM0, #10h ; Capture falling edge
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jnb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity negative?
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orl PCA0CPM0, #20h ; Capture rising edge
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ENDM
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MACRO Rcp_Clear_Int_Flag
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clr CCF0 ; Clear interrupt flag
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ENDM
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;*********************
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; PORT 1 definitions *
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;*********************
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DriverEn EQU 7 ;o At least on some escs. Others are hardwired
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; EQU 6 ;i
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AnFET EQU 2 ;o "nFETs" are really the high side drivers
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BnFET EQU 1 ;o
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CnFET EQU 0 ;o
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ApFET EQU 5 ;o "pFETs" are really the low side drivers
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BpFET EQU 4 ;o
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CpFET EQU 3 ;o
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P1_DIGITAL EQU (1 SHL AnFET)+(1 SHL BnFET)+(1 SHL CnFET)+(1 SHL ApFET)+(1 SHL BpFET)+(1 SHL CpFET)+(1 SHL DriverEn)
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P1_INIT EQU 080h
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P1_PUSHPULL EQU (1 SHL AnFET)+(1 SHL BnFET)+(1 SHL CnFET)+(1 SHL ApFET)+(1 SHL BpFET)+(1 SHL CpFET)+(1 SHL DriverEn)
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P1_SKIP EQU 0
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MACRO AnFET_on
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mov A, Current_Pwm_Limited
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jz ($+12)
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jb Flags3.PGM_DIR_REV, ($+5)
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setb P1.AnFET
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jnb Flags3.PGM_DIR_REV, ($+5)
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setb P1.CnFET
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ENDM
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MACRO AnFET_off
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jb Flags3.PGM_DIR_REV, ($+5)
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clr P1.AnFET
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jnb Flags3.PGM_DIR_REV, ($+5)
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clr P1.CnFET
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ENDM
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MACRO BnFET_on
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mov A, Current_Pwm_Limited
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jz ($+4)
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setb P1.BnFET
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ENDM
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MACRO BnFET_off
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clr P1.BnFET
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ENDM
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MACRO CnFET_on
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mov A, Current_Pwm_Limited
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jz ($+12)
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jb Flags3.PGM_DIR_REV, ($+5)
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setb P1.CnFET
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jnb Flags3.PGM_DIR_REV, ($+5)
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setb P1.AnFET
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ENDM
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MACRO CnFET_off
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jb Flags3.PGM_DIR_REV, ($+5)
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clr P1.CnFET
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jnb Flags3.PGM_DIR_REV, ($+5)
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clr P1.AnFET
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ENDM
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MACRO All_nFETs_Off
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clr P1.AnFET
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clr P1.BnFET
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clr P1.CnFET
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ENDM
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MACRO All_nFETs_On
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setb P1.AnFET
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setb P1.BnFET
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setb P1.CnFET
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ENDM
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MACRO A_B_nFETs_On
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setb P1.AnFET
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setb P1.BnFET
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ENDM
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MACRO ApFET_on
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jb Flags3.PGM_DIR_REV, ($+5)
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setb P1.ApFET
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jnb Flags3.PGM_DIR_REV, ($+5)
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setb P1.CpFET
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ENDM
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MACRO ApFET_off
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jb Flags3.PGM_DIR_REV, ($+5)
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clr P1.ApFET
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jnb Flags3.PGM_DIR_REV, ($+5)
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clr P1.CpFET
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ENDM
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MACRO BpFET_on
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setb P1.BpFET
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ENDM
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MACRO BpFET_off
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clr P1.BpFET
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ENDM
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MACRO CpFET_on
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jb Flags3.PGM_DIR_REV, ($+5)
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setb P1.CpFET
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jnb Flags3.PGM_DIR_REV, ($+5)
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setb P1.ApFET
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ENDM
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MACRO CpFET_off
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jb Flags3.PGM_DIR_REV, ($+5)
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clr P1.CpFET
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jnb Flags3.PGM_DIR_REV, ($+5)
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clr P1.ApFET
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ENDM
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MACRO All_pFETs_Off
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clr P1.ApFET
|
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clr P1.BpFET
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|
clr P1.CpFET
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|
ENDM
|
|
;MACRO All_pFETs_On
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|
; setb P1.ApFET
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|
; setb P1.BpFET
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|
; setb P1.CpFET
|
|
;ENDM
|
|
|
|
MACRO Set_Comp_Phase_A
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|
jb Flags3.PGM_DIR_REV, ($+6)
|
|
mov CPT0MX, #21h ; Set comparator multiplexer to phase A
|
|
jnb Flags3.PGM_DIR_REV, ($+6)
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|
mov CPT0MX, #01h
|
|
ENDM
|
|
MACRO Set_Comp_Phase_B
|
|
mov CPT0MX, #11h ; Set comparator multiplexer to phase B
|
|
ENDM
|
|
MACRO Set_Comp_Phase_C
|
|
jb Flags3.PGM_DIR_REV, ($+6)
|
|
mov CPT0MX, #01h ; Set comparator multiplexer to phase C
|
|
jnb Flags3.PGM_DIR_REV, ($+6)
|
|
mov CPT0MX, #21h
|
|
ENDM
|
|
MACRO Read_Comp_Out
|
|
mov A, CPT0CN ; Read comparator output
|
|
cpl A
|
|
ENDM
|
|
|
|
|
|
;*********************
|
|
; PORT 2 definitions *
|
|
;*********************
|
|
DebugPin EQU 0 ;o
|
|
|
|
P2_PUSHPULL EQU (1 SHL DebugPin)
|
|
|
|
|
|
;**********************
|
|
; MCU specific macros *
|
|
;**********************
|
|
MACRO Interrupt_Table_Definition
|
|
CSEG AT 0 ; Code segment start
|
|
jmp reset
|
|
CSEG AT 0Bh ; Timer0 interrupt
|
|
jmp t0_int
|
|
CSEG AT 2Bh ; Timer2 interrupt
|
|
jmp t2_int
|
|
CSEG AT 5Bh ; PCA interrupt
|
|
jmp pca_int
|
|
CSEG AT 73h ; Timer3 interrupt
|
|
jmp t3_int
|
|
ENDM
|
|
|
|
MACRO Initialize_Adc
|
|
mov REF0CN, #0Eh ; Set vdd (3.3V) as reference. Enable temp sensor and bias
|
|
mov ADC0CF, #58h ; ADC clock 2MHz
|
|
mov AMX0P, #Adc_Ip ; Select positive input
|
|
mov AMX0N, #11h ; Select negative input as ground
|
|
mov ADC0CN, #80h ; ADC enabled
|
|
ENDM
|
|
MACRO Set_Adc_Ip_Volt
|
|
mov AMX0P, #Adc_Ip ; Select positive input 选择电压检测，P0.6为电压正输入
|
|
ENDM
|
|
MACRO Set_Adc_Ip_Temp
|
|
mov AMX0P, #10h ; Select temp sensor input
|
|
ENDM
|
|
MACRO Start_Adc
|
|
mov ADC0CN, #90h ; ADC start
|
|
ENDM
|
|
MACRO Get_Adc_Status
|
|
mov A, ADC0CN
|
|
ENDM
|
|
MACRO Read_Adc_Result
|
|
mov Temp1, ADC0L
|
|
mov Temp2, ADC0H
|
|
ENDM
|
|
MACRO Stop_Adc
|
|
ENDM
|