sskaug
11 years ago
1 changed files with 301 additions and 0 deletions
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;**** **** **** **** **** |
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; |
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; BLHeli program for controlling brushless motors in helicopters and multirotors |
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; |
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; Copyright 2011, 2012 Steffen Skaug |
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; This program is distributed under the terms of the GNU General Public License |
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; |
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; This file is part of BLHeli. |
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; |
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; BLHeli is free software: you can redistribute it and/or modify |
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; it under the terms of the GNU General Public License as published by |
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; the Free Software Foundation, either version 3 of the License, or |
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; (at your option) any later version. |
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; |
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; BLHeli is distributed in the hope that it will be useful, |
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; but WITHOUT ANY WARRANTY; without even the implied warranty of |
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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; GNU General Public License for more details. |
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; |
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; You should have received a copy of the GNU General Public License |
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; along with BLHeli. If not, see <http://www.gnu.org/licenses/>. |
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; |
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;**** **** **** **** **** |
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; |
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; EAZY 3A v2 hardware definition file |
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; Layout is similar to XP 3A but different volatge divider at Adc_Ip |
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; XP3A.inc file mod by 4712 |
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;**** **** **** **** **** |
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;********************* |
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; Device SiLabs F330 |
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;********************* |
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$include (c8051f330.inc) |
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;**** **** **** **** **** |
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; Uses internal calibrated oscillator set to 24Mhz |
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;**** **** **** **** **** |
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;**** **** **** **** **** |
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; Constant definitions |
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;**** **** **** **** **** |
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CSEG AT 1A40h |
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Eep_ESC_Layout: DB "#EAZY3Av2# " ; ESC layout tag |
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CSEG AT 1A50h |
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Eep_ESC_MCU: DB "#BLHELI#F330# " ; Project and MCU tag (16 Bytes) |
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ONE_S_CAPABLE EQU 1 ; Set to 1 if ESC can operate at 1S |
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PORT3_EXIST EQU 0 ; Set to 1 if MCU has port3 |
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COMP1_USED EQU 0 ; Set to 1 if MCU has comparator 1 and it is being used |
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DUAL_BEC_VOLTAGE EQU 0 ; Set to 1 if dual BEC voltage is supported |
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DAMPED_MODE_ENABLE EQU 1 ; Damped mode enabled |
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NFETON_DELAY EQU 5 ; Wait delay from pfets off to nfets on |
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PFETON_DELAY EQU 1 ; Wait delay from nfets off to pfets on |
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COMP_PWM_HIGH_ON_DELAY EQU 10 ; Wait delay from pwm on until comparator can be read (for high pwm frequency) |
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COMP_PWM_HIGH_OFF_DELAY EQU 15 ; Wait delay from pwm off until comparator can be read (for high pwm frequency) |
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COMP_PWM_LOW_ON_DELAY EQU 4 ; Wait delay from pwm on until comparator can be read (for low pwm frequency) |
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COMP_PWM_LOW_OFF_DELAY EQU 5 ; Wait delay from pwm off until comparator can be read (for low pwm frequency) |
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ADC_LIMIT_L EQU 236 ; Power supply measurement ADC value for which main motor power is limited (low byte) |
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ADC_LIMIT_H EQU 1 ; Power supply measurement ADC value for which main motor power is limited (2 MSBs) |
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TEMP_LIMIT EQU 246 ; Temperature measurement ADC value for which main motor power is limited (low byte, assuming high byte is 1) |
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TEMP_LIMIT_STEP EQU 6 ; Temperature measurement ADC value increment for which main motor power is further limited |
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MAIN_SPOOLUP_TIME EQU 7 ; Main motor spoolup time |
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|
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;**** **** **** **** **** |
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; ESC specific defaults |
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;**** **** **** **** **** |
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DEFAULT_PGM_MAIN_STARTUP_PWR EQU 11 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50 |
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DEFAULT_PGM_TAIL_STARTUP_PWR EQU 11 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50 |
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DEFAULT_PGM_MULTI_STARTUP_PWR EQU 11 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50 |
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DEFAULT_PGM_MAIN_STARTUP_METHOD EQU 1 ; 1=Stepped 2=Direct |
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DEFAULT_PGM_TAIL_STARTUP_METHOD EQU 1 ; 1=Stepped 2=Direct |
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DEFAULT_PGM_MULTI_STARTUP_METHOD EQU 2 ; 1=Stepped 2=Direct |
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;********************* |
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; PORT 0 definitions * |
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;********************* |
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Rcp_In EQU 7 ;i |
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Adc_Ip EQU 6 ;i |
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Mux_A EQU 5 ;i |
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; EQU 4 ;i |
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Mux_B EQU 3 ;i |
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Comp_Com EQU 2 ;i |
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Mux_C EQU 1 ;i |
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Vref EQU 0 ;i |
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P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)+(1 SHL Adc_Ip)+(1 SHL Vref)) |
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P0_INIT EQU 0FFh |
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P0_PUSHPULL EQU 0 |
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P0_SKIP EQU NOT(1 SHL Rcp_In) AND 0FFh |
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MACRO Get_Rcp_Capture_Values |
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mov Temp1, PCA0CPL0 ; Get PCA capture values |
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mov Temp2, PCA0CPH0 |
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ENDM |
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MACRO Read_Rcp_Int |
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mov A, P0 |
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jnb Flags3.PGM_RCP_PWM_POL, ($+4) ; Is pwm polarity negative? |
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cpl A ; Yes - invert |
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ENDM |
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MACRO Rcp_Int_Enable |
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orl PCA0CPM0, #01h ; Interrupt enabled |
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ENDM |
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MACRO Rcp_Int_Disable |
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anl PCA0CPM0, #0FEh ; Interrupt disabled |
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ENDM |
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MACRO Rcp_Int_First |
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anl PCA0CPM0, #0CFh |
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jb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity positive? |
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orl PCA0CPM0, #20h ; Capture rising edge |
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jnb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity negative? |
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orl PCA0CPM0, #10h ; Capture falling edge |
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ENDM |
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MACRO Rcp_Int_Second |
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anl PCA0CPM0, #0CFh |
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jb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity positive? |
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orl PCA0CPM0, #10h ; Capture falling edge |
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jnb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity negative? |
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orl PCA0CPM0, #20h ; Capture rising edge |
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ENDM |
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MACRO Rcp_Clear_Int_Flag |
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clr CCF0 ; Clear interrupt flag |
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ENDM |
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|
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;********************* |
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; PORT 1 definitions * |
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;********************* |
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; EQU 7 ;i |
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; EQU 6 ;i |
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CpFET EQU 5 ;o |
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BpFET EQU 4 ;o |
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ApFET EQU 3 ;o |
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CnFET EQU 2 ;o |
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BnFET EQU 1 ;o |
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AnFET EQU 0 ;o |
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P1_DIGITAL EQU (1 SHL AnFET)+(1 SHL BnFET)+(1 SHL CnFET)+(1 SHL ApFET)+(1 SHL BpFET)+(1 SHL CpFET) |
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P1_INIT EQU (1 SHL ApFET)+(1 SHL BpFET)+(1 SHL CpFET) ; Setting pFET outputs turn them off |
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P1_PUSHPULL EQU (1 SHL AnFET)+(1 SHL BnFET)+(1 SHL CnFET)+(1 SHL ApFET)+(1 SHL BpFET)+(1 SHL CpFET) |
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P1_SKIP EQU 0 |
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MACRO AnFET_on |
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mov A, Current_Pwm_Limited |
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jz ($+12) |
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jb Flags3.PGM_DIR_REV, ($+5) |
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setb P1.AnFET |
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jnb Flags3.PGM_DIR_REV, ($+5) |
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setb P1.CnFET |
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ENDM |
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MACRO AnFET_off |
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jb Flags3.PGM_DIR_REV, ($+5) |
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clr P1.AnFET |
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jnb Flags3.PGM_DIR_REV, ($+5) |
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clr P1.CnFET |
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ENDM |
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MACRO BnFET_on |
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mov A, Current_Pwm_Limited |
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jz ($+4) |
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setb P1.BnFET |
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ENDM |
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MACRO BnFET_off |
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clr P1.BnFET |
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ENDM |
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MACRO CnFET_on |
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mov A, Current_Pwm_Limited |
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jz ($+12) |
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jb Flags3.PGM_DIR_REV, ($+5) |
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setb P1.CnFET |
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jnb Flags3.PGM_DIR_REV, ($+5) |
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setb P1.AnFET |
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ENDM |
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MACRO CnFET_off |
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jb Flags3.PGM_DIR_REV, ($+5) |
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clr P1.CnFET |
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jnb Flags3.PGM_DIR_REV, ($+5) |
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clr P1.AnFET |
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ENDM |
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MACRO All_nFETs_Off |
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clr P1.AnFET |
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clr P1.BnFET |
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clr P1.CnFET |
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ENDM |
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MACRO ApFET_on |
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jb Flags3.PGM_DIR_REV, ($+5) |
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clr P1.ApFET |
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jnb Flags3.PGM_DIR_REV, ($+5) |
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clr P1.CpFET |
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ENDM |
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MACRO ApFET_off |
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jb Flags3.PGM_DIR_REV, ($+5) |
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setb P1.ApFET |
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jnb Flags3.PGM_DIR_REV, ($+5) |
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setb P1.CpFET |
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ENDM |
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MACRO BpFET_on |
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clr P1.BpFET |
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ENDM |
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MACRO BpFET_off |
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setb P1.BpFET |
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ENDM |
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MACRO CpFET_on |
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jb Flags3.PGM_DIR_REV, ($+5) |
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clr P1.CpFET |
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jnb Flags3.PGM_DIR_REV, ($+5) |
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clr P1.ApFET |
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ENDM |
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MACRO CpFET_off |
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jb Flags3.PGM_DIR_REV, ($+5) |
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setb P1.CpFET |
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jnb Flags3.PGM_DIR_REV, ($+5) |
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setb P1.ApFET |
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ENDM |
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MACRO All_pFETs_Off |
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setb P1.ApFET |
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setb P1.BpFET |
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setb P1.CpFET |
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ENDM |
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MACRO All_pFETs_On |
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clr P1.ApFET |
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clr P1.BpFET |
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clr P1.CpFET |
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ENDM |
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MACRO Set_Comp_Phase_A |
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jb Flags3.PGM_DIR_REV, ($+6) |
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mov CPT0MX, #21h ; Set comparator multiplexer to phase A |
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jnb Flags3.PGM_DIR_REV, ($+6) |
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mov CPT0MX, #01h |
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ENDM |
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MACRO Set_Comp_Phase_B |
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mov CPT0MX, #11h ; Set comparator multiplexer to phase B |
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ENDM |
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MACRO Set_Comp_Phase_C |
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jb Flags3.PGM_DIR_REV, ($+6) |
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mov CPT0MX, #01h ; Set comparator multiplexer to phase C |
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jnb Flags3.PGM_DIR_REV, ($+6) |
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mov CPT0MX, #21h |
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ENDM |
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MACRO Read_Comp_Out |
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mov A, CPT0CN ; Read comparator output |
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cpl A ; Invert output |
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ENDM |
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|
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;********************* |
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; PORT 2 definitions * |
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;********************* |
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DebugPin EQU 0 ;o |
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P2_PUSHPULL EQU (1 SHL DebugPin) |
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;********************** |
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; MCU specific macros * |
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;********************** |
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MACRO Interrupt_Table_Definition |
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CSEG AT 0 ; Code segment start |
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jmp reset |
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CSEG AT 0Bh ; Timer0 interrupt |
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jmp t0_int |
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CSEG AT 2Bh ; Timer2 interrupt |
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jmp t2_int |
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CSEG AT 5Bh ; PCA interrupt |
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jmp pca_int |
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CSEG AT 73h ; Timer3 interrupt |
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jmp t3_int |
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ENDM |
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|
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MACRO Initialize_Xbar |
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mov XBR1, #41h ; Xbar enabled, CEX0 routed to pin Rcp_In |
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ENDM |
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|
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MACRO Initialize_Adc |
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mov REF0CN, #07h ; Enable temp sensor, bias and reference buffer |
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mov ADC0CF, #58h ; ADC clock 2MHz |
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mov AMX0P, #Adc_Ip ; Select positive input |
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mov AMX0N, #11h ; Select negative input as ground |
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mov ADC0CN, #80h ; ADC enabled |
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ENDM |
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MACRO Set_Adc_Ip_Volt |
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mov AMX0P, #Adc_Ip ; Select positive input |
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ENDM |
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MACRO Set_Adc_Ip_Temp |
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mov AMX0P, #10h ; Select temp sensor input |
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ENDM |
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MACRO Start_Adc |
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mov ADC0CN, #90h ; ADC start |
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ENDM |
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MACRO Get_Adc_Status |
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mov A, ADC0CN |
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ENDM |
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MACRO Read_Adc_Result |
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mov Temp1, ADC0L |
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mov Temp2, ADC0H |
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ENDM |
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MACRO Stop_Adc |
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ENDM |
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