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  1. ;**** **** **** **** ****
  2. ;
  3. ; BLHeli program for controlling brushless motors in helicopters and multirotors
  4. ;
  5. ; Copyright 2011, 2012 Steffen Skaug
  6. ; This program is distributed under the terms of the GNU General Public License
  7. ;
  8. ; This file is part of BLHeli.
  9. ;
  10. ; BLHeli is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; BLHeli is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
  22. ;
  23. ;**** **** **** **** ****
  24. ;
  25. ; Oversky MR-20A Pro hardware definition file
  26. ;
  27. ;**** **** **** **** ****
  28. ;*********************
  29. ; Device SiLabs F390
  30. ;*********************
  31. $include (c8051f390.inc)
  32. ;**** **** **** **** ****
  33. ; Uses internal calibrated oscillator set to 24/48Mhz
  34. ;**** **** **** **** ****
  35. ;**** **** **** **** ****
  36. ; Constant definitions
  37. ;**** **** **** **** ****
  38. CSEG AT 1A40h
  39. Eep_ESC_Layout: DB "#OvskyMR20APro# " ; ESC layout tag
  40. CSEG AT 1A50h
  41. Eep_ESC_MCU: DB "#BLHELI#F390# " ; Project and MCU tag (16 Bytes)
  42. MCU_48MHZ EQU 1 ; Set to 1 if MCU can run at 48MHz
  43. ONE_S_CAPABLE EQU 0 ; Set to 1 if ESC can operate at 1S
  44. PORT3_EXIST EQU 0 ; Set to 1 if MCU has port3
  45. COMP1_USED EQU 0 ; Set to 1 if MCU has comparator 1 and it is being used
  46. LOCK_BYTE_ADDRESS_16K EQU 3FFFh ; Address of lock byte if 16k flash size
  47. LOCK_BYTE_ADDRESS_8K EQU 1FFFh ; Address of lock byte if 8k flash size
  48. HIGH_BEC_VOLTAGE EQU 0 ; Set to 1 or more if high BEC voltage is supported
  49. DAMPED_MODE_ENABLE EQU 1 ; Damped mode enabled
  50. NFETON_DELAY EQU 16 ; Wait delay from pfets off to nfets on
  51. PFETON_DELAY EQU 20 ; Wait delay from nfets off to pfets on
  52. ADC_LIMIT_L EQU 0 ; No divider. Power supply measurement ADC value for which main motor power is limited (low byte)
  53. ADC_LIMIT_H EQU 0 ; No divider. Power supply measurement ADC value for which main motor power is limited (2 MSBs)
  54. TEMP_LIMIT EQU 114 ; Temperature measurement ADC value for which main motor power is limited (low byte, assuming high byte is 1)
  55. TEMP_LIMIT_STEP EQU 4 ; Temperature measurement ADC value increment for which main motor power is further limited
  56. ;**** **** **** **** ****
  57. ; ESC specific defaults
  58. ;**** **** **** **** ****
  59. DEFAULT_PGM_MAIN_SPOOLUP_TIME EQU 10 ; Main motor spoolup time
  60. DEFAULT_PGM_MAIN_STARTUP_PWR EQU 10 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  61. DEFAULT_PGM_TAIL_STARTUP_PWR EQU 10 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  62. DEFAULT_PGM_MULTI_STARTUP_PWR EQU 10 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  63. ;**** **** **** **** ****
  64. ; Bootloader definitions
  65. ;**** **** **** **** ****
  66. RTX_PORT EQU P0 ; Receive/Transmit port
  67. RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL
  68. RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL
  69. RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP
  70. RTX_PIN EQU 7 ; RTX pin
  71. SIGNATURE_001 EQU 0f3h ; Device signature
  72. SIGNATURE_002 EQU 090h
  73. ;*********************
  74. ; PORT 0 definitions *
  75. ;*********************
  76. Rcp_In EQU 7 ;i
  77. Adc_Ip EQU 6 ;i
  78. Mux_A EQU 5 ;i
  79. ; EQU 4 ;i
  80. Mux_B EQU 3 ;i
  81. Comp_Com EQU 2 ;i
  82. Mux_C EQU 1 ;i
  83. Vref EQU 0 ;i
  84. P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)+(1 SHL Adc_Ip)+(1 SHL Vref))
  85. P0_INIT EQU 0FFh
  86. P0_PUSHPULL EQU 0
  87. P0_SKIP EQU NOT(1 SHL Rcp_In) AND 0FFh
  88. MACRO Get_Rcp_Capture_Values
  89. mov Temp1, PCA0CPL0 ; Get PCA capture values
  90. mov Temp2, PCA0CPH0
  91. IF MCU_48MHZ == 1
  92. mov A, Clock_Set_At_48MHz
  93. jz Get_Rcp_End
  94. clr C
  95. mov A, Temp2
  96. rrc A
  97. mov Temp2, A
  98. mov A, Temp1
  99. rrc A
  100. mov Temp1, A
  101. Get_Rcp_End:
  102. ENDM
  103. MACRO Read_Rcp_Int
  104. mov A, P0
  105. jnb Flags3.PGM_RCP_PWM_POL, ($+4) ; Is pwm polarity negative?
  106. cpl A ; Yes - invert
  107. ENDM
  108. MACRO Rcp_Int_Enable
  109. orl PCA0CPM0, #01h ; Interrupt enabled
  110. ENDM
  111. MACRO Rcp_Int_Disable
  112. anl PCA0CPM0, #0FEh ; Interrupt disabled
  113. ENDM
  114. MACRO Rcp_Int_First
  115. anl PCA0CPM0, #0CFh
  116. jb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity positive?
  117. orl PCA0CPM0, #20h ; Capture rising edge
  118. jnb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity negative?
  119. orl PCA0CPM0, #10h ; Capture falling edge
  120. ENDM
  121. MACRO Rcp_Int_Second
  122. anl PCA0CPM0, #0CFh
  123. jb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity positive?
  124. orl PCA0CPM0, #10h ; Capture falling edge
  125. jnb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity negative?
  126. orl PCA0CPM0, #20h ; Capture rising edge
  127. ENDM
  128. MACRO Rcp_Clear_Int_Flag
  129. clr CCF0 ; Clear interrupt flag
  130. ENDM
  131. ;*********************
  132. ; PORT 1 definitions *
  133. ;*********************
  134. DriverEn EQU 7 ;o At least on some escs. Others are hardwired
  135. ; EQU 6 ;i
  136. AnFET EQU 5 ;o "nFETs" are really the high side drivers
  137. BnFET EQU 4 ;o
  138. CnFET EQU 3 ;o
  139. ApFET EQU 2 ;o "pFETs" are really the low side drivers
  140. BpFET EQU 1 ;o
  141. CpFET EQU 0 ;o
  142. P1_DIGITAL EQU (1 SHL AnFET)+(1 SHL BnFET)+(1 SHL CnFET)+(1 SHL ApFET)+(1 SHL BpFET)+(1 SHL CpFET)+(1 SHL DriverEn)
  143. P1_INIT EQU 087h
  144. P1_PUSHPULL EQU (1 SHL AnFET)+(1 SHL BnFET)+(1 SHL CnFET)+(1 SHL ApFET)+(1 SHL BpFET)+(1 SHL CpFET)+(1 SHL DriverEn)
  145. P1_SKIP EQU 0
  146. MACRO AnFET_on
  147. setb P1.AnFET
  148. ENDM
  149. MACRO AnFET_off
  150. clr P1.AnFET
  151. ENDM
  152. MACRO BnFET_on
  153. setb P1.BnFET
  154. ENDM
  155. MACRO BnFET_off
  156. clr P1.BnFET
  157. ENDM
  158. MACRO CnFET_on
  159. setb P1.CnFET
  160. ENDM
  161. MACRO CnFET_off
  162. clr P1.CnFET
  163. ENDM
  164. MACRO All_nFETs_Off
  165. clr P1.AnFET
  166. clr P1.BnFET
  167. clr P1.CnFET
  168. ENDM
  169. MACRO ApFET_on
  170. clr P1.ApFET
  171. ENDM
  172. MACRO ApFET_off
  173. setb P1.ApFET
  174. ENDM
  175. MACRO BpFET_on
  176. clr P1.BpFET
  177. ENDM
  178. MACRO BpFET_off
  179. setb P1.BpFET
  180. ENDM
  181. MACRO CpFET_on
  182. clr P1.CpFET
  183. ENDM
  184. MACRO CpFET_off
  185. setb P1.CpFET
  186. setb P1.ApFET
  187. ENDM
  188. MACRO All_pFETs_On
  189. clr P1.ApFET
  190. clr P1.BpFET
  191. clr P1.CpFET
  192. ENDM
  193. MACRO All_pFETs_Off
  194. setb P1.ApFET
  195. setb P1.BpFET
  196. setb P1.CpFET
  197. ENDM
  198. MACRO Damping_FET_On
  199. mov A, DampingFET
  200. cpl A
  201. anl P1, A
  202. ENDM
  203. MACRO Set_Comp_Phase_A
  204. mov CPT0MX, #21h ; Set comparator multiplexer to phase A
  205. ENDM
  206. MACRO Set_Comp_Phase_B
  207. mov CPT0MX, #11h ; Set comparator multiplexer to phase B
  208. ENDM
  209. MACRO Set_Comp_Phase_C
  210. mov CPT0MX, #01h ; Set comparator multiplexer to phase C
  211. ENDM
  212. MACRO Read_Comp_Out
  213. mov A, CPT0CN ; Read comparator output
  214. ENDM
  215. ;*********************
  216. ; PORT 2 definitions *
  217. ;*********************
  218. DebugPin EQU 0 ;o
  219. P2_PUSHPULL EQU (1 SHL DebugPin)
  220. ;**********************
  221. ; MCU specific macros *
  222. ;**********************
  223. MACRO Interrupt_Table_Definition
  224. CSEG AT 0 ; Code segment start
  225. jmp reset
  226. CSEG AT 0Bh ; Timer0 interrupt
  227. jmp t0_int
  228. CSEG AT 2Bh ; Timer2 interrupt
  229. jmp t2_int
  230. CSEG AT 5Bh ; PCA interrupt
  231. jmp pca_int
  232. CSEG AT 73h ; Timer3 interrupt
  233. jmp t3_int
  234. ENDM
  235. MACRO Initialize_Xbar
  236. mov XBR1, #41h ; Xbar enabled, CEX0 routed to pin Rcp_In
  237. ENDM
  238. MACRO Initialize_Adc
  239. mov REF0CN, #0Eh ; Set vdd (3.3V) as reference. Enable temp sensor and bias
  240. mov ADC0CF, #58h ; ADC clock 2MHz
  241. mov AMX0P, #Adc_Ip ; Select positive input
  242. mov AMX0N, #11h ; Select negative input as ground
  243. mov ADC0CN, #80h ; ADC enabled
  244. ENDM
  245. MACRO Set_Adc_Ip_Volt
  246. mov AMX0P, #Adc_Ip ; Select positive input
  247. ENDM
  248. MACRO Set_Adc_Ip_Temp
  249. mov AMX0P, #10h ; Select temp sensor input
  250. ENDM
  251. MACRO Start_Adc
  252. mov ADC0CN, #90h ; ADC start
  253. ENDM
  254. MACRO Get_Adc_Status
  255. mov A, ADC0CN
  256. ENDM
  257. MACRO Read_Adc_Result
  258. mov Temp1, ADC0L
  259. mov Temp2, ADC0H
  260. ENDM
  261. MACRO Stop_Adc
  262. ENDM
  263. MACRO Set_RPM_Out
  264. ENDM
  265. MACRO Clear_RPM_Out
  266. ENDM
  267. MACRO Set_MCU_Clk_24MHz
  268. mov CLKSEL, #0 ; Set clock to 24MHz
  269. mov FLSCL, #80h ; Set flash timing for 24MHz
  270. mov Clock_Set_At_48MHz, #0
  271. ENDM
  272. MACRO Set_MCU_Clk_48MHz
  273. mov FLSCL, #90h ; Set flash timing for 48MHz
  274. mov CLKSEL, #3 ; Set clock to 48MHz
  275. mov Clock_Set_At_48MHz, #1
  276. ENDM