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;------------------------------------------------------------------------------; C8051F410.INC;------------------------------------------------------------------------------; Copyright 2005 Silicon Laboratories, Inc.; http://www.silabs.com;; Program Description:;; Register/bit definitions for the C8051F41x family.;;; FID: 41X000004; Target: C8051F410, F411, F412, F413; Tool chain: Keil; Command Line: None;;; Release 1.0; -Initial Revision (GP, PKC); -26 JAN 2006;
;------------------------------------------------------------------------------; Byte Registers;------------------------------------------------------------------------------
P0 DATA 080H ; Port 0 latchSP DATA 081H ; Stack pointerDPL DATA 082H ; Data pointer lowDPH DATA 083H ; Data pointer highCRC0CN DATA 084H ; CRC0 controlCRC0IN DATA 085H ; CRC0 input dataCRC0DAT DATA 086H ; CRC0 output dataPCON DATA 087H ; Power controlTCON DATA 088H ; Timer/counter controlTMOD DATA 089H ; Timer/counter modeTL0 DATA 08AH ; Timer/counter 0 lowTL1 DATA 08BH ; Timer/counter 1 lowTH0 DATA 08CH ; Timer/counter 0 highTH1 DATA 08DH ; Timer/counter 1 highCKCON DATA 08EH ; Clock controlPSCTL DATA 08FH ; Program store R/W controlP1 DATA 090H ; Port 1 latchTMR3CN DATA 091H ; Timer/counter 3 controlTMR3RLL DATA 092H ; Timer/counter 3 reload lowTMR3RLH DATA 093H ; Timer/counter 3 reload highTMR3L DATA 094H ; Timer/counter 3 lowTMR3H DATA 095H ; Timer/counter 3 highIDA0L DATA 096H ; Current mode DAC0 lowIDA0H DATA 097H ; Current mode DAC0 highSCON0 DATA 098H ; UART0 controlSBUF0 DATA 099H ; UART0 data bufferCPT1CN DATA 09AH ; Comparator1 controlCPT0CN DATA 09BH ; Comparator0 controlCPT1MD DATA 09CH ; Comparator1 mode selectionCPT0MD DATA 09DH ; Comparator0 mode selectionCPT1MX DATA 09EH ; Comparator1 mux selectionCPT0MX DATA 09FH ; Comparator0 mux selectionP2 DATA 0A0H ; Port 2 latchSPI0CFG DATA 0A1H ; SPI0 configurationSPI0CKR DATA 0A2H ; SPI0 clock rate controlSPI0DAT DATA 0A3H ; SPI0 dataP0MDOUT DATA 0A4H ; Port 0 output mode configurationP1MDOUT DATA 0A5H ; Port 1 output mode configurationP2MDOUT DATA 0A6H ; Port 2 output mode configurationIE DATA 0A8H ; Interrupt enableCLKSEL DATA 0A9H ; Clock selectEMI0CN DATA 0AAH ; External memory interface controlCLKMUL DATA 0ABH ; Clock multiplierRTC0ADR DATA 0ACH ; RTC0 addressRTC0DAT DATA 0ADH ; RTC0 dataRTC0KEY DATA 0AEH ; RTC0 lock and keyONESHOT DATA 0AFH ; Flash oneshot timingP0ODEN DATA 0B0H ; Port0 Hi-Z overdrive mode enableOSCXCN DATA 0B1H ; External oscillator controlOSCICN DATA 0B2H ; Internal oscillator controlOSCICL DATA 0B3H ; Internal oscillator calibrationIDA1CN DATA 0B5H ; Current mode DAC1 controlFLSCL DATA 0B6H ; Flash scaleFLKEY DATA 0B7H ; Flash lock and keyIP DATA 0B8H ; Interrupt priorityIDA0CN DATA 0B9H ; Current mode DAC0 controlADC0TK DATA 0BAH ; ADC0 trackingADC0MX DATA 0BBH ; ADC0 muxADC0CF DATA 0BCH ; ADC0 configurationADC0L DATA 0BDH ; ADC0 data lowADC0H DATA 0BEH ; ADC0 data highP1MASK DATA 0BFH ; Port1 maskSMB0CN DATA 0C0H ; SMBus0 controlSMB0CF DATA 0C1H ; SMBus0 configurationSMB0DAT DATA 0C2H ; SMBus0 dataADC0GTL DATA 0C3H ; ADC0 window greater than low byteADC0GTH DATA 0C4H ; ADC0 window greater than high byteADC0LTL DATA 0C5H ; ADC0 window less than low byteADC0LTH DATA 0C6H ; ADC0 window less than high byteP0MASK DATA 0C7H ; Port0 maskTMR2CN DATA 0C8H ; Timer/counter 2 controlREG0CN DATA 0C9H ; Voltage regulator controlTMR2RLL DATA 0CAH ; Timer/counter 2 reload lowTMR2RLH DATA 0CBH ; Timer/counter 2 reload highTMR2L DATA 0CCH ; Timer/counter 2 lowTMR2H DATA 0CDH ; Timer/counter 2 highPCA0CPM5 DATA 0CEH ; PCA0 module 5 modeP1MAT DATA 0CFH ; Port1 matchPSW DATA 0D0H ; Program status wordREF0CN DATA 0D1H ; Voltage reference controlPCA0CPL5 DATA 0D2H ; PCA0 module 5 lowPCA0CPH5 DATA 0D3H ; PCA0 module 5 highP0SKIP DATA 0D4H ; Port 0 skipP1SKIP DATA 0D5H ; Port 1 skipP2SKIP DATA 0D6H ; Port 2 skipP0MAT DATA 0D7H ; Port 0 matchPCA0CN DATA 0D8H ; PCA0 controlPCA0MD DATA 0D9H ; PCA0 modePCA0CPM0 DATA 0DAH ; PCA0 module 0 modePCA0CPM1 DATA 0DBH ; PCA0 module 1 modePCA0CPM2 DATA 0DCH ; PCA0 module 2 modePCA0CPM3 DATA 0DDH ; PCA0 module 3 modePCA0CPM4 DATA 0DEH ; PCA0 module 4 modeCRC0FLIP DATA 0DFH ; CRC0 bit flipACC DATA 0E0H ; AccumulatorXBR0 DATA 0E1H ; Port I/O crossbar control 0XBR1 DATA 0E2H ; Port I/O crossbar control 1PFE0CN DATA 0E3H ; Prefetch engine controlIT01CF DATA 0E4H ; INT0/INT1 configurationEIE1 DATA 0E6H ; Extended interrupt enable 1EIE2 DATA 0E7H ; Extended interrupt enable 2ADC0CN DATA 0E8H ; ADC0 controlPCA0CPL1 DATA 0E9H ; PCA0 module 1 capture lowPCA0CPH1 DATA 0EAH ; PCA0 module 1 capture highPCA0CPL2 DATA 0EBH ; PCA0 module 2 capture lowPCA0CPH2 DATA 0ECH ; PCA0 module 2 capture highPCA0CPL3 DATA 0EDH ; PCA0 module 3 capture lowPCA0CPH3 DATA 0EEH ; PCA0 module 3 capture highRSTSRC DATA 0EFH ; Reset source configuration/statusB DATA 0F0H ; B registerP0MDIN DATA 0F1H ; Port 0 input mode configurationP1MDIN DATA 0F2H ; Port 1 input mode configurationP2MDIN DATA 0F3H ; Port 2 input mode configurationIDA1L DATA 0F4H ; Current mode DAC1 data lowIDA1H DATA 0F5H ; Current mode DAC1 data highEIP1 DATA 0F6H ; Extended interrupt priority 1EIP2 DATA 0F7H ; Extended interrupt priority 2SPI0CN DATA 0F8H ; SPI0 controlPCA0L DATA 0F9H ; PCA0 counter lowPCA0H DATA 0FAH ; PCA0 counter highPCA0CPL0 DATA 0FBH ; PCA0 module 0 capture lowPCA0CPH0 DATA 0FCH ; PCA0 module 0 capture highPCA0CPL4 DATA 0FDH ; PCA0 module 4 capture lowPCA0CPH4 DATA 0FEH ; PCA0 module 4 capture highVDM0CN DATA 0FFH ; VDD monitor control
;------------------------------------------------------------------------------; Bit Definitions;------------------------------------------------------------------------------
; TCON 0x88TF1 BIT TCON.7 ; Timer 1 overflow flagTR1 BIT TCON.6 ; Timer 1 on/off controlTF0 BIT TCON.5 ; Timer 0 overflow flagTR0 BIT TCON.4 ; Timer 0 on/off controlIE1 BIT TCON.3 ; Ext. Interrupt 1 edge flagIT1 BIT TCON.2 ; Ext. Interrupt 1 typeIE0 BIT TCON.1 ; Ext. Interrupt 0 edge flagIT0 BIT TCON.0 ; Ext. Interrupt 0 type
; SCON0 0x98S0MODE BIT SCON0.7 ; UART0 mode ; Bit 6 UnusedMCE0 BIT SCON0.5 ; UART0 MCEREN0 BIT SCON0.4 ; UART0 RX enableTB80 BIT SCON0.3 ; UART0 TX bit 8RB80 BIT SCON0.2 ; UART0 RX bit 8TI0 BIT SCON0.1 ; UART0 TX interrupt flagRI0 BIT SCON0.0 ; UART0 RX interrupt flag
; IE 0xA8EA BIT IE.7 ; Global interrupt enableESPI0 BIT IE.6 ; SPI0 interrupt enableET2 BIT IE.5 ; Timer 2 interrupt enableES0 BIT IE.4 ; UART0 interrupt enableET1 BIT IE.3 ; Timer 1 interrupt enableEX1 BIT IE.2 ; External interrupt 1 enableET0 BIT IE.1 ; Timer 0 interrupt enableEX0 BIT IE.0 ; External interrupt 0 enable
; IP 0xB8 ; Bit 7 UnusedPSPI0 BIT IP.6 ; SPI0 priorityPT2 BIT IP.5 ; Timer 2 priorityPS0 BIT IP.4 ; UART0 priorityPT1 BIT IP.3 ; Timer 1 priorityPX1 BIT IP.2 ; External interrupt 1 priorityPT0 BIT IP.1 ; Timer 0 priorityPX0 BIT IP.0 ; External interrupt 0 priority
; SMB0CN 0xC0MASTER BIT SMB0CN.7 ; SMBus0 master/slaveTXMODE BIT SMB0CN.6 ; SMBus0 transmit modeSTA BIT SMB0CN.5 ; SMBus0 start flagSTO BIT SMB0CN.4 ; SMBus0 stop flagACKRQ BIT SMB0CN.3 ; SMBus0 acknowledge requestARBLOST BIT SMB0CN.2 ; SMBus0 arbitration lostACK BIT SMB0CN.1 ; SMBus0 acknowledge flagSI BIT SMB0CN.0 ; SMBus0 interrupt pending flag
; TMR2CN 0xC8TF2H BIT TMR2CN.7 ; Timer 2 high byte overflow flagTF2L BIT TMR2CN.6 ; Timer 2 low byte overflow flagTF2LEN BIT TMR2CN.5 ; Timer 2 low byte interrupt enableTF2CEN BIT TMR2CN.4 ; Timer 2 capture enableT2SPLIT BIT TMR2CN.3 ; Timer 2 split mode enableTR2 BIT TMR2CN.2 ; Timer 2 on/off controlT2RCLK BIT TMR2CN.1 ; Timer 2 RTC capture mode selectT2XCLK BIT TMR2CN.0 ; Timer 2 external clock select
; PSW 0xD0CY BIT PSW.7 ; Carry flagAC BIT PSW.6 ; Auxiliary carry flagF0 BIT PSW.5 ; User flag 0RS1 BIT PSW.4 ; Register bank select 1RS0 BIT PSW.3 ; Register bank select 0OV BIT PSW.2 ; Overflow flagF1 BIT PSW.1 ; User flag 1P BIT PSW.0 ; Accumulator parity flag
; PCA0CN 0xD8CF BIT PCA0CN.7 ; PCA0 counter overflow flagCR BIT PCA0CN.6 ; PCA0 counter run control bitCCF5 BIT PCA0CN.5 ; PCA0 module 5 interrupt flagCCF4 BIT PCA0CN.4 ; PCA0 module 4 interrupt flagCCF3 BIT PCA0CN.3 ; PCA0 module 3 interrupt flagCCF2 BIT PCA0CN.2 ; PCA0 module 2 interrupt flagCCF1 BIT PCA0CN.1 ; PCA0 module 1 interrupt flagCCF0 BIT PCA0CN.0 ; PCA0 module 0 interrupt flag
; ADC0CN 0xE8AD0EN BIT ADC0CN.7 ; ADC0 enableBURSTEN BIT ADC0CN.6 ; ADC0 burst mode enableAD0INT BIT ADC0CN.5 ; ADC0 conv. complete interrupt flagAD0BUSY BIT ADC0CN.4 ; ADC0 busy flagAD0WINT BIT ADC0CN.3 ; ADC0 window compare interrupt flagAD0LJST BIT ADC0CN.2 ; ADC0 left justify selectAD0CM1 BIT ADC0CN.1 ; ADC0 conversion mode select 1AD0CM0 BIT ADC0CN.0 ; ADC0 conversion mode select 0
; SPI0CN 0xF8SPIF BIT SPI0CN.7 ; SPI0 interrupt flagWCOL BIT SPI0CN.6 ; SPI0 write collision flagMODF BIT SPI0CN.5 ; SPI0 mode fault flagRXOVRN BIT SPI0CN.4 ; SPI0 RX overrun flagNSSMD1 BIT SPI0CN.3 ; SPI0 slave select mode 1NSSMD0 BIT SPI0CN.2 ; SPI0 slave select mode 0TXBMT BIT SPI0CN.1 ; SPI0 TX buffer empty flagSPIEN BIT SPI0CN.0 ; SPI0 SPI0 enable
;------------------------------------------------------------------------------; End Of File;------------------------------------------------------------------------------
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