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11 years ago
  1. ;**** **** **** **** ****
  2. ;
  3. ; BLHeli program for controlling brushless motors in helicopters and multirotors
  4. ;
  5. ; Copyright 2011, 2012 Steffen Skaug
  6. ; This program is distributed under the terms of the GNU General Public License
  7. ;
  8. ; This file is part of BLHeli.
  9. ;
  10. ; BLHeli is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; BLHeli is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
  22. ;
  23. ;**** **** **** **** ****
  24. ;
  25. ; YEP 7A hardware definition file
  26. ;
  27. ;**** **** **** **** ****
  28. ;*********************
  29. ; Device Atmega168PA
  30. ;*********************
  31. .INCLUDE "m168PAdef.inc"
  32. ;**** **** **** **** ****
  33. ; Fuses must be set to external oscillator = 16Mhz
  34. ;**** **** **** **** ****
  35. ;**** **** **** **** ****
  36. ; Constant definitions
  37. ;**** **** **** **** ****
  38. .ESEG ; EEprom segment
  39. .ORG 0x40
  40. Eep_ESC_Layout: .DB "#YEP_7A# " ; ESC layout tag
  41. .ORG 0x50
  42. Eep_ESC_MCU: .DB "#BLHELI#Am168PA#" ; Project and MCU tag (16 Bytes)
  43. .EQU CLK_8M = 0 ; Set to 0 for 16MHz clock, and 1 if 8MHz clock
  44. .EQU HIGH_BEC_VOLTAGE = 0 ; Set to 1 or more if high BEC voltage is supported
  45. .EQU DAMPED_MODE_ENABLE = 0 ; Set to 1 if fully damped mode is supported
  46. .EQU NFETON_DELAY = 65 ; Wait delay from pfets off to nfets on
  47. .EQU PFETON_DELAY = 1 ; Wait delay from nfets off to pfets on
  48. .EQU COMP_PWM_HIGH_ON_DELAY = 10 ; Wait delay from pwm on until comparator can be read (for high pwm frequency)
  49. .EQU COMP_PWM_HIGH_OFF_DELAY = 20 ; Wait delay from pwm off until comparator can be read (for high pwm frequency)
  50. .EQU COMP_PWM_LOW_ON_DELAY = 10 ; Wait delay from pwm on until comparator can be read (for low pwm frequency)
  51. .EQU COMP_PWM_LOW_OFF_DELAY = 20 ; Wait delay from pwm off until comparator can be read (for low pwm frequency)
  52. .EQU HIGH_DRIVER_PRECHG_TIME = 0 ; Time between commutations use to precharge the high side driver (for all nfet ESCs)
  53. .EQU ADC_LIMIT_L = 231 ; 2k/22k divider. Power supply measurement ADC value for which motor power is limited (low byte)
  54. .EQU ADC_LIMIT_H = 0 ; 2k/22k divider. Power supply measurement ADC value for which motor power is limited (2 MSBs)
  55. .EQU TEMP_LIMIT = 0 ; No temp sensor. Temperature measurement ADC value for which main motor power is limited
  56. .EQU TEMP_LIMIT_STEP = 0 ; No temp sensor. Temperature measurement ADC value increment for which main motor power is further limited
  57. ;**** **** **** **** ****
  58. ; ESC specific defaults
  59. ;**** **** **** **** ****
  60. .EQU DEFAULT_PGM_MAIN_SPOOLUP_TIME = 7 ; Main motor spoolup time
  61. .EQU DEFAULT_PGM_MAIN_STARTUP_PWR = 11 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  62. .EQU DEFAULT_PGM_TAIL_STARTUP_PWR = 11 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  63. .EQU DEFAULT_PGM_MULTI_STARTUP_PWR = 11 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  64. .EQU DEFAULT_PGM_MAIN_STARTUP_METHOD = 2 ; 1=Stepped 2=Direct
  65. .EQU DEFAULT_PGM_TAIL_STARTUP_METHOD = 2 ; 1=Stepped 2=Direct
  66. .EQU DEFAULT_PGM_MULTI_STARTUP_METHOD = 2 ; 1=Stepped 2=Direct
  67. ;*********************
  68. ; PORT D definitions *
  69. ;*********************
  70. ;.EQU = 7 ;i
  71. ;.EQU = 6 ;i
  72. ;.EQU = 5 ;i
  73. ;.EQU = 4 ;i
  74. ;.EQU = 3 ;i
  75. .EQU Rcp_In = 2 ;i
  76. ;.EQU = 1 ;i
  77. ;.EQU = 0 ;i
  78. .equ INIT_PD = 0x00
  79. .equ DIR_PD = 0x00
  80. .MACRO Get_Rcp_Capture_Values
  81. lds @0, TCNT1L
  82. lds @1, TCNT1H
  83. .ENDMACRO
  84. .MACRO Read_Rcp_Int
  85. in @0, PIND
  86. sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity negative?
  87. com @0 ; Yes - invert
  88. .ENDMACRO
  89. .MACRO Get_Rcp_Int_Enable_State
  90. in @0, EIMSK ; Get int0 enable state (giving 0 is off, anything else is on)
  91. andi @0, (1<<INT0)
  92. .ENDMACRO
  93. .MACRO Rcp_Int_Enable
  94. ldi @0, (1<<INT0) ; Enable int0
  95. out EIMSK, @0
  96. .ENDMACRO
  97. .MACRO Rcp_Int_Disable
  98. ldi @0, 0 ; Disable int0
  99. out EIMSK, @0
  100. .ENDMACRO
  101. .MACRO Rcp_Int_First
  102. sbrs Flags3, PGM_RCP_PWM_POL ; Is pwm polarity positive?
  103. ldi @0, (1<<ISC01)+(1<<ISC00); Yes - set next int0 to rising
  104. sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity negative?
  105. ldi @0, (1<<ISC01) ; Yes - set next int0 to falling
  106. sts EICRA, @0
  107. .ENDMACRO
  108. .MACRO Rcp_Int_Second
  109. sbrs Flags3, PGM_RCP_PWM_POL ; Is pwm polarity positive?
  110. ldi @0, (1<<ISC01) ; Yes - set next int0 to falling
  111. sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity negative?
  112. ldi @0, (1<<ISC01)+(1<<ISC00); Yes - set next int0 to rising
  113. sts EICRA, @0
  114. .ENDMACRO
  115. .MACRO Rcp_Clear_Int_Flag
  116. clr @0
  117. sbr @0, (1<<INTF0) ; Clear ext0int flag
  118. out EIFR, @0
  119. .ENDMACRO
  120. .MACRO T0_Int_Disable
  121. lds @0, TIMSK0 ; Disable timer0 interrupts
  122. cbr @0, (1<<TOIE0)
  123. sts TIMSK0, @0
  124. .ENDMACRO
  125. .MACRO T0_Int_Enable
  126. lds @0, TIMSK0 ; Enable timer0 interrupts
  127. sbr @0, (1<<TOIE0)
  128. sts TIMSK0, @0
  129. .ENDMACRO
  130. .MACRO T1oca_Clear_Int_Flag
  131. ldi @0, (1<<OCF1A) ; Clear oc1a flag
  132. out TIFR1, @0
  133. .ENDMACRO
  134. ;*********************
  135. ; PORT C definitions *
  136. ;*********************
  137. ;.EQU = 7 ; i
  138. ;.EQU = 6 ; i
  139. .EQU Mux_A = 5 ; i
  140. .EQU Mux_B = 4 ; i
  141. .EQU Mux_C = 3 ; i
  142. ;.EQU = 2 ; i
  143. ;.EQU = 1 ; i
  144. .EQU Volt_Ip = 0 ; i
  145. .equ INIT_PC = 0x00
  146. .equ DIR_PC = 0x00
  147. .MACRO AnFET_on
  148. tst Current_Pwm_Limited
  149. breq PC+5
  150. sbrs Flags3, PGM_DIR_REV
  151. sbi PORTB, AnFET
  152. sbrc Flags3, PGM_DIR_REV
  153. sbi PORTB, CnFET
  154. .ENDMACRO
  155. .MACRO AnFET_off
  156. sbrs Flags3, PGM_DIR_REV
  157. cbi PORTB, AnFET
  158. sbrc Flags3, PGM_DIR_REV
  159. cbi PORTB, CnFET
  160. .ENDMACRO
  161. .MACRO BnFET_on
  162. tst Current_Pwm_Limited
  163. breq PC+2
  164. sbi PORTB, BnFET
  165. .ENDMACRO
  166. .MACRO BnFET_off
  167. cbi PORTB, BnFET
  168. .ENDMACRO
  169. .MACRO CnFET_on
  170. tst Current_Pwm_Limited
  171. breq PC+5
  172. sbrs Flags3, PGM_DIR_REV
  173. sbi PORTB, CnFET
  174. sbrc Flags3, PGM_DIR_REV
  175. sbi PORTB, AnFET
  176. .ENDMACRO
  177. .MACRO CnFET_off
  178. sbrs Flags3, PGM_DIR_REV
  179. cbi PORTB, CnFET
  180. sbrc Flags3, PGM_DIR_REV
  181. cbi PORTB, AnFET
  182. .ENDMACRO
  183. .MACRO All_nFETs_Off
  184. cbi PORTB, AnFET
  185. cbi PORTB, BnFET
  186. cbi PORTB, CnFET
  187. .ENDMACRO
  188. .MACRO ApFET_on
  189. sbrs Flags3, PGM_DIR_REV
  190. sbi PORTB, ApFET
  191. sbrc Flags3, PGM_DIR_REV
  192. sbi PORTB, CpFET
  193. .ENDMACRO
  194. .MACRO ApFET_off
  195. sbrs Flags3, PGM_DIR_REV
  196. cbi PORTB, ApFET
  197. sbrc Flags3, PGM_DIR_REV
  198. cbi PORTB, CpFET
  199. .ENDMACRO
  200. .MACRO BpFET_on
  201. sbi PORTB, BpFET
  202. .ENDMACRO
  203. .MACRO BpFET_off
  204. cbi PORTB, BpFET
  205. .ENDMACRO
  206. .MACRO CpFET_on
  207. sbrs Flags3, PGM_DIR_REV
  208. sbi PORTB, CpFET
  209. sbrc Flags3, PGM_DIR_REV
  210. sbi PORTB, ApFET
  211. .ENDMACRO
  212. .MACRO CpFET_off
  213. sbrs Flags3, PGM_DIR_REV
  214. cbi PORTB, CpFET
  215. sbrc Flags3, PGM_DIR_REV
  216. cbi PORTB, ApFET
  217. .ENDMACRO
  218. .MACRO All_pFETs_On
  219. sbi PORTB, ApFET
  220. sbi PORTB, BpFET
  221. sbi PORTB, CpFET
  222. .ENDMACRO
  223. .MACRO All_pFETs_Off
  224. cbi PORTB, ApFET
  225. cbi PORTB, BpFET
  226. cbi PORTB, CpFET
  227. .ENDMACRO
  228. .MACRO Comp_Init
  229. lds @0, ADCSRB ; Set Analog Comparator Multiplexer Enable
  230. sbr @0, (1<<ACME)
  231. sts ADCSRB, @0
  232. .ENDMACRO
  233. .MACRO Set_Comp_Phase_A
  234. sbrs Flags3, PGM_DIR_REV
  235. ldi @0, Mux_A ; Set comparator multiplexer to phase A
  236. sbrc Flags3, PGM_DIR_REV
  237. ldi @0, Mux_C
  238. ori @0, (1<<REFS1)+(1<<REFS0)
  239. sts ADMUX, @0
  240. .ENDMACRO
  241. .MACRO Set_Comp_Phase_B
  242. ldi @0, Mux_B ; Set comparator multiplexer to phase B
  243. ori @0, (1<<REFS1)+(1<<REFS0)
  244. sts ADMUX, @0
  245. .ENDMACRO
  246. .MACRO Set_Comp_Phase_C
  247. sbrs Flags3, PGM_DIR_REV
  248. ldi @0, Mux_C ; Set comparator multiplexer to phase C
  249. sbrc Flags3, PGM_DIR_REV
  250. ldi @0, Mux_A
  251. ori @0, (1<<REFS1)+(1<<REFS0)
  252. sts ADMUX, @0
  253. .ENDMACRO
  254. .MACRO Read_Comp_Out
  255. in @0, ACSR ; Read comparator output
  256. .ENDMACRO
  257. ;*********************
  258. ; PORT B definitions *
  259. ;*********************
  260. ;.EQU = 7 ; i
  261. ;.EQU = 6 ; i
  262. .EQU CnFET = 5 ; o
  263. .EQU BnFET = 4 ; o
  264. .EQU AnFET = 3 ; o
  265. .EQU ApFET = 2 ; o
  266. .EQU CpFET = 1 ; o
  267. .EQU BpFET = 0 ; o
  268. .EQU INIT_PB = 0
  269. .EQU DIR_PB = (1<<AnFET)+(1<<BnFET)+(1<<CnFET)+(1<<ApFET)+(1<<BpFET)+(1<<CpFET)
  270. ;**********************
  271. ; MCU specific macros *
  272. ;**********************
  273. .MACRO Interrupt_Table_Definition
  274. jmp reset
  275. rjmp rcp_int ; ext_int0
  276. nop
  277. nop ; ext_int1
  278. nop
  279. nop ; pci0_int
  280. nop
  281. nop ; pci1_int
  282. nop
  283. nop ; pci2_int
  284. nop
  285. nop ; wdt_int
  286. nop
  287. nop ; t2oca_int
  288. nop
  289. nop ; t2ocb_int
  290. nop
  291. rjmp t2_int ; t2ovfl_int
  292. nop
  293. nop ; icp1_int
  294. nop
  295. rjmp t1oca_int ; t1oca_int
  296. nop
  297. nop ; t1ocb_int
  298. nop
  299. nop ; t1ovfl_int
  300. nop
  301. nop ; t0oca_int
  302. nop
  303. nop ; t0ocb_int
  304. nop
  305. rjmp t0_int ; t0ovfl_int
  306. nop
  307. nop ; spi_int
  308. nop
  309. nop ; urxc
  310. nop
  311. nop ; udre
  312. nop
  313. nop ; utxc
  314. nop
  315. ; nop ; adc_int
  316. ; nop ; eep_int
  317. ; nop ; aci_int
  318. ; nop ; wire2_int
  319. ; nop ; spmc_int
  320. .ENDMACRO
  321. .MACRO Disable_Watchdog
  322. cli ; Disable interrupts
  323. wdr ; Reset watchdog timer
  324. in @0, MCUSR ; Clear WDRF in MCUSR
  325. andi @0, (0xFF & (0<<WDRF))
  326. out MCUSR, @0
  327. lds @0, WDTCSR ; Write logical one to WDCE and WDE
  328. ori @0, (1<<WDCE) | (1<<WDE)
  329. sts WDTCSR, @0
  330. ldi @0, (0<<WDE) ; Turn off WDT
  331. sts WDTCSR, @0
  332. .ENDMACRO
  333. .MACRO Enable_Watchdog
  334. ldi @0, (1<<WDE) ; Turn on WDT
  335. sts WDTCSR, @0
  336. .ENDMACRO
  337. .MACRO Initialize_MCU
  338. .ENDMACRO
  339. .MACRO Initialize_Interrupts
  340. ldi @0, (1<<TOIE0)
  341. out TIFR0, @0 ; Clear interrupts
  342. sts TIMSK0, @0 ; Enable interrupts
  343. ldi @0, (1<<OCIE1A)
  344. out TIFR1, @0 ; Clear interrupts
  345. sts TIMSK1, @0 ; Enable interrupts
  346. ldi @0, (1<<TOIE2)
  347. out TIFR2, @0 ; Clear interrupts
  348. sts TIMSK2, @0 ; Enable interrupts
  349. .ENDMACRO
  350. .MACRO Initialize_Adc
  351. lds @0, ADCSRA ; Set ADCSRA register (1MHz clock)
  352. sbr @0, (1<<ADPS2)
  353. sts ADCSRA, @0
  354. .ENDMACRO
  355. .MACRO Set_Adc_Ip_Volt
  356. cbr Flags1, (1<<ADC_READ_TEMP)
  357. .ENDMACRO
  358. .MACRO Set_Adc_Ip_Temp
  359. sbr Flags1, (1<<ADC_READ_TEMP)
  360. .ENDMACRO
  361. .MACRO Start_Adc
  362. sbrs Flags1, ADC_READ_TEMP
  363. ldi @0, Volt_Ip
  364. sbrc Flags1, ADC_READ_TEMP
  365. ldi @0, Volt_Ip
  366. ori @0, (1<<REFS1)+(1<<REFS0)
  367. sts ADMUX, @0 ; Set ADMUX register (1.1V reference, selected input)
  368. lds @0, ADCSRA
  369. sbr @0, (1<<ADEN) ; Enable ADC
  370. sbr @0, (1<<ADSC) ; Start ADC conversion
  371. sts ADCSRA, @0
  372. .ENDMACRO
  373. .MACRO Get_Adc_Status
  374. lds @0, ADCSRA
  375. .ENDMACRO
  376. .MACRO Read_Adc_Result
  377. lds @0, ADCL
  378. lds @1, ADCH
  379. .ENDMACRO
  380. .MACRO Stop_Adc
  381. lds @0, ADCSRA
  382. cbr @0, (1<<ADEN) ; Disable ADC
  383. sts ADCSRA, @0
  384. .ENDMACRO
  385. .MACRO Set_Timer0_CS0
  386. out TCCR0B, @0
  387. .ENDMACRO
  388. .MACRO Set_Timer1_CS1
  389. sts TCCR1B, @0
  390. .ENDMACRO
  391. .MACRO Set_Timer2_CS2
  392. sts TCCR2B, @0
  393. .ENDMACRO
  394. .MACRO Read_TCNT1L
  395. lds @0, TCNT1L
  396. .ENDMACRO
  397. .MACRO Read_TCNT1H
  398. lds @0, TCNT1H
  399. .ENDMACRO
  400. .MACRO Set_OCR1AL
  401. sts OCR1AL, @0
  402. .ENDMACRO
  403. .MACRO Set_OCR1AH
  404. sts OCR1AH, @0
  405. .ENDMACRO
  406. .MACRO Read_TCNT2
  407. lds @0, TCNT2
  408. .ENDMACRO
  409. .MACRO Set_TCNT2
  410. sts TCNT2, @0
  411. .ENDMACRO
  412. .MACRO Check_Eeprom_Ready
  413. sbic EECR, EEPE
  414. .ENDMACRO
  415. .MACRO Set_Eeprom_Address
  416. out EEARL, @0
  417. out EEARH, @1
  418. .ENDMACRO
  419. .MACRO Start_Eeprom_Write
  420. sbi EECR, EEMPE
  421. sbi EECR, EEPE
  422. .ENDMACRO
  423. .MACRO Prepare_Lock_Or_Fuse_Read
  424. ldi @0, ((1<<BLBSET)+(1<<SELFPRGEN))
  425. out SPMCSR, @0
  426. .ENDMACRO
  427. .MACRO xcall
  428. call @0
  429. .ENDMACRO
  430. .MACRO Set_RPM_Out
  431. .ENDMACRO
  432. .MACRO Clear_RPM_Out
  433. .ENDMACRO