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  1. ;**** **** **** **** ****
  2. ;
  3. ; BLHeli program for controlling brushless motors in helicopters and multirotors
  4. ;
  5. ; Copyright 2011, 2012 Steffen Skaug
  6. ; This program is distributed under the terms of the GNU General Public License
  7. ;
  8. ; This file is part of BLHeli.
  9. ;
  10. ; BLHeli is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; BLHeli is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
  22. ;
  23. ;**** **** **** **** ****
  24. ;
  25. ; Multistar 20A hardware definition file
  26. ;
  27. ; Notes: None
  28. ;
  29. ;**** **** **** **** ****
  30. ;*********************
  31. ; Device Atmega8A
  32. ;*********************
  33. .INCLUDE "m8Adef.inc"
  34. ;**** **** **** **** ****
  35. ; Fuses must be set to external oscillator = 16Mhz
  36. ;**** **** **** **** ****
  37. ;**** **** **** **** ****
  38. ; Constant definitions
  39. ;**** **** **** **** ****
  40. .ESEG ; EEprom segment
  41. .ORG 0x40
  42. Eep_ESC_Layout: .DB "#MStar_20A# " ; ESC layout tag
  43. .ORG 0x50
  44. Eep_ESC_MCU: .DB "#BLHELI#Am8A# " ; Project and MCU tag (16 Bytes)
  45. .EQU CLK_8M = 0 ; Set to 0 for 16MHz clock, and 1 if 8MHz clock
  46. .EQU HIGH_BEC_VOLTAGE = 0 ; Set to 1 or more if high BEC voltage is supported
  47. .EQU DAMPED_MODE_ENABLE = 0 ; Set to 1 if fully damped mode is supported
  48. .EQU NFETON_DELAY = 30 ; Wait delay from pfets off to nfets on
  49. .EQU PFETON_DELAY = 5 ; Wait delay from nfets off to pfets on
  50. .EQU COMP_PWM_HIGH_ON_DELAY = 10 ; Wait delay from pwm on until comparator can be read (for high pwm frequency)
  51. .EQU COMP_PWM_HIGH_OFF_DELAY = 20 ; Wait delay from pwm off until comparator can be read (for high pwm frequency)
  52. .EQU COMP_PWM_LOW_ON_DELAY = 10 ; Wait delay from pwm on until comparator can be read (for low pwm frequency)
  53. .EQU COMP_PWM_LOW_OFF_DELAY = 20 ; Wait delay from pwm off until comparator can be read (for low pwm frequency)
  54. .EQU HIGH_DRIVER_PRECHG_TIME = 0 ; Time between commutations use to precharge the high side driver (for all nfet ESCs)
  55. .EQU ADC_LIMIT_L = 109 ; 4.7k/47k divider. Power supply measurement ADC value for which motor power is limited (low byte)
  56. .EQU ADC_LIMIT_H = 0 ; 4.7k/47k divider. Power supply measurement ADC value for which motor power is limited (2 MSBs)
  57. .EQU TEMP_LIMIT = 0 ; No sensor. Temperature measurement ADC value for which main motor power is limited
  58. .EQU TEMP_LIMIT_STEP = 0 ; No sensor. Temperature measurement ADC value increment for which main motor power is further limited
  59. ;**** **** **** **** ****
  60. ; ESC specific defaults
  61. ;**** **** **** **** ****
  62. .EQU DEFAULT_PGM_MAIN_SPOOLUP_TIME = 10 ; Main motor spoolup time
  63. .EQU DEFAULT_PGM_MAIN_STARTUP_PWR = 10 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  64. .EQU DEFAULT_PGM_TAIL_STARTUP_PWR = 10 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  65. .EQU DEFAULT_PGM_MULTI_STARTUP_PWR = 10 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  66. ;*********************
  67. ; PORT D definitions *
  68. ;*********************
  69. .EQU BpFET = 7 ;o
  70. ;.EQU = 6 ;i
  71. .EQU CpFET = 5 ;o
  72. .EQU ApFET = 4 ;o
  73. .EQU CnFET = 3 ;o
  74. .EQU Rcp_In = 2 ;i
  75. .EQU AnFET = 1 ;o
  76. .EQU BnFET = 0 ;o
  77. .equ INIT_PD = 0x00
  78. .equ DIR_PD = (1<<AnFET)+(1<<BnFET)+(1<<CnFET)+(1<<ApFET)+(1<<BpFET)+(1<<CpFET)
  79. .MACRO Get_Rcp_Capture_Values
  80. in @0, TCNT1L
  81. in @1, TCNT1H
  82. .ENDMACRO
  83. .MACRO Read_Rcp_Int
  84. in @0, PIND
  85. sbrs Flags3, PGM_RCP_PWM_POL ; Is pwm polarity positive?
  86. com @0 ; Yes - invert
  87. .ENDMACRO
  88. .MACRO Get_Rcp_Int_Enable_State
  89. in @0, GICR ; Get int0 enable state (giving 0 is off, anything else is on)
  90. andi @0, (1<<INT0)
  91. .ENDMACRO
  92. .MACRO Rcp_Int_Enable
  93. ldi @0, (1<<INT0) ; Enable int0
  94. out GICR, @0
  95. .ENDMACRO
  96. .MACRO Rcp_Int_Disable
  97. ldi @0, 0 ; Disable int0
  98. out GICR, @0
  99. .ENDMACRO
  100. .MACRO Rcp_Int_First
  101. sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity negative?
  102. ldi @0, (1<<ISC01)+(1<<ISC00); Yes - set next int0 to rising
  103. sbrs Flags3, PGM_RCP_PWM_POL ; Is pwm polarity positive?
  104. ldi @0, (1<<ISC01) ; Yes - set next int0 to falling
  105. out MCUCR, @0
  106. .ENDMACRO
  107. .MACRO Rcp_Int_Second
  108. sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity negative?
  109. ldi @0, (1<<ISC01) ; Yes - set next int0 to falling
  110. sbrs Flags3, PGM_RCP_PWM_POL ; Is pwm polarity positive?
  111. ldi @0, (1<<ISC01)+(1<<ISC00); Yes - set next int0 to rising
  112. out MCUCR, @0
  113. .ENDMACRO
  114. .MACRO Rcp_Clear_Int_Flag
  115. clr @0
  116. sbr @0, (1<<INTF0) ; Clear ext0int flag
  117. out GIFR, @0
  118. .ENDMACRO
  119. .MACRO T0_Int_Disable
  120. in @0, TIMSK ; Disable timer0 interrupts
  121. cbr @0, (1<<TOIE0)
  122. out TIMSK, @0
  123. .ENDMACRO
  124. .MACRO T0_Int_Enable
  125. in @0, TIMSK ; Enable timer0 interrupts
  126. sbr @0, (1<<TOIE0)
  127. out TIMSK, @0
  128. .ENDMACRO
  129. .MACRO T1oca_Clear_Int_Flag
  130. ldi @0, (1<<OCF1A) ; Clear oc1a flag
  131. out TIFR, @0
  132. .ENDMACRO
  133. ;*********************
  134. ; PORT C definitions *
  135. ;*********************
  136. .EQU Volt_Ip = 7 ; i
  137. ;.EQU = 6 ; i
  138. ;.EQU = 5 ; i
  139. .EQU Mux_C = 4 ; i
  140. .EQU Mux_B = 3 ; i
  141. .EQU Mux_A = 2 ; i
  142. ;.EQU = 1 ; i
  143. ;.EQU = 0 ; i
  144. .equ INIT_PC = 0x00
  145. .equ DIR_PC = 0x00
  146. .MACRO AnFET_on
  147. tst Current_Pwm_Limited
  148. breq PC+5
  149. sbrs Flags3, PGM_DIR_REV
  150. sbi PORTD, AnFET
  151. sbrc Flags3, PGM_DIR_REV
  152. sbi PORTD, CnFET
  153. .ENDMACRO
  154. .MACRO AnFET_off
  155. sbrs Flags3, PGM_DIR_REV
  156. cbi PORTD, AnFET
  157. sbrc Flags3, PGM_DIR_REV
  158. cbi PORTD, CnFET
  159. .ENDMACRO
  160. .MACRO BnFET_on
  161. tst Current_Pwm_Limited
  162. breq PC+2
  163. sbi PORTD, BnFET
  164. .ENDMACRO
  165. .MACRO BnFET_off
  166. cbi PORTD, BnFET
  167. .ENDMACRO
  168. .MACRO CnFET_on
  169. tst Current_Pwm_Limited
  170. breq PC+5
  171. sbrs Flags3, PGM_DIR_REV
  172. sbi PORTD, CnFET
  173. sbrc Flags3, PGM_DIR_REV
  174. sbi PORTD, AnFET
  175. .ENDMACRO
  176. .MACRO CnFET_off
  177. sbrs Flags3, PGM_DIR_REV
  178. cbi PORTD, CnFET
  179. sbrc Flags3, PGM_DIR_REV
  180. cbi PORTD, AnFET
  181. .ENDMACRO
  182. .MACRO All_nFETs_Off
  183. cbi PORTD, AnFET
  184. cbi PORTD, BnFET
  185. cbi PORTD, CnFET
  186. .ENDMACRO
  187. .MACRO ApFET_on
  188. sbrs Flags3, PGM_DIR_REV
  189. sbi PORTD, ApFET
  190. sbrc Flags3, PGM_DIR_REV
  191. sbi PORTD, CpFET
  192. .ENDMACRO
  193. .MACRO ApFET_off
  194. sbrs Flags3, PGM_DIR_REV
  195. cbi PORTD, ApFET
  196. sbrc Flags3, PGM_DIR_REV
  197. cbi PORTD, CpFET
  198. .ENDMACRO
  199. .MACRO BpFET_on
  200. sbi PORTD, BpFET
  201. .ENDMACRO
  202. .MACRO BpFET_off
  203. cbi PORTD, BpFET
  204. .ENDMACRO
  205. .MACRO CpFET_on
  206. sbrs Flags3, PGM_DIR_REV
  207. sbi PORTD, CpFET
  208. sbrc Flags3, PGM_DIR_REV
  209. sbi PORTD, ApFET
  210. .ENDMACRO
  211. .MACRO CpFET_off
  212. sbrs Flags3, PGM_DIR_REV
  213. cbi PORTD, CpFET
  214. sbrc Flags3, PGM_DIR_REV
  215. cbi PORTD, ApFET
  216. .ENDMACRO
  217. .MACRO All_pFETs_On
  218. sbi PORTD, ApFET
  219. sbi PORTD, BpFET
  220. sbi PORTD, CpFET
  221. .ENDMACRO
  222. .MACRO All_pFETs_Off
  223. cbi PORTD, ApFET
  224. cbi PORTD, BpFET
  225. cbi PORTD, CpFET
  226. .ENDMACRO
  227. .MACRO Comp_Init
  228. in @0, SFIOR ; Set Analog Comparator Multiplexer Enable
  229. sbr @0, (1<<ACME)
  230. out SFIOR, @0
  231. .ENDMACRO
  232. .MACRO Set_Comp_Phase_A
  233. sbrs Flags3, PGM_DIR_REV
  234. ldi @0, Mux_A ; Set comparator multiplexer to phase A
  235. sbrc Flags3, PGM_DIR_REV
  236. ldi @0, Mux_C
  237. sbr @0, (1<<REFS1)
  238. sbr @0, (1<<REFS0)
  239. out ADMUX, @0
  240. .ENDMACRO
  241. .MACRO Set_Comp_Phase_B
  242. ldi @0, Mux_B ; Set comparator multiplexer to phase B
  243. sbr @0, (1<<REFS1)
  244. sbr @0, (1<<REFS0)
  245. out ADMUX, @0
  246. .ENDMACRO
  247. .MACRO Set_Comp_Phase_C
  248. sbrs Flags3, PGM_DIR_REV
  249. ldi @0, Mux_C ; Set comparator multiplexer to phase C
  250. sbrc Flags3, PGM_DIR_REV
  251. ldi @0, Mux_A
  252. sbr @0, (1<<REFS1)
  253. sbr @0, (1<<REFS0)
  254. out ADMUX, @0
  255. .ENDMACRO
  256. .MACRO Read_Comp_Out
  257. in @0, ACSR ; Read comparator output
  258. .ENDMACRO
  259. ;*********************
  260. ; PORT B definitions *
  261. ;*********************
  262. ;.EQU = 7 ; i
  263. ;.EQU = 6 ; i
  264. ;.EQU = 5 ; i
  265. .EQU DebugPin = 4 ; o
  266. ;.EQU = 3 ; i
  267. ;.EQU = 2 ; i
  268. ;.EQU = 1 ; i
  269. ;.EQU = 0 ; i
  270. .EQU INIT_PB = 0x00
  271. .EQU DIR_PB = (1<<DebugPin)
  272. ;**********************
  273. ; MCU specific macros *
  274. ;**********************
  275. .MACRO Interrupt_Table_Definition
  276. rjmp reset
  277. rjmp rcp_int ; ext_int0
  278. nop ; ext_int1
  279. nop ; t2oc_int
  280. rjmp t2_int ; t2ovfl_int
  281. nop ; icp1_int
  282. rjmp t1oca_int ; t1oca_int
  283. nop ; t1ocb_int
  284. nop ; t1ovfl_int
  285. rjmp t0_int ; t0ovfl_int
  286. nop ; spi_int
  287. nop ; urxc
  288. nop ; udre
  289. nop ; utxc
  290. ; nop ; adc_int
  291. ; nop ; eep_int
  292. ; nop ; aci_int
  293. ; nop ; wire2_int
  294. ; nop ; spmc_int
  295. .ENDMACRO
  296. .MACRO Disable_Watchdog
  297. cli ; Disable interrupts
  298. wdr ; Reset watchdog timer
  299. in @0, WDTCR ; Write logical one to WDCE and WDE
  300. ori @0, (1<<WDCE)|(1<<WDE)
  301. out WDTCR, @0
  302. ldi @0, (0<<WDE) ; Turn off WDT
  303. out WDTCR, @0
  304. .ENDMACRO
  305. .MACRO Enable_Watchdog
  306. ldi @0, (1<<WDE) ; Turn on WDT
  307. out WDTCR, @0
  308. .ENDMACRO
  309. .MACRO Initialize_MCU
  310. .ENDMACRO
  311. .MACRO Initialize_Interrupts
  312. ldi @0, (1<<TOIE0)+(1<<OCIE1A)+(1<<TOIE2)
  313. out TIFR, @0 ; Clear interrupts
  314. out TIMSK, @0 ; Enable interrupts
  315. .ENDMACRO
  316. .MACRO Initialize_Adc
  317. in @0, ADCSRA ; Set ADCSRA register (1MHz clock)
  318. sbr @0, (1<<ADPS2)
  319. out ADCSRA, @0
  320. .ENDMACRO
  321. .MACRO Set_Adc_Ip_Volt
  322. cbr Flags1, (1<<ADC_READ_TEMP)
  323. .ENDMACRO
  324. .MACRO Set_Adc_Ip_Temp
  325. sbr Flags1, (1<<ADC_READ_TEMP)
  326. .ENDMACRO
  327. .MACRO Start_Adc
  328. sbrs Flags1, ADC_READ_TEMP
  329. ldi @0, Volt_Ip
  330. sbrc Flags1, ADC_READ_TEMP
  331. ldi @0, Volt_Ip ; No temp sensor
  332. sbr @0, (1<<REFS1)
  333. sbr @0, (1<<REFS0)
  334. out ADMUX, @0 ; Set ADMUX register (2.56V reference, selected input)
  335. in @0, ADCSRA
  336. sbr @0, (1<<ADEN) ; Enable ADC
  337. sbr @0, (1<<ADSC) ; Start ADC conversion
  338. out ADCSRA, @0
  339. .ENDMACRO
  340. .MACRO Get_Adc_Status
  341. in @0, ADCSRA
  342. .ENDMACRO
  343. .MACRO Read_Adc_Result
  344. in @0, ADCL
  345. in @1, ADCH
  346. .ENDMACRO
  347. .MACRO Stop_Adc
  348. in @0, ADCSRA
  349. cbr @0, (1<<ADEN) ; Disable ADC
  350. out ADCSRA, @0
  351. .ENDMACRO
  352. .MACRO Set_Timer0_CS0
  353. out TCCR0, @0
  354. .ENDMACRO
  355. .MACRO Set_Timer1_CS1
  356. out TCCR1B, @0
  357. .ENDMACRO
  358. .MACRO Set_Timer2_CS2
  359. out TCCR2, @0
  360. .ENDMACRO
  361. .MACRO Read_TCNT1L
  362. in @0, TCNT1L
  363. .ENDMACRO
  364. .MACRO Read_TCNT1H
  365. in @0, TCNT1H
  366. .ENDMACRO
  367. .MACRO Set_OCR1AL
  368. out OCR1AL, @0
  369. .ENDMACRO
  370. .MACRO Set_OCR1AH
  371. out OCR1AH, @0
  372. .ENDMACRO
  373. .MACRO Read_TCNT2
  374. in @0, TCNT2
  375. .ENDMACRO
  376. .MACRO Set_TCNT2
  377. out TCNT2, @0
  378. .ENDMACRO
  379. .MACRO Check_Eeprom_Ready
  380. sbic EECR, EEWE
  381. .ENDMACRO
  382. .MACRO Set_Eeprom_Address
  383. out EEARL, @0
  384. out EEARH, @1
  385. .ENDMACRO
  386. .MACRO Start_Eeprom_Write
  387. sbi EECR, EEMWE
  388. sbi EECR, EEWE
  389. .ENDMACRO
  390. .MACRO Prepare_Lock_Or_Fuse_Read
  391. ldi @0, ((1<<BLBSET)+(1<<SPMEN))
  392. out SPMCR, @0
  393. .ENDMACRO
  394. .MACRO xcall
  395. rcall @0
  396. .ENDMACRO
  397. .MACRO Set_RPM_Out
  398. .ENDMACRO
  399. .MACRO Clear_RPM_Out
  400. .ENDMACRO