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  1. ;**** **** **** **** ****
  2. ;
  3. ; BLHeli program for controlling brushless motors in helicopters and multirotors
  4. ;
  5. ; Copyright 2011, 2012 Steffen Skaug
  6. ; This program is distributed under the terms of the GNU General Public License
  7. ;
  8. ; This file is part of BLHeli.
  9. ;
  10. ; BLHeli is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; BLHeli is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
  22. ;
  23. ;**** **** **** **** ****
  24. ;
  25. ; HiModel Cool 33A hardware definition file
  26. ;
  27. ;**** **** **** **** ****
  28. ;*********************
  29. ; Device SiLabs F330
  30. ;*********************
  31. $include (c8051f330.inc)
  32. ;**** **** **** **** ****
  33. ; Uses internal calibrated oscillator set to 24Mhz
  34. ;**** **** **** **** ****
  35. ;**** **** **** **** ****
  36. ; Constant definitions
  37. ;**** **** **** **** ****
  38. CSEG AT 1A40h
  39. Eep_ESC_Layout: DB "#HiModelCool33A#" ; ESC layout tag
  40. CSEG AT 1A50h
  41. Eep_ESC_MCU: DB "#BLHELI#F330# " ; Project and MCU tag (16 Bytes)
  42. ONE_S_CAPABLE EQU 0 ; Set to 1 if ESC can operate at 1S
  43. PORT3_EXIST EQU 0 ; Set to 1 if MCU has port3
  44. COMP1_USED EQU 0 ; Set to 1 if MCU has comparator 1 and it is being used
  45. DUAL_BEC_VOLTAGE EQU 0 ; Set to 1 if dual BEC voltage is supported
  46. DAMPED_MODE_ENABLE EQU 0 ; Damped mode disabled
  47. NFETON_DELAY EQU 40 ; Wait delay from pfets off to nfets on
  48. PFETON_DELAY EQU 1 ; Wait delay from nfets off to pfets on
  49. COMP_PWM_HIGH_ON_DELAY EQU 60 ; Wait delay from pwm on until comparator can be read (for high pwm frequency)
  50. COMP_PWM_HIGH_OFF_DELAY EQU 40 ; Wait delay from pwm off until comparator can be read (for high pwm frequency)
  51. COMP_PWM_LOW_ON_DELAY EQU 20 ; Wait delay from pwm on until comparator can be read (for low pwm frequency)
  52. COMP_PWM_LOW_OFF_DELAY EQU 13 ; Wait delay from pwm off until comparator can be read (for low pwm frequency)
  53. ADC_LIMIT_L EQU 133 ; Power supply measurement ADC value for which main motor power is limited (low byte)
  54. ADC_LIMIT_H EQU 0 ; Power supply measurement ADC value for which main motor power is limited (2 MSBs)
  55. TEMP_LIMIT EQU 109 ; Temperature measurement ADC value for which main motor power is limited (low byte, assuming high byte is 1)
  56. TEMP_LIMIT_STEP EQU 4 ; Temperature measurement ADC value increment for which main motor power is further limited
  57. MAIN_SPOOLUP_TIME EQU 10 ; Main motor spoolup time
  58. ;**** **** **** **** ****
  59. ; ESC specific defaults
  60. ;**** **** **** **** ****
  61. DEFAULT_PGM_MAIN_STARTUP_PWR EQU 9 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  62. DEFAULT_PGM_TAIL_STARTUP_PWR EQU 9 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  63. DEFAULT_PGM_MULTI_STARTUP_PWR EQU 9 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  64. DEFAULT_PGM_MAIN_STARTUP_METHOD EQU 2 ; 1=Stepped 2=Direct
  65. DEFAULT_PGM_TAIL_STARTUP_METHOD EQU 2 ; 1=Stepped 2=Direct
  66. DEFAULT_PGM_MULTI_STARTUP_METHOD EQU 2 ; 1=Stepped 2=Direct
  67. ;*********************
  68. ; PORT 0 definitions *
  69. ;*********************
  70. ; EQU 7 ;i
  71. ; EQU 6 ;i
  72. Mux_A EQU 5 ;i
  73. Rcp_In EQU 4 ;i
  74. ; EQU 3 ;i
  75. ; EQU 2 ;i
  76. Mux_C EQU 1 ;i
  77. Comp_Com EQU 0 ;i
  78. P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_C)+(1 SHL Comp_Com))
  79. P0_INIT EQU 0FFh
  80. P0_PUSHPULL EQU 0
  81. P0_SKIP EQU NOT(1 SHL Rcp_In) AND 0FFh
  82. MACRO Get_Rcp_Capture_Values
  83. mov Temp1, PCA0CPL0 ; Get PCA capture values
  84. mov Temp2, PCA0CPH0
  85. ENDM
  86. MACRO Read_Rcp_Int
  87. mov A, P0
  88. jnb Flags3.PGM_RCP_PWM_POL, ($+4) ; Is pwm polarity negative?
  89. cpl A ; Yes - invert
  90. ENDM
  91. MACRO Rcp_Int_Enable
  92. orl PCA0CPM0, #01h ; Interrupt enabled
  93. ENDM
  94. MACRO Rcp_Int_Disable
  95. anl PCA0CPM0, #0FEh ; Interrupt disabled
  96. ENDM
  97. MACRO Rcp_Int_First
  98. anl PCA0CPM0, #0CFh
  99. jb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity positive?
  100. orl PCA0CPM0, #20h ; Capture rising edge
  101. jnb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity negative?
  102. orl PCA0CPM0, #10h ; Capture falling edge
  103. ENDM
  104. MACRO Rcp_Int_Second
  105. anl PCA0CPM0, #0CFh
  106. jb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity positive?
  107. orl PCA0CPM0, #10h ; Capture falling edge
  108. jnb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity negative?
  109. orl PCA0CPM0, #20h ; Capture rising edge
  110. ENDM
  111. MACRO Rcp_Clear_Int_Flag
  112. clr CCF0 ; Clear interrupt flag
  113. ENDM
  114. ;*********************
  115. ; PORT 1 definitions *
  116. ;*********************
  117. Mux_B EQU 7 ;i
  118. Adc_Ip EQU 6 ;i
  119. ApFET EQU 5 ;o
  120. AnFET EQU 4 ;o
  121. BpFET EQU 3 ;o
  122. BnFET EQU 2 ;o
  123. CpFET EQU 1 ;o
  124. CnFET EQU 0 ;o
  125. P1_DIGITAL EQU (1 SHL AnFET)+(1 SHL BnFET)+(1 SHL CnFET)+(1 SHL ApFET)+(1 SHL BpFET)+(1 SHL CpFET)
  126. P1_INIT EQU 0C0h
  127. P1_PUSHPULL EQU (1 SHL AnFET)+(1 SHL BnFET)+(1 SHL CnFET)+(1 SHL ApFET)+(1 SHL BpFET)+(1 SHL CpFET)
  128. P1_SKIP EQU (1 SHL Mux_B)+(1 SHL Adc_Ip)
  129. MACRO AnFET_on
  130. mov A, Current_Pwm_Limited
  131. jz ($+12)
  132. jb Flags3.PGM_DIR_REV, ($+5)
  133. setb P1.AnFET
  134. jnb Flags3.PGM_DIR_REV, ($+5)
  135. setb P1.CnFET
  136. ENDM
  137. MACRO AnFET_off
  138. jb Flags3.PGM_DIR_REV, ($+5)
  139. clr P1.AnFET
  140. jnb Flags3.PGM_DIR_REV, ($+5)
  141. clr P1.CnFET
  142. ENDM
  143. MACRO BnFET_on
  144. mov A, Current_Pwm_Limited
  145. jz ($+4)
  146. setb P1.BnFET
  147. ENDM
  148. MACRO BnFET_off
  149. clr P1.BnFET
  150. ENDM
  151. MACRO CnFET_on
  152. mov A, Current_Pwm_Limited
  153. jz ($+12)
  154. jb Flags3.PGM_DIR_REV, ($+5)
  155. setb P1.CnFET
  156. jnb Flags3.PGM_DIR_REV, ($+5)
  157. setb P1.AnFET
  158. ENDM
  159. MACRO CnFET_off
  160. jb Flags3.PGM_DIR_REV, ($+5)
  161. clr P1.CnFET
  162. jnb Flags3.PGM_DIR_REV, ($+5)
  163. clr P1.AnFET
  164. ENDM
  165. MACRO All_nFETs_Off
  166. clr P1.AnFET
  167. clr P1.BnFET
  168. clr P1.CnFET
  169. ENDM
  170. MACRO ApFET_on
  171. jb Flags3.PGM_DIR_REV, ($+5)
  172. setb P1.ApFET
  173. jnb Flags3.PGM_DIR_REV, ($+5)
  174. setb P1.CpFET
  175. ENDM
  176. MACRO ApFET_off
  177. jb Flags3.PGM_DIR_REV, ($+5)
  178. clr P1.ApFET
  179. jnb Flags3.PGM_DIR_REV, ($+5)
  180. clr P1.CpFET
  181. ENDM
  182. MACRO BpFET_on
  183. setb P1.BpFET
  184. ENDM
  185. MACRO BpFET_off
  186. clr P1.BpFET
  187. ENDM
  188. MACRO CpFET_on
  189. jb Flags3.PGM_DIR_REV, ($+5)
  190. setb P1.CpFET
  191. jnb Flags3.PGM_DIR_REV, ($+5)
  192. setb P1.ApFET
  193. ENDM
  194. MACRO CpFET_off
  195. jb Flags3.PGM_DIR_REV, ($+5)
  196. clr P1.CpFET
  197. jnb Flags3.PGM_DIR_REV, ($+5)
  198. clr P1.ApFET
  199. ENDM
  200. MACRO All_pFETs_Off
  201. clr P1.ApFET
  202. clr P1.BpFET
  203. clr P1.CpFET
  204. ENDM
  205. MACRO All_pFETs_On
  206. setb P1.ApFET
  207. setb P1.BpFET
  208. setb P1.CpFET
  209. ENDM
  210. MACRO Set_Comp_Phase_A
  211. jb Flags3.PGM_DIR_REV, ($+6)
  212. mov CPT0MX, #20h ; Set comparator multiplexer to phase A
  213. jnb Flags3.PGM_DIR_REV, ($+6)
  214. mov CPT0MX, #00h
  215. ENDM
  216. MACRO Set_Comp_Phase_B
  217. mov CPT0MX, #70h ; Set comparator multiplexer to phase B
  218. ENDM
  219. MACRO Set_Comp_Phase_C
  220. jb Flags3.PGM_DIR_REV, ($+6)
  221. mov CPT0MX, #00h ; Set comparator multiplexer to phase C
  222. jnb Flags3.PGM_DIR_REV, ($+6)
  223. mov CPT0MX, #20h
  224. ENDM
  225. MACRO Read_Comp_Out
  226. mov A, CPT0CN ; Read comparator output
  227. cpl A ; Invert output
  228. ENDM
  229. ;*********************
  230. ; PORT 2 definitions *
  231. ;*********************
  232. DebugPin EQU 0 ;o
  233. P2_PUSHPULL EQU (1 SHL DebugPin)
  234. ;**********************
  235. ; MCU specific macros *
  236. ;**********************
  237. MACRO Interrupt_Table_Definition
  238. CSEG AT 0 ; Code segment start
  239. jmp reset
  240. CSEG AT 0Bh ; Timer0 interrupt
  241. jmp t0_int
  242. CSEG AT 2Bh ; Timer2 interrupt
  243. jmp t2_int
  244. CSEG AT 5Bh ; PCA interrupt
  245. jmp pca_int
  246. CSEG AT 73h ; Timer3 interrupt
  247. jmp t3_int
  248. ENDM
  249. MACRO Initialize_Xbar
  250. mov XBR1, #41h ; Xbar enabled, CEX0 routed to pin Rcp_In
  251. ENDM
  252. MACRO Initialize_Adc
  253. mov REF0CN, #0Eh ; Set vdd (3.3V) as reference. Enable temp sensor and bias
  254. mov ADC0CF, #58h ; ADC clock 2MHz
  255. mov AMX0P, #(8+Adc_Ip) ; Select positive input
  256. mov AMX0N, #11h ; Select negative input as ground
  257. mov ADC0CN, #80h ; ADC enabled
  258. ENDM
  259. MACRO Set_Adc_Ip_Volt
  260. mov AMX0P, #(8+Adc_Ip) ; Select positive input
  261. ENDM
  262. MACRO Set_Adc_Ip_Temp
  263. mov AMX0P, #10h ; Select temp sensor input
  264. ENDM
  265. MACRO Start_Adc
  266. mov ADC0CN, #90h ; ADC start
  267. ENDM
  268. MACRO Get_Adc_Status
  269. mov A, ADC0CN
  270. ENDM
  271. MACRO Read_Adc_Result
  272. mov Temp1, ADC0L
  273. mov Temp2, ADC0H
  274. ENDM
  275. MACRO Stop_Adc
  276. ENDM