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  1. ;**** **** **** **** ****
  2. ;
  3. ; BLHeli program for controlling brushless motors in helicopters and multirotors
  4. ;
  5. ; Copyright 2011, 2012 Steffen Skaug
  6. ; This program is distributed under the terms of the GNU General Public License
  7. ;
  8. ; This file is part of BLHeli.
  9. ;
  10. ; BLHeli is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; BLHeli is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
  22. ;
  23. ;**** **** **** **** ****
  24. ;
  25. ; BLHeliTxPgm SiLabs
  26. ;
  27. ; EEPROM is not available in SiLabs MCUs
  28. ; Therefore a segment of the flash is used as "EEPROM"
  29. ;
  30. ;**** **** **** **** ****
  31. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  32. ;
  33. ; Read all eeprom perameters routine
  34. ;
  35. ; No assumptions
  36. ;
  37. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  38. read_all_eeprom_parameters:
  39. ; Check initialized signature
  40. mov DPTR, #Eep_Initialized_L
  41. mov Temp1, #Bit_Access
  42. call read_eeprom_byte
  43. mov A, Bit_Access
  44. IF MODE == 0
  45. cjne A, #0A5h, read_eeprom_store_defaults
  46. ENDIF
  47. IF MODE == 1
  48. cjne A, #05Ah, read_eeprom_store_defaults
  49. ENDIF
  50. IF MODE == 2
  51. cjne A, #055h, read_eeprom_store_defaults
  52. ENDIF
  53. inc DPTR ; Now Eep_Initialized_H
  54. call read_eeprom_byte
  55. mov A, Bit_Access
  56. IF MODE == 0
  57. cjne A, #05Ah, read_eeprom_store_defaults
  58. ENDIF
  59. IF MODE == 1
  60. cjne A, #0A5h, read_eeprom_store_defaults
  61. ENDIF
  62. IF MODE == 2
  63. cjne A, #0AAh, read_eeprom_store_defaults
  64. ENDIF
  65. jmp read_eeprom_read
  66. read_eeprom_store_defaults:
  67. call set_default_parameters
  68. call erase_and_store_all_in_eeprom
  69. jmp read_eeprom_exit
  70. read_eeprom_read:
  71. ; Read eeprom
  72. IF MODE == 0
  73. mov DPTR, #Eep_Pgm_Gov_P_Gain
  74. mov Temp1, #Pgm_Gov_P_Gain
  75. call read_eeprom_byte
  76. inc DPTR ; Now Eep_Pgm_Gov_I_Gain
  77. inc Temp1 ; Now Pgm_Gov_I_Gain
  78. call read_eeprom_byte
  79. inc DPTR ; Now Eep_Pgm_Gov_Mode
  80. inc Temp1 ; Now Pgm_Gov_Mode
  81. call read_eeprom_byte
  82. inc DPTR ; Now Eep_Pgm_Low_Voltage_Lim
  83. inc Temp1 ; Now Pgm_Low_Voltage_Lim
  84. call read_eeprom_byte
  85. inc DPTR ; Motor_Gain
  86. inc Temp1
  87. inc DPTR ; Motor_Idle
  88. inc Temp1
  89. ENDIF
  90. IF MODE == 1
  91. mov Temp1, #Pgm_Gov_Mode
  92. mov @Temp1, #4
  93. mov DPTR, #Eep_Pgm_Motor_Gain
  94. mov Temp1, #Pgm_Motor_Gain
  95. call read_eeprom_byte
  96. inc DPTR ; Now Eep_Pgm_Motor_Idle
  97. inc Temp1 ; Now Pgm_Motor_Idle
  98. call read_eeprom_byte
  99. ENDIF
  100. IF MODE == 2
  101. mov DPTR, #Eep_Pgm_Gov_P_Gain
  102. mov Temp1, #Pgm_Gov_P_Gain
  103. call read_eeprom_byte
  104. inc DPTR ; Now Eep_Pgm_Gov_I_Gain
  105. inc Temp1 ; Now Pgm_Gov_I_Gain
  106. call read_eeprom_byte
  107. inc DPTR ; Now Eep_Pgm_Gov_Mode
  108. inc Temp1 ; Now Pgm_Gov_Mode
  109. call read_eeprom_byte
  110. mov DPTR, #Eep_Pgm_Low_Voltage_Lim
  111. mov Temp1, #Pgm_Low_Voltage_Lim
  112. call read_eeprom_byte
  113. inc DPTR ; Now Eep_Pgm_Motor_Gain
  114. inc Temp1 ; Now Pgm_Motor_Gain
  115. call read_eeprom_byte
  116. inc DPTR ; Motor_Idle
  117. inc Temp1
  118. ENDIF
  119. inc DPTR ; Now Eep_Pgm_Startup_Pwr
  120. inc Temp1 ; Now Pgm_Startup_Pwr
  121. call read_eeprom_byte
  122. inc DPTR ; Now Eep_Pgm_Pwm_Freq
  123. inc Temp1 ; Now Pgm_Pwm_Freq
  124. call read_eeprom_byte
  125. inc DPTR ; Now Eep_Pgm_Direction_Rev
  126. inc Temp1 ; Now Pgm_Direction_Rev
  127. call read_eeprom_byte
  128. inc DPTR ; Now Eep_Pgm_Input_Pol
  129. inc Temp1 ; Now Pgm_Input_Pol
  130. call read_eeprom_byte
  131. inc DPTR ; Initialized_L
  132. inc Temp1
  133. inc DPTR ; Initialized_H
  134. inc Temp1
  135. inc DPTR ; Now Eep_Enable_TX_Program
  136. inc Temp1 ; Now Pgm_Enable_TX_Program
  137. call read_eeprom_byte
  138. IF MODE == 0
  139. inc DPTR ; Now Eep_Main_Rearm_Start
  140. inc Temp1 ; Now Pgm_Main_Rearm_Start
  141. call read_eeprom_byte
  142. inc DPTR ; Now Eep_Pgm_Gov_Setup_Target
  143. inc Temp1 ; Now Pgm_Gov_Setup_Target
  144. call read_eeprom_byte
  145. ENDIF
  146. IF MODE == 1
  147. inc DPTR ; Main_Rearm_Start
  148. inc Temp1
  149. inc DPTR ; Gov_Setup_Target
  150. inc Temp1
  151. ENDIF
  152. IF MODE == 2
  153. inc DPTR ; Main_Rearm_Start
  154. inc Temp1
  155. inc DPTR ; Gov_Setup_Target
  156. inc Temp1
  157. call read_eeprom_byte
  158. ENDIF
  159. inc DPTR ; Now Eep_Pgm_Startup_Rpm
  160. inc Temp1 ; Now Pgm_Startup_Rpm
  161. call read_eeprom_byte
  162. inc DPTR ; Now Eep_Pgm_Startup_Accel
  163. inc Temp1 ; Now Pgm_Startup_Accel
  164. call read_eeprom_byte
  165. inc DPTR ; Volt_Comp
  166. inc Temp1
  167. inc DPTR ; Now Eep_Pgm_Comm_Timing
  168. inc Temp1 ; Now Pgm_Comm_Timing
  169. call read_eeprom_byte
  170. inc DPTR ; Now Eep_Pgm_Damping_Force
  171. inc Temp1 ; Now Pgm_Damping_Force
  172. call read_eeprom_byte
  173. IF MODE == 0
  174. inc DPTR ; Now Eep_Pgm_Gov_Range
  175. inc Temp1 ; Now Pgm_Gov_Range
  176. call read_eeprom_byte
  177. ENDIF
  178. IF MODE >= 1
  179. inc DPTR ; Gov_Range
  180. inc Temp1
  181. ENDIF
  182. inc DPTR ; Now Eep_Pgm_Startup_Method
  183. inc Temp1 ; Now Pgm_Startup_Method
  184. call read_eeprom_byte
  185. inc DPTR ; Now Eep_Pgm_Ppm_Min_Throttle
  186. inc Temp1 ; Now Pgm_Ppm_Min_Throttle
  187. call read_eeprom_byte
  188. inc DPTR ; Now Eep_Pgm_Ppm_Max_Throttle
  189. inc Temp1 ; Now Pgm_Ppm_Max_Throttle
  190. call read_eeprom_byte
  191. inc DPTR ; Now Eep_Pgm_Beep_Strength
  192. inc Temp1 ; Now Pgm_Beep_Strength
  193. call read_eeprom_byte
  194. inc DPTR ; Now Eep_Pgm_Beacon_Strength
  195. inc Temp1 ; Now Pgm_Beacon_Strength
  196. call read_eeprom_byte
  197. inc DPTR ; Now Eep_Pgm_Beacon_Delay
  198. inc Temp1 ; Now Pgm_Beacon_Delay
  199. call read_eeprom_byte
  200. inc DPTR ; Now Eep_Pgm_Throttle_Rate
  201. inc Temp1 ; Now Pgm_Throttle_Rate
  202. call read_eeprom_byte
  203. inc DPTR ; Now Eep_Pgm_Demag_Comp
  204. inc Temp1 ; Now Pgm_Demag_Comp
  205. call read_eeprom_byte
  206. inc DPTR ; Now Eep_Pgm_BEC_Voltage_High
  207. inc Temp1 ; Now Pgm_BEC_Voltage_High
  208. call read_eeprom_byte
  209. mov DPTR, #Eep_Dummy ; Set pointer to uncritical area
  210. read_eeprom_exit:
  211. ret
  212. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  213. ;
  214. ; Erase flash and store all parameter value in EEPROM routine
  215. ;
  216. ; No assumptions
  217. ;
  218. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  219. erase_and_store_all_in_eeprom:
  220. clr EA ; Disable interrupts
  221. call read_tags
  222. call erase_flash ; Erase flash
  223. mov DPTR, #Eep_FW_Main_Revision ; Store firmware main revision
  224. mov A, #EEPROM_FW_MAIN_REVISION
  225. call write_eeprom_byte_from_acc
  226. inc DPTR ; Now firmware sub revision
  227. mov A, #EEPROM_FW_SUB_REVISION
  228. call write_eeprom_byte_from_acc
  229. inc DPTR ; Now layout revision
  230. mov A, #EEPROM_LAYOUT_REVISION
  231. call write_eeprom_byte_from_acc
  232. IF MODE == 0
  233. mov DPTR, #Eep_Pgm_Gov_P_Gain
  234. mov Temp1, #Pgm_Gov_P_Gain
  235. call write_eeprom_byte
  236. inc DPTR ; Now Eep_Pgm_Gov_I_Gain
  237. inc Temp1 ; Now Pgm_Gov_I_Gain
  238. call write_eeprom_byte
  239. inc DPTR ; Now Eep_Pgm_Gov_Mode
  240. inc Temp1 ; Now Pgm_Gov_Mode
  241. call write_eeprom_byte
  242. inc DPTR ; Now Eep_Pgm_Low_Voltage_Lim
  243. inc Temp1 ; Now Pgm_Low_Voltage_Lim
  244. call write_eeprom_byte
  245. inc DPTR ; Motor_Gain
  246. inc Temp1
  247. inc DPTR ; Motor_Idle
  248. inc Temp1
  249. ENDIF
  250. IF MODE == 1
  251. mov DPTR, #Eep_Pgm_Motor_Gain
  252. mov Temp1, #Pgm_Motor_Gain
  253. call write_eeprom_byte
  254. inc DPTR ; Now Eep_Pgm_Motor_Idle
  255. inc Temp1 ; Now Pgm_Motor_Idle
  256. call write_eeprom_byte
  257. ENDIF
  258. IF MODE == 2
  259. mov DPTR, #Eep_Pgm_Gov_P_Gain
  260. mov Temp1, #Pgm_Gov_P_Gain
  261. call write_eeprom_byte
  262. inc DPTR ; Now Eep_Pgm_Gov_I_Gain
  263. inc Temp1 ; Now Pgm_Gov_I_Gain
  264. call write_eeprom_byte
  265. inc DPTR ; Now Eep_Pgm_Gov_Mode
  266. inc Temp1 ; Now Pgm_Gov_Mode
  267. call write_eeprom_byte
  268. mov DPTR, #Eep_Pgm_Low_Voltage_Lim
  269. mov Temp1, #Pgm_Low_Voltage_Lim
  270. call write_eeprom_byte
  271. inc DPTR ; Now Eep_Pgm_Motor_Gain
  272. inc Temp1 ; Now Pgm_Motor_Gain
  273. call write_eeprom_byte
  274. inc DPTR ; Motor_Idle
  275. inc Temp1
  276. ENDIF
  277. inc DPTR ; Now Eep_Pgm_Startup_Pwr
  278. inc Temp1 ; Now Pgm_Startup_Pwr
  279. call write_eeprom_byte
  280. inc DPTR ; Now Eep_Pgm_Pwm_Freq
  281. inc Temp1 ; Now Pgm_Pwm_Freq
  282. call write_eeprom_byte
  283. inc DPTR ; Now Eep_Pgm_Direction_Rev
  284. inc Temp1 ; Now Pgm_Direction_Rev
  285. call write_eeprom_byte
  286. inc DPTR ; Now Eep_Pgm_Input_Pol
  287. inc Temp1 ; Now Pgm_Input_Pol
  288. call write_eeprom_byte
  289. inc DPTR ; Initialized_L
  290. inc Temp1
  291. inc DPTR ; Initialized_H
  292. inc Temp1
  293. inc DPTR ; Now Eep_Enable_TX_Program
  294. inc Temp1 ; Now Pgm_Enable_TX_Program
  295. call write_eeprom_byte
  296. IF MODE == 0
  297. inc DPTR ; Now Eep_Main_Rearm_Start
  298. inc Temp1 ; Now Pgm_Main_Rearm_Start
  299. call write_eeprom_byte
  300. inc DPTR ; Now Eep_Pgm_Gov_Setup_Target
  301. inc Temp1 ; Now Pgm_Gov_Setup_Target
  302. call write_eeprom_byte
  303. ENDIF
  304. IF MODE == 1
  305. inc DPTR ; Main_Rearm_Start
  306. inc Temp1
  307. inc DPTR ; Gov_Setup_Target
  308. inc Temp1
  309. ENDIF
  310. IF MODE == 2
  311. inc DPTR ; Main_Rearm_Start
  312. inc Temp1
  313. inc DPTR ; Gov_Setup_Target
  314. inc Temp1
  315. call write_eeprom_byte
  316. ENDIF
  317. inc DPTR ; Now Eep_Pgm_Startup_Rpm
  318. inc Temp1 ; Now Pgm_Startup_Rpm
  319. call write_eeprom_byte
  320. inc DPTR ; Now Eep_Pgm_Startup_Accel
  321. inc Temp1 ; Now Pgm_Startup_Accel
  322. call write_eeprom_byte
  323. inc DPTR ; Volt_Comp
  324. inc Temp1
  325. inc DPTR ; Now Eep_Pgm_Comm_Timing
  326. inc Temp1 ; Now Pgm_Comm_Timing
  327. call write_eeprom_byte
  328. inc DPTR ; Now Eep_Pgm_Damping_Force
  329. inc Temp1 ; Now Pgm_Damping_Force
  330. call write_eeprom_byte
  331. IF MODE == 0
  332. inc DPTR ; Now Eep_Pgm_Gov_Range
  333. inc Temp1 ; Now Pgm_Gov_Range
  334. call write_eeprom_byte
  335. ENDIF
  336. IF MODE >= 1
  337. inc DPTR ; Gov_Range
  338. inc Temp1
  339. ENDIF
  340. inc DPTR ; Now Eep_Pgm_Startup_Method
  341. inc Temp1 ; Now Pgm_Startup_Method
  342. call write_eeprom_byte
  343. inc DPTR ; Now Eep_Pgm_Ppm_Min_Throttle
  344. inc Temp1 ; Now Pgm_Ppm_Min_Throttle
  345. call write_eeprom_byte
  346. inc DPTR ; Now Eep_Pgm_Ppm_Max_Throttle
  347. inc Temp1 ; Now Pgm_Ppm_Max_Throttle
  348. call write_eeprom_byte
  349. inc DPTR ; Now Eep_Pgm_Beep_Strength
  350. inc Temp1 ; Now Pgm_Beep_Strength
  351. call write_eeprom_byte
  352. inc DPTR ; Now Eep_Pgm_Beacon_Strength
  353. inc Temp1 ; Now Pgm_Beacon_Strength
  354. call write_eeprom_byte
  355. inc DPTR ; Now Eep_Pgm_Beacon_Delay
  356. inc Temp1 ; Now Pgm_Beacon_Delay
  357. call write_eeprom_byte
  358. inc DPTR ; Now Eep_Pgm_Throttle_Rate
  359. inc Temp1 ; Now Pgm_Throttle_Rate
  360. call write_eeprom_byte
  361. inc DPTR ; Now Eep_Pgm_Demag_Comp
  362. inc Temp1 ; Now Pgm_Demag_Comp
  363. call write_eeprom_byte
  364. inc DPTR ; Now Eep_Pgm_BEC_Voltage_High
  365. inc Temp1 ; Now Pgm_BEC_Voltage_High
  366. call write_eeprom_byte
  367. call write_tags
  368. call write_eeprom_signature
  369. mov DPTR, #Eep_Dummy ; Set pointer to uncritical area
  370. ret
  371. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  372. CSEG AT 1C00h ; Last code segment. Take care that there is enough space!
  373. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  374. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  375. ;
  376. ; Read eeprom byte routine
  377. ;
  378. ; Gives data in A and in address given by Temp1. Assumes address in DPTR
  379. ; Also assumes address high byte to be zero
  380. ;
  381. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  382. read_eeprom_byte:
  383. clr A
  384. movc A, @A+DPTR ; Read from flash
  385. mov @Temp1, A
  386. ret
  387. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  388. ;
  389. ; Write eeprom byte routine
  390. ;
  391. ; Assumes data in address given by Temp1, or in accumulator. Assumes address in DPTR
  392. ; Also assumes address high byte to be zero
  393. ;
  394. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  395. write_eeprom_byte:
  396. mov A, @Temp1
  397. write_eeprom_byte_from_acc:
  398. orl PSCTL, #01h ; Set the PSWE bit
  399. anl PSCTL, #0FDh ; Clear the PSEE bit
  400. mov RSTSRC, #02h ; Set VDD monitor as a reset source (PORSF)
  401. mov FLKEY, #0A5h ; First key code
  402. mov FLKEY, #0F1h ; Second key code
  403. movx @DPTR, A ; Write to flash
  404. anl PSCTL, #0FEh ; Clear the PSWE bit
  405. ret
  406. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  407. ;
  408. ; Erase flash routine (erases the flash segment used for "eeprom" variables)
  409. ;
  410. ; No assumptions
  411. ;
  412. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  413. erase_flash:
  414. orl PSCTL, #02h ; Set the PSEE bit
  415. orl PSCTL, #01h ; Set the PSWE bit
  416. mov RSTSRC, #02h ; Set VDD monitor as a reset source (PORSF)
  417. mov FLKEY, #0A5h ; First key code
  418. mov FLKEY, #0F1h ; Second key code
  419. mov DPTR, #Eep_Initialized_L
  420. movx @DPTR, A
  421. anl PSCTL, #0FCh ; Clear the PSEE and PSWE bits
  422. ret
  423. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  424. ;
  425. ; Write eeprom signature routine
  426. ;
  427. ; No assumptions
  428. ;
  429. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  430. write_eeprom_signature:
  431. IF MODE == 0
  432. mov DPTR, #Eep_Initialized_L
  433. mov A, #0A5h
  434. call write_eeprom_byte_from_acc
  435. mov DPTR, #Eep_Initialized_H
  436. mov A, #05Ah
  437. call write_eeprom_byte_from_acc
  438. ENDIF
  439. IF MODE == 1
  440. mov DPTR, #Eep_Initialized_L
  441. mov A, #05Ah
  442. call write_eeprom_byte_from_acc
  443. mov DPTR, #Eep_Initialized_H
  444. mov A, #0A5h
  445. call write_eeprom_byte_from_acc
  446. ENDIF
  447. IF MODE == 2
  448. mov DPTR, #Eep_Initialized_L
  449. mov A, #055h
  450. call write_eeprom_byte_from_acc
  451. mov DPTR, #Eep_Initialized_H
  452. mov A, #0AAh
  453. call write_eeprom_byte_from_acc
  454. ENDIF
  455. ret
  456. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  457. ;
  458. ; Read all tags from flash and store in temporary storage
  459. ;
  460. ; No assumptions
  461. ;
  462. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  463. read_tags:
  464. mov Temp3, #48 ; Number of tags
  465. mov Temp2, #Tag_Temporary_Storage ; Set RAM address
  466. mov Temp1, #Bit_Access
  467. mov DPTR, #Eep_ESC_Layout ; Set flash address
  468. read_tag:
  469. call read_eeprom_byte
  470. mov A, Bit_Access
  471. mov @Temp2, A ; Write to RAM
  472. inc Temp2
  473. inc DPTR
  474. djnz Temp3, read_tag
  475. ret
  476. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  477. ;
  478. ; Write all tags from temporary storage and store in flash
  479. ;
  480. ; No assumptions
  481. ;
  482. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  483. write_tags:
  484. mov Temp3, #48 ; Number of tags
  485. mov Temp2, #Tag_Temporary_Storage ; Set RAM address
  486. mov DPTR, #Eep_ESC_Layout ; Set flash address
  487. write_tag:
  488. mov A, @Temp2 ; Read from RAM
  489. call write_eeprom_byte_from_acc
  490. inc Temp2
  491. inc DPTR
  492. djnz Temp3, write_tag
  493. ret
  494. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  495. ;
  496. ; Store new parameter value in ram routine
  497. ;
  498. ; No assumptions
  499. ;
  500. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  501. store_new_value_in_ram:
  502. mov Temp4, Tx_Pgm_Func_No ; Function no
  503. mov Temp1, Tx_Pgm_Paraval_No ; Parameter value no
  504. IF MODE == 0
  505. store_main_func_1:
  506. cjne Temp4, #1, store_main_func_2
  507. mov Temp2, #Pgm_Gov_P_Gain
  508. jmp store_in_ram_exit
  509. store_main_func_2:
  510. cjne Temp4, #2, store_main_func_3
  511. mov Temp2, #Pgm_Gov_I_Gain
  512. jmp store_in_ram_exit
  513. store_main_func_3:
  514. cjne Temp4, #3, store_main_func_4
  515. mov Temp2, #Pgm_Gov_Mode
  516. jmp store_in_ram_exit
  517. store_main_func_4:
  518. cjne Temp4, #4, store_main_func_5
  519. mov Temp2, #Pgm_Gov_Range
  520. jmp store_in_ram_exit
  521. store_main_func_5:
  522. cjne Temp4, #5, store_main_func_6
  523. mov Temp2, #Pgm_Low_Voltage_Lim
  524. jmp store_in_ram_exit
  525. store_main_func_6:
  526. cjne Temp4, #6, store_main_func_7
  527. mov Temp2, #Pgm_Startup_Method
  528. jmp store_in_ram_exit
  529. store_main_func_7:
  530. cjne Temp4, #7, store_main_func_8
  531. mov Temp2, #Pgm_Startup_Pwr
  532. jmp store_in_ram_exit
  533. store_main_func_8:
  534. cjne Temp4, #8, store_main_func_9
  535. mov Temp2, #Pgm_Startup_Rpm
  536. jmp store_in_ram_exit
  537. store_main_func_9:
  538. cjne Temp4, #9, store_main_func_10
  539. mov Temp2, #Pgm_Startup_Accel
  540. jmp store_in_ram_exit
  541. store_main_func_10:
  542. cjne Temp4, #10, store_main_func_11
  543. mov Temp2, #Pgm_Comm_Timing
  544. jmp store_in_ram_exit
  545. store_main_func_11:
  546. cjne Temp4, #11, store_main_func_12
  547. mov Temp2, #Pgm_Throttle_Rate
  548. jmp store_in_ram_exit
  549. store_main_func_12:
  550. cjne Temp4, #12, store_main_func_13
  551. mov Temp2, #Pgm_Damping_Force
  552. jmp store_in_ram_exit
  553. store_main_func_13:
  554. cjne Temp4, #13, store_main_func_14
  555. mov Temp2, #Pgm_Pwm_Freq
  556. jmp store_in_ram_exit
  557. store_main_func_14:
  558. cjne Temp4, #14, store_main_func_15
  559. mov Temp2, #Pgm_Demag_Comp
  560. jmp store_in_ram_exit
  561. store_main_func_15:
  562. cjne Temp4, #15, store_main_func_16
  563. mov Temp2, #Pgm_Direction_Rev
  564. jmp store_in_ram_exit
  565. store_main_func_16:
  566. mov Temp2, #Pgm_Input_Pol
  567. jmp store_in_ram_exit
  568. ENDIF
  569. IF MODE == 1
  570. store_tail_func_1:
  571. cjne Temp4, #1, store_tail_func_2
  572. mov Temp2, #Pgm_Motor_Gain
  573. jmp store_in_ram_exit
  574. store_tail_func_2:
  575. cjne Temp4, #2, store_tail_func_3
  576. mov Temp2, #Pgm_Motor_Idle
  577. jmp store_in_ram_exit
  578. store_tail_func_3:
  579. cjne Temp4, #3, store_tail_func_4
  580. mov Temp2, #Pgm_Startup_Method
  581. jmp store_in_ram_exit
  582. store_tail_func_4:
  583. cjne Temp4, #4, store_tail_func_5
  584. mov Temp2, #Pgm_Startup_Pwr
  585. jmp store_in_ram_exit
  586. store_tail_func_5:
  587. cjne Temp4, #5, store_tail_func_6
  588. mov Temp2, #Pgm_Startup_Rpm
  589. jmp store_in_ram_exit
  590. store_tail_func_6:
  591. cjne Temp4, #6, store_tail_func_7
  592. mov Temp2, #Pgm_Startup_Accel
  593. jmp store_in_ram_exit
  594. store_tail_func_7:
  595. cjne Temp4, #7, store_tail_func_8
  596. mov Temp2, #Pgm_Comm_Timing
  597. jmp store_in_ram_exit
  598. store_tail_func_8:
  599. cjne Temp4, #8, store_tail_func_9
  600. mov Temp2, #Pgm_Throttle_Rate
  601. jmp store_in_ram_exit
  602. store_tail_func_9:
  603. cjne Temp4, #9, store_tail_func_10
  604. mov Temp2, #Pgm_Damping_Force
  605. jmp store_in_ram_exit
  606. store_tail_func_10:
  607. cjne Temp4, #10, store_tail_func_11
  608. mov Temp2, #Pgm_Pwm_Freq
  609. jmp store_in_ram_exit
  610. store_tail_func_11:
  611. cjne Temp4, #11, store_tail_func_12
  612. mov Temp2, #Pgm_Demag_Comp
  613. jmp store_in_ram_exit
  614. store_tail_func_12:
  615. cjne Temp4, #12, store_tail_func_13
  616. mov Temp2, #Pgm_Direction_Rev
  617. jmp store_in_ram_exit
  618. store_tail_func_13:
  619. mov Temp2, #Pgm_Input_Pol
  620. jmp store_in_ram_exit
  621. ENDIF
  622. IF MODE == 2
  623. store_multi_func_1:
  624. cjne Temp4, #1, store_multi_func_2
  625. mov Temp2, #Pgm_Gov_P_Gain
  626. jmp store_in_ram_exit
  627. store_multi_func_2:
  628. cjne Temp4, #2, store_multi_func_3
  629. mov Temp2, #Pgm_Gov_I_Gain
  630. jmp store_in_ram_exit
  631. store_multi_func_3:
  632. cjne Temp4, #3, store_multi_func_4
  633. mov Temp2, #Pgm_Gov_Mode
  634. jmp store_in_ram_exit
  635. store_multi_func_4:
  636. cjne Temp4, #4, store_multi_func_5
  637. mov Temp2, #Pgm_Motor_Gain
  638. jmp store_in_ram_exit
  639. store_multi_func_5:
  640. cjne Temp4, #5, store_multi_func_6
  641. mov Temp2, #Pgm_Low_Voltage_Lim
  642. jmp store_in_ram_exit
  643. store_multi_func_6:
  644. cjne Temp4, #6, store_multi_func_7
  645. mov Temp2, #Pgm_Startup_Method
  646. jmp store_in_ram_exit
  647. store_multi_func_7:
  648. cjne Temp4, #7, store_multi_func_8
  649. mov Temp2, #Pgm_Startup_Pwr
  650. jmp store_in_ram_exit
  651. store_multi_func_8:
  652. cjne Temp4, #8, store_multi_func_9
  653. mov Temp2, #Pgm_Startup_Rpm
  654. jmp store_in_ram_exit
  655. store_multi_func_9:
  656. cjne Temp4, #9, store_multi_func_10
  657. mov Temp2, #Pgm_Startup_Accel
  658. jmp store_in_ram_exit
  659. store_multi_func_10:
  660. cjne Temp4, #10, store_multi_func_11
  661. mov Temp2, #Pgm_Comm_Timing
  662. jmp store_in_ram_exit
  663. store_multi_func_11:
  664. cjne Temp4, #11, store_multi_func_12
  665. mov Temp2, #Pgm_Throttle_Rate
  666. jmp store_in_ram_exit
  667. store_multi_func_12:
  668. cjne Temp4, #12, store_multi_func_13
  669. mov Temp2, #Pgm_Damping_Force
  670. jmp store_in_ram_exit
  671. store_multi_func_13:
  672. cjne Temp4, #13, store_multi_func_14
  673. mov Temp2, #Pgm_Pwm_Freq
  674. jmp store_in_ram_exit
  675. store_multi_func_14:
  676. cjne Temp4, #14, store_multi_func_15
  677. mov Temp2, #Pgm_Demag_Comp
  678. jmp store_in_ram_exit
  679. store_multi_func_15:
  680. cjne Temp4, #15, store_multi_func_16
  681. mov Temp2, #Pgm_Direction_Rev
  682. jmp store_in_ram_exit
  683. store_multi_func_16:
  684. mov Temp2, #Pgm_Input_Pol
  685. jmp store_in_ram_exit
  686. ENDIF
  687. store_in_ram_exit:
  688. mov A, Temp1
  689. mov @Temp2, A
  690. ret
  691. ;**;**** **** **** **** **** **** **** **** **** **** **** **** ****
  692. ;
  693. ; Wait 1 second routine
  694. ;
  695. ; No assumptions
  696. ;
  697. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  698. wait1s:
  699. mov Temp5, #5
  700. wait1s_loop:
  701. call wait200ms
  702. djnz Temp5, wait1s_loop
  703. ret
  704. ;**;**** **** **** **** **** **** **** **** **** **** **** **** ****
  705. ;
  706. ; Success beep routine
  707. ;
  708. ; No assumptions
  709. ;
  710. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  711. success_beep:
  712. clr EA ; Disable all interrupts
  713. call beep_f1
  714. call beep_f2
  715. call beep_f3
  716. call beep_f4
  717. call wait10ms
  718. call beep_f1
  719. call beep_f2
  720. call beep_f3
  721. call beep_f4
  722. call wait10ms
  723. call beep_f1
  724. call beep_f2
  725. call beep_f3
  726. call beep_f4
  727. setb EA ; Enable all interrupts
  728. ret
  729. ;**;**** **** **** **** **** **** **** **** **** **** **** **** ****
  730. ;
  731. ; Success beep inverted routine
  732. ;
  733. ; No assumptions
  734. ;
  735. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  736. success_beep_inverted:
  737. clr EA ; Disable all interrupts
  738. call beep_f4
  739. call beep_f3
  740. call beep_f2
  741. call beep_f1
  742. call wait10ms
  743. call beep_f4
  744. call beep_f3
  745. call beep_f2
  746. call beep_f1
  747. call wait10ms
  748. call beep_f4
  749. call beep_f3
  750. call beep_f2
  751. call beep_f1
  752. setb EA ; Enable all interrupts
  753. ret
  754. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  755. ;
  756. ; Function and parameter value beep routine
  757. ;
  758. ; No assumptions
  759. ;
  760. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  761. function_paraval_beep:
  762. mov Temp7, Tx_Pgm_Func_No ; Function no
  763. mov Temp8, Tx_Pgm_Paraval_No ; Parameter value no
  764. clr EA ; Disable all interrupts
  765. function_beep:
  766. call beep_f1
  767. call beep_f1
  768. call beep_f1
  769. call wait10ms
  770. djnz Temp7, function_beep
  771. paraval_beep:
  772. call beep_f4
  773. call wait10ms
  774. djnz Temp8, paraval_beep
  775. setb EA ; Enable all interrupts
  776. ret
  777. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  778. ;
  779. ; Program by TX routine
  780. ;
  781. ; No assumptions
  782. ;
  783. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  784. program_by_tx:
  785. ; Programming mode entry beeps
  786. call success_beep
  787. call wait1s
  788. call wait1s
  789. ; Start at function 1, parameter value 1
  790. mov Tx_Pgm_Func_No, #1
  791. paraval_no_entry:
  792. mov Tx_Pgm_Paraval_No, #1
  793. beep_no_entry:
  794. mov Tx_Pgm_Beep_No, #0
  795. func_paraval:
  796. call function_paraval_beep
  797. mov Temp5, #5 ; Wait is 5x 200ms
  798. func_paraval_wait:
  799. mov Temp6, New_Rcp ; Store RC pulse
  800. call wait200ms
  801. clr C
  802. mov A, Temp6
  803. subb A, New_Rcp ; Is RC pulse stable? (Avoid issues from 3in1 interference)
  804. jnz func_paraval_wait ; No - branch
  805. clr C
  806. mov A, New_Rcp ; Load new RC pulse value
  807. subb A, #RCP_STOP ; Below stop?
  808. jc func_paraval_store ; Yes - branch
  809. clr C
  810. mov A, New_Rcp ; Load new RC pulse value
  811. subb A, #RCP_MAX ; Below max?
  812. jc function_next ; Yes - branch
  813. ajmp func_paraval_cont_wait ; No - branch
  814. func_paraval_store:
  815. call store_new_value_in_ram ; Yes - store new value in RAM
  816. call erase_and_store_all_in_eeprom ; Store all values in EEPROM
  817. call success_beep ; Beep success
  818. clr EA ; Disable all interrupts
  819. IF ONE_S_CAPABLE == 0
  820. mov RSTSRC, #12h ; Generate hardware reset and set VDD monitor
  821. ELSE
  822. mov RSTSRC, #10h ; Generate hardware reset and disable VDD monitor
  823. ENDIF
  824. call wait1s
  825. func_paraval_cont_wait:
  826. djnz Temp5, func_paraval_wait
  827. inc Tx_Pgm_Beep_No ; Check number of beeps
  828. clr C
  829. mov A, Tx_Pgm_Beep_No
  830. subb A, #3 ; Three beeps done?
  831. jnc paraval_next ; Yes - Next parameter value
  832. jmp func_paraval ; No - go back
  833. paraval_next:
  834. call wait1s
  835. inc Tx_Pgm_Paraval_No ; Parameter value no
  836. IF MODE == 0
  837. mov A, Tx_Pgm_Func_No ; Decode number of parameters
  838. dec A
  839. mov DPTR, #TX_PGM_PARAMS_MAIN
  840. movc A, @A+DPTR
  841. mov Temp1, A
  842. ENDIF
  843. IF MODE == 1
  844. mov A, Tx_Pgm_Func_No ; Decode number of parameters
  845. dec A
  846. mov DPTR, #TX_PGM_PARAMS_TAIL
  847. movc A, @A+DPTR
  848. mov Temp1, A
  849. ENDIF
  850. IF MODE == 2
  851. mov A, Tx_Pgm_Func_No ; Decode number of parameters
  852. dec A
  853. mov DPTR, #TX_PGM_PARAMS_MULTI
  854. movc A, @A+DPTR
  855. mov Temp1, A
  856. ENDIF
  857. inc Temp1
  858. clr C
  859. mov A, Tx_Pgm_Paraval_No
  860. subb A, Temp1
  861. jnc function_next ; Last parameter value?
  862. jmp beep_no_entry ; No - go back
  863. function_next: ; Yes - Next function value
  864. call wait1s
  865. call wait1s
  866. inc Tx_Pgm_Func_No ; Function value no
  867. IF MODE == 0
  868. clr C
  869. mov A, Tx_Pgm_Func_No
  870. subb A, #17 ; Main has 16 functions
  871. ENDIF
  872. IF MODE == 1
  873. clr C
  874. mov A, Tx_Pgm_Func_No
  875. subb A, #14 ; Tail has 13 functions
  876. ENDIF
  877. IF MODE == 2
  878. clr C
  879. mov A, Tx_Pgm_Func_No
  880. subb A, #17 ; Multi has 16 functions
  881. ENDIF
  882. jnc program_by_tx_exit ; Last function value?
  883. jmp paraval_no_entry ; No - go back
  884. program_by_tx_exit:
  885. call set_default_parameters ; Load all defaults
  886. call erase_and_store_all_in_eeprom ; Erase flash and program
  887. clr EA ; Disable all interrupts
  888. IF ONE_S_CAPABLE == 0
  889. mov RSTSRC, #12h ; Generate hardware reset and set VDD monitor
  890. ELSE
  891. mov RSTSRC, #10h ; Generate hardware reset and disable VDD monitor
  892. ENDIF
  893. call wait1s