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;---------------------------------------------------------------------------; ; ;;; FILE NAME: C8051F330.INC; TARGET MCUs: C8051F330, F331; DESCRIPTION: Register/bit definitions for the C8051F330 product family.;; REVISION 1.0;;---------------------------------------------------------------------------
;REGISTER DEFINITIONS;P0 DATA 080H ; PORT 0 LATCHSP DATA 081H ; STACK POINTERDPL DATA 082H ; DATA POINTER LOWDPH DATA 083H ; DATA POINTER HIGHPCON DATA 087H ; POWER CONTROLTCON DATA 088H ; TIMER/COUNTER CONTROLTMOD DATA 089H ; TIMER/COUNTER MODETL0 DATA 08AH ; TIMER/COUNTER 0 LOWTL1 DATA 08BH ; TIMER/COUNTER 1 LOWTH0 DATA 08CH ; TIMER/COUNTER 0 HIGHTH1 DATA 08DH ; TIMER/COUNTER 1 HIGHCKCON DATA 08EH ; CLOCK CONTROLPSCTL DATA 08FH ; PROGRAM STORE R/W CONTROLP1 DATA 090H ; PORT 1 LATCHTMR3CN DATA 091H ; TIMER/COUNTER 3 CONTROLTMR3RLL DATA 092H ; TIMER/COUNTER 3 RELOAD LOWTMR3RLH DATA 093H ; TIMER/COUNTER 3 RELOAD HIGHTMR3L DATA 094H ; TIMER/COUNTER 3 LOWTMR3H DATA 095H ; TIMER/COUNTER 3 HIGHIDA0L DATA 096H ; CURRENT MODE DAC0 LOWIDA0H DATA 097H ; CURRENT MODE DAC0 HIGHSCON0 DATA 098H ; UART0 CONTROLSBUF0 DATA 099H ; UART0 DATA BUFFERCPT0CN DATA 09BH ; COMPARATOR0 CONTROLCPT0MD DATA 09DH ; COMPARATOR0 MODE SELECTIONCPT0MX DATA 09FH ; COMPARATOR0 MUX SELECTIONP2 DATA 0A0H ; PORT 2 LATCHSPI0CFG DATA 0A1H ; SPI CONFIGURATIONSPI0CKR DATA 0A2H ; SPI CLOCK RATE CONTROLSPI0DAT DATA 0A3H ; SPI DATAP0MDOUT DATA 0A4H ; PORT 0 OUTPUT MODE CONFIGURATIONP1MDOUT DATA 0A5H ; PORT 1 OUTPUT MODE CONFIGURATIONP2MDOUT DATA 0A6H ; PORT 2 OUTPUT MODE CONFIGURATIONIE DATA 0A8H ; INTERRUPT ENABLECLKSEL DATA 0A9H ; CLOCK SELECTEMI0CN DATA 0AAH ; EXTERNAL MEMORY INTERFACE CONTROLOSCXCN DATA 0B1H ; EXTERNAL OSCILLATOR CONTROLOSCICN DATA 0B2H ; INTERNAL OSCILLATOR CONTROLOSCICL DATA 0B3H ; INTERNAL OSCILLATOR CALIBRATIONFLSCL DATA 0B6H ; FLASH SCALEFLKEY DATA 0B7H ; FLASH LOCK AND KEYIP DATA 0B8H ; INTERRUPT PRIORITYIDA0CN DATA 0B9H ; CURRENT MODE DAC0 CONTROLAMX0N DATA 0BAH ; AMUX0 NEGATIVE CHANNEL SELECTAMX0P DATA 0BBH ; AMUX0 POSITIVE CHANNEL SELECTADC0CF DATA 0BCH ; ADC0 CONFIGURATIONADC0L DATA 0BDH ; ADC0 LOWADC0H DATA 0BEH ; ADC0 HIGHSMB0CN DATA 0C0H ; SMBUS CONTROLSMB0CF DATA 0C1H ; SMBUS CONFIGURATIONSMB0DAT DATA 0C2H ; SMBUS DATAADC0GTL DATA 0C3H ; ADC0 GREATER-THAN COMPARE LOWADC0GTH DATA 0C4H ; ADC0 GREATER-THAN COMPARE HIGHADC0LTL DATA 0C5H ; ADC0 LESS-THAN COMPARE WORD LOWADC0LTH DATA 0C6H ; ADC0 LESS-THAN COMPARE WORD HIGHTMR2CN DATA 0C8H ; TIMER/COUNTER 2 CONTROLTMR2RLL DATA 0CAH ; TIMER/COUNTER 2 RELOAD LOWTMR2RLH DATA 0CBH ; TIMER/COUNTER 2 RELOAD HIGHTMR2L DATA 0CCH ; TIMER/COUNTER 2 LOWTMR2H DATA 0CDH ; TIMER/COUNTER 2 HIGHPSW DATA 0D0H ; PROGRAM STATUS WORDREF0CN DATA 0D1H ; VOLTAGE REFERENCE CONTROLP0SKIP DATA 0D4H ; PORT 0 SKIPP1SKIP DATA 0D5H ; PORT 1 SKIPPCA0CN DATA 0D8H ; PCA CONTROLPCA0MD DATA 0D9H ; PCA MODEPCA0CPM0 DATA 0DAH ; PCA MODULE 0 MODE REGISTERPCA0CPM1 DATA 0DBH ; PCA MODULE 1 MODE REGISTERPCA0CPM2 DATA 0DCH ; PCA MODULE 2 MODE REGISTERACC DATA 0E0H ; ACCUMULATORXBR0 DATA 0E1H ; PORT I/O CROSSBAR CONTROL 0XBR1 DATA 0E2H ; PORT I/O CROSSBAR CONTROL 1OSCLCN DATA 0E3H ; LOW-FREQUENCY OSCILLATOR CONTROLIT01CF DATA 0E4H ; INT0/INT1 CONFIGURATIONEIE1 DATA 0E6H ; EXTENDED INTERRUPT ENABLE 1ADC0CN DATA 0E8H ; ADC0 CONTROLPCA0CPL1 DATA 0E9H ; PCA CAPTURE 1 LOWPCA0CPH1 DATA 0EAH ; PCA CAPTURE 1 HIGHPCA0CPL2 DATA 0EBH ; PCA CAPTURE 2 LOWPCA0CPH2 DATA 0ECH ; PCA CAPTURE 2 HIGHRSTSRC DATA 0EFH ; RESET SOURCE CONFIGURATION/STATUSB DATA 0F0H ; B REGISTERP0MDIN DATA 0F1H ; PORT 0 INPUT MODE CONFIGURATIONP1MDIN DATA 0F2H ; PORT 1 INPUT MODE CONFIGURATIONEIP1 DATA 0F6H ; EXTENDED INTERRUPT PRIORITY 1SPI0CN DATA 0F8H ; SPI CONTROLPCA0L DATA 0F9H ; PCA COUNTER LOWPCA0H DATA 0FAH ; PCA COUNTER HIGHPCA0CPL0 DATA 0FBH ; PCA CAPTURE 0 LOWPCA0CPH0 DATA 0FCH ; PCA CAPTURE 0 HIGHVDM0CN DATA 0FFH ; VDD MONITOR CONTROL
;;------------------------------------------------------------------------------;BIT DEFINITIONS;; TCON 088HTF1 BIT 08FH ; TIMER 1 OVERFLOW FLAGTR1 BIT 08EH ; TIMER 1 ON/OFF CONTROLTF0 BIT 08DH ; TIMER 0 OVERFLOW FLAGTR0 BIT 08CH ; TIMER 0 ON/OFF CONTROLIE1 BIT 08BH ; EXT. INTERRUPT 1 EDGE FLAGIT1 BIT 08AH ; EXT. INTERRUPT 1 TYPEIE0 BIT 089H ; EXT. INTERRUPT 0 EDGE FLAGIT0 BIT 088H ; EXT. INTERRUPT 0 TYPE
; SCON0 098HS0MODE BIT 09FH ; UART 0 MODEMCE0 BIT 09DH ; UART 0 MCEREN0 BIT 09CH ; UART 0 RX ENABLETB80 BIT 09BH ; UART 0 TX BIT 8RB80 BIT 09AH ; UART 0 RX BIT 8TI0 BIT 099H ; UART 0 TX INTERRUPT FLAGRI0 BIT 098H ; UART 0 RX INTERRUPT FLAG
; IE 0A8HEA BIT 0AFH ; GLOBAL INTERRUPT ENABLEESPI0 BIT 0AEH ; SPI0 INTERRUPT ENABLEET2 BIT 0ADH ; TIMER 2 INTERRUPT ENABLEES0 BIT 0ACH ; UART0 INTERRUPT ENABLEET1 BIT 0ABH ; TIMER 1 INTERRUPT ENABLEEX1 BIT 0AAH ; EXTERNAL INTERRUPT 1 ENABLEET0 BIT 0A9H ; TIMER 0 INTERRUPT ENABLEEX0 BIT 0A8H ; EXTERNAL INTERRUPT 0 ENABLE
; IP 0B8HPSPI0 BIT 0BEH ; SPI0 PRIORITYPT2 BIT 0BDH ; TIMER 2 PRIORITYPS0 BIT 0BCH ; UART0 PRIORITYPT1 BIT 0BBH ; TIMER 1 PRIORITYPX1 BIT 0BAH ; EXTERNAL INTERRUPT 1 PRIORITYPT0 BIT 0B9H ; TIMER 0 PRIORITYPX0 BIT 0B8H ; EXTERNAL INTERRUPT 0 PRIORITY
; SMB0CN 0C0HMASTER BIT 0C7H ; SMBUS 0 MASTER/SLAVETXMODE BIT 0C6H ; SMBUS 0 TRANSMIT MODESTA BIT 0C5H ; SMBUS 0 START FLAGSTO BIT 0C4H ; SMBUS 0 STOP FLAGACKRQ BIT 0C3H ; SMBUS 0 ACKNOWLEDGE REQUESTARBLOST BIT 0C2H ; SMBUS 0 ARBITRATION LOSTACK BIT 0C1H ; SMBUS 0 ACKNOWLEDGE FLAGSI BIT 0C0H ; SMBUS 0 INTERRUPT PENDING FLAG
; TMR2CN 0C8HTF2H BIT 0CFH ; TIMER 2 HIGH BYTE OVERFLOW FLAGTF2L BIT 0CEH ; TIMER 2 LOW BYTE OVERFLOW FLAGTF2LEN BIT 0CDH ; TIMER 2 LOW BYTE INTERRUPT ENABLETF2CEN BIT 0CCH ; TIMER 2 LFO CAPTURE ENABLET2SPLIT BIT 0CBH ; TIMER 2 SPLIT MODE ENABLETR2 BIT 0CAH ; TIMER 2 ON/OFF CONTROLT2XCLK BIT 0C8H ; TIMER 2 EXTERNAL CLOCK SELECT
; PSW 0D0HCY BIT 0D7H ; CARRY FLAGAC BIT 0D6H ; AUXILIARY CARRY FLAGF0 BIT 0D5H ; USER FLAG 0RS1 BIT 0D4H ; REGISTER BANK SELECT 1RS0 BIT 0D3H ; REGISTER BANK SELECT 0OV BIT 0D2H ; OVERFLOW FLAGF1 BIT 0D1H ; USER FLAG 1P BIT 0D0H ; ACCUMULATOR PARITY FLAG
; PCA0CN 0D8HCF BIT 0DFH ; PCA 0 COUNTER OVERFLOW FLAGCR BIT 0DEH ; PCA 0 COUNTER RUN CONTROL BITCCF2 BIT 0DAH ; PCA 0 MODULE 2 INTERRUPT FLAGCCF1 BIT 0D9H ; PCA 0 MODULE 1 INTERRUPT FLAGCCF0 BIT 0D8H ; PCA 0 MODULE 0 INTERRUPT FLAG ; ADC 0 WINDOW INTERRUPT FLAG; ADC0CN 0E8HAD0EN BIT 0EFH ; ADC 0 ENABLEAD0TM BIT 0EEH ; ADC 0 TRACK MODEAD0INT BIT 0EDH ; ADC 0 EOC INTERRUPT FLAGAD0BUSY BIT 0ECH ; ADC 0 BUSY FLAGAD0WINT BIT 0EBH ; ADC 0 WINDOW INTERRUPT FLAGAD0CM2 BIT 0EAH ; ADC 0 CONVERT START MODE BIT 2AD0CM1 BIT 0E9H ; ADC 0 CONVERT START MODE BIT 1AD0CM0 BIT 0E8H ; ADC 0 CONVERT START MODE BIT 0
; SPI0CN 0F8HSPIF BIT 0FFH ; SPI 0 INTERRUPT FLAGWCOL BIT 0FEH ; SPI 0 WRITE COLLISION FLAGMODF BIT 0FDH ; SPI 0 MODE FAULT FLAGRXOVRN BIT 0FCH ; SPI 0 RX OVERRUN FLAGNSSMD1 BIT 0FBH ; SPI 0 SLAVE SELECT MODE 1NSSMD0 BIT 0FAH ; SPI 0 SLAVE SELECT MODE 0TXBMT BIT 0F9H ; SPI 0 TX BUFFER EMPTY FLAGSPIEN BIT 0F8H ; SPI 0 SPI ENABLE
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