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  1. ;**** **** **** **** ****
  2. ;
  3. ; BLHeli program for controlling brushless motors in helicopters and multirotors
  4. ;
  5. ; Copyright 2011, 2012 Steffen Skaug
  6. ; This program is distributed under the terms of the GNU General Public License
  7. ;
  8. ; This file is part of BLHeli.
  9. ;
  10. ; BLHeli is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; BLHeli is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
  22. ;
  23. ;**** **** **** **** ****
  24. ;
  25. ; BLHeliTxPgm SiLabs
  26. ;
  27. ; EEPROM is not available in SiLabs MCUs
  28. ; Therefore a segment of the flash is used as "EEPROM"
  29. ;
  30. ;**** **** **** **** ****
  31. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  32. ;
  33. ; Read all eeprom parameters routine
  34. ;
  35. ; No assumptions
  36. ;
  37. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  38. read_all_eeprom_parameters:
  39. ; Check initialized signature
  40. mov DPTR, #Eep_Initialized_L
  41. mov Temp1, #Bit_Access
  42. call read_eeprom_byte
  43. mov A, Bit_Access
  44. IF MODE == 0
  45. cjne A, #0A5h, read_eeprom_store_defaults
  46. ENDIF
  47. IF MODE == 1
  48. cjne A, #05Ah, read_eeprom_store_defaults
  49. ENDIF
  50. IF MODE == 2
  51. cjne A, #055h, read_eeprom_store_defaults
  52. ENDIF
  53. inc DPTR ; Now Eep_Initialized_H
  54. call read_eeprom_byte
  55. mov A, Bit_Access
  56. IF MODE == 0
  57. cjne A, #05Ah, read_eeprom_store_defaults
  58. ENDIF
  59. IF MODE == 1
  60. cjne A, #0A5h, read_eeprom_store_defaults
  61. ENDIF
  62. IF MODE == 2
  63. cjne A, #0AAh, read_eeprom_store_defaults
  64. ENDIF
  65. jmp read_eeprom_read
  66. read_eeprom_store_defaults:
  67. call set_default_parameters
  68. call erase_and_store_all_in_eeprom
  69. jmp read_eeprom_exit
  70. read_eeprom_read:
  71. ; Read eeprom
  72. IF MODE == 0 OR MODE == 2 ;Main or multi
  73. mov DPTR, #Eep_Pgm_Gov_P_Gain
  74. ENDIF
  75. IF MODE == 1 ; Tail
  76. mov DPTR, #_Eep_Pgm_Gov_P_Gain
  77. ENDIF
  78. mov Temp1, #Pgm_Gov_P_Gain
  79. mov Temp4, #10
  80. read_eeprom_block1:
  81. call read_eeprom_byte
  82. inc DPTR
  83. inc Temp1
  84. djnz Temp4, read_eeprom_block1
  85. mov DPTR, #Eep_Enable_TX_Program
  86. mov Temp1, #Pgm_Enable_TX_Program
  87. mov Temp4, #24 ; 24 parameters
  88. read_eeprom_block2:
  89. call read_eeprom_byte
  90. inc DPTR
  91. inc Temp1
  92. djnz Temp4, read_eeprom_block2
  93. mov DPTR, #Eep_Dummy ; Set pointer to uncritical area
  94. read_eeprom_exit:
  95. ret
  96. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  97. ;
  98. ; Erase flash and store all parameter value in EEPROM routine
  99. ;
  100. ; No assumptions
  101. ;
  102. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  103. erase_and_store_all_in_eeprom:
  104. clr EA ; Disable interrupts
  105. call read_tags
  106. call erase_flash ; Erase flash
  107. mov DPTR, #Eep_FW_Main_Revision ; Store firmware main revision
  108. mov A, #EEPROM_FW_MAIN_REVISION
  109. call write_eeprom_byte_from_acc
  110. inc DPTR ; Now firmware sub revision
  111. mov A, #EEPROM_FW_SUB_REVISION
  112. call write_eeprom_byte_from_acc
  113. inc DPTR ; Now layout revision
  114. mov A, #EEPROM_LAYOUT_REVISION
  115. call write_eeprom_byte_from_acc
  116. ; Write eeprom
  117. IF MODE == 0 OR MODE == 2 ;Main or multi
  118. mov DPTR, #Eep_Pgm_Gov_P_Gain
  119. ENDIF
  120. IF MODE == 1 ; Tail
  121. mov DPTR, #_Eep_Pgm_Gov_P_Gain
  122. ENDIF
  123. mov Temp1, #Pgm_Gov_P_Gain
  124. mov Temp4, #10
  125. write_eeprom_block1:
  126. call write_eeprom_byte
  127. inc DPTR
  128. inc Temp1
  129. djnz Temp4, write_eeprom_block1
  130. mov DPTR, #Eep_Enable_TX_Program
  131. mov Temp1, #Pgm_Enable_TX_Program
  132. mov Temp4, #24 ; 24 parameters
  133. write_eeprom_block2:
  134. call write_eeprom_byte
  135. inc DPTR
  136. inc Temp1
  137. djnz Temp4, write_eeprom_block2
  138. call write_tags
  139. call write_eeprom_signature
  140. mov DPTR, #Eep_Dummy ; Set pointer to uncritical area
  141. ret
  142. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  143. ;
  144. ; Read eeprom byte routine
  145. ;
  146. ; Gives data in A and in address given by Temp1. Assumes address in DPTR
  147. ; Also assumes address high byte to be zero
  148. ;
  149. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  150. read_eeprom_byte:
  151. clr A
  152. movc A, @A+DPTR ; Read from flash
  153. mov @Temp1, A
  154. ret
  155. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  156. ;
  157. ; Write eeprom byte routine
  158. ;
  159. ; Assumes data in address given by Temp1, or in accumulator. Assumes address in DPTR
  160. ; Also assumes address high byte to be zero
  161. ;
  162. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  163. write_eeprom_byte:
  164. mov A, @Temp1
  165. write_eeprom_byte_from_acc:
  166. orl PSCTL, #01h ; Set the PSWE bit
  167. anl PSCTL, #0FDh ; Clear the PSEE bit
  168. mov RSTSRC, #02h ; Set VDD monitor as a reset source (PORSF)
  169. mov FLKEY, #0A5h ; First key code
  170. mov FLKEY, #0F1h ; Second key code
  171. movx @DPTR, A ; Write to flash
  172. anl PSCTL, #0FEh ; Clear the PSWE bit
  173. ret
  174. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  175. ;
  176. ; Erase flash routine (erases the flash segment used for "eeprom" variables)
  177. ;
  178. ; No assumptions
  179. ;
  180. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  181. erase_flash:
  182. orl PSCTL, #02h ; Set the PSEE bit
  183. orl PSCTL, #01h ; Set the PSWE bit
  184. mov RSTSRC, #02h ; Set VDD monitor as a reset source (PORSF)
  185. mov FLKEY, #0A5h ; First key code
  186. mov FLKEY, #0F1h ; Second key code
  187. mov DPTR, #Eep_Initialized_L
  188. movx @DPTR, A
  189. anl PSCTL, #0FCh ; Clear the PSEE and PSWE bits
  190. ret
  191. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  192. ;
  193. ; Write eeprom signature routine
  194. ;
  195. ; No assumptions
  196. ;
  197. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  198. write_eeprom_signature:
  199. IF MODE == 0
  200. mov DPTR, #Eep_Initialized_L
  201. mov A, #0A5h
  202. call write_eeprom_byte_from_acc
  203. mov DPTR, #Eep_Initialized_H
  204. mov A, #05Ah
  205. call write_eeprom_byte_from_acc
  206. ENDIF
  207. IF MODE == 1
  208. mov DPTR, #Eep_Initialized_L
  209. mov A, #05Ah
  210. call write_eeprom_byte_from_acc
  211. mov DPTR, #Eep_Initialized_H
  212. mov A, #0A5h
  213. call write_eeprom_byte_from_acc
  214. ENDIF
  215. IF MODE == 2
  216. mov DPTR, #Eep_Initialized_L
  217. mov A, #055h
  218. call write_eeprom_byte_from_acc
  219. mov DPTR, #Eep_Initialized_H
  220. mov A, #0AAh
  221. call write_eeprom_byte_from_acc
  222. ENDIF
  223. ret
  224. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  225. ;
  226. ; Read all tags from flash and store in temporary storage
  227. ;
  228. ; No assumptions
  229. ;
  230. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  231. read_tags:
  232. mov Temp3, #48 ; Number of tags
  233. mov Temp2, #Tag_Temporary_Storage ; Set RAM address
  234. mov Temp1, #Bit_Access
  235. mov DPTR, #Eep_ESC_Layout ; Set flash address
  236. read_tag:
  237. call read_eeprom_byte
  238. mov A, Bit_Access
  239. mov @Temp2, A ; Write to RAM
  240. inc Temp2
  241. inc DPTR
  242. djnz Temp3, read_tag
  243. ret
  244. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  245. ;
  246. ; Write all tags from temporary storage and store in flash
  247. ;
  248. ; No assumptions
  249. ;
  250. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  251. write_tags:
  252. mov Temp3, #48 ; Number of tags
  253. mov Temp2, #Tag_Temporary_Storage ; Set RAM address
  254. mov DPTR, #Eep_ESC_Layout ; Set flash address
  255. write_tag:
  256. mov A, @Temp2 ; Read from RAM
  257. call write_eeprom_byte_from_acc
  258. inc Temp2
  259. inc DPTR
  260. djnz Temp3, write_tag
  261. ret
  262. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  263. ;
  264. ; Store new parameter value in ram routine
  265. ;
  266. ; No assumptions
  267. ;
  268. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  269. store_new_value_in_ram:
  270. mov Temp4, Tx_Pgm_Func_No ; Function no
  271. mov Temp1, Tx_Pgm_Paraval_No ; Parameter value no
  272. IF MODE == 0
  273. store_main_func_1:
  274. cjne Temp4, #1, store_main_func_2
  275. mov Temp2, #Pgm_Gov_P_Gain
  276. store_main_func_2:
  277. cjne Temp4, #2, store_main_func_3
  278. mov Temp2, #Pgm_Gov_I_Gain
  279. store_main_func_3:
  280. cjne Temp4, #3, store_main_func_4
  281. mov Temp2, #Pgm_Gov_Mode
  282. store_main_func_4:
  283. cjne Temp4, #4, store_main_func_5
  284. mov Temp2, #Pgm_Gov_Range
  285. store_main_func_5:
  286. cjne Temp4, #5, store_main_func_6
  287. mov Temp2, #Pgm_Low_Voltage_Lim
  288. store_main_func_6:
  289. cjne Temp4, #6, store_main_func_7
  290. mov Temp2, #Pgm_Startup_Pwr
  291. store_main_func_7:
  292. cjne Temp4, #7, store_main_func_8
  293. mov Temp2, #Pgm_Comm_Timing
  294. store_main_func_8:
  295. cjne Temp4, #8, store_main_func_9
  296. mov Temp2, #Pgm_Pwm_Freq
  297. store_main_func_9:
  298. cjne Temp4, #9, store_main_func_10
  299. mov Temp2, #Pgm_Demag_Comp
  300. store_main_func_10:
  301. cjne Temp4, #10, store_main_func_11
  302. mov Temp2, #Pgm_Direction
  303. store_main_func_11:
  304. cjne Temp4, #11, store_in_ram_exit
  305. mov Temp2, #Pgm_Input_Pol
  306. ENDIF
  307. IF MODE == 1
  308. store_tail_func_1:
  309. cjne Temp4, #1, store_tail_func_2
  310. mov Temp2, #Pgm_Motor_Gain
  311. store_tail_func_2:
  312. cjne Temp4, #2, store_tail_func_3
  313. mov Temp2, #Pgm_Motor_Idle
  314. store_tail_func_3:
  315. cjne Temp4, #3, store_tail_func_4
  316. mov Temp2, #Pgm_Startup_Pwr
  317. store_tail_func_4:
  318. cjne Temp4, #4, store_tail_func_5
  319. mov Temp2, #Pgm_Comm_Timing
  320. store_tail_func_5:
  321. cjne Temp4, #5, store_tail_func_6
  322. mov Temp2, #Pgm_Pwm_Freq
  323. store_tail_func_6:
  324. cjne Temp4, #6, store_tail_func_7
  325. mov Temp2, #Pgm_Pwm_Dither
  326. store_tail_func_7:
  327. cjne Temp4, #7, store_tail_func_8
  328. mov Temp2, #Pgm_Demag_Comp
  329. store_tail_func_8:
  330. cjne Temp4, #8, store_tail_func_9
  331. mov Temp2, #Pgm_Direction
  332. store_tail_func_9:
  333. cjne Temp4, #9, store_in_ram_exit
  334. mov Temp2, #Pgm_Input_Pol
  335. ENDIF
  336. IF MODE == 2
  337. store_multi_func_1:
  338. cjne Temp4, #1, store_multi_func_2
  339. mov Temp2, #Pgm_Gov_P_Gain
  340. store_multi_func_2:
  341. cjne Temp4, #2, store_multi_func_3
  342. mov Temp2, #Pgm_Gov_I_Gain
  343. store_multi_func_3:
  344. cjne Temp4, #3, store_multi_func_4
  345. mov Temp2, #Pgm_Gov_Mode
  346. store_multi_func_4:
  347. cjne Temp4, #4, store_multi_func_5
  348. mov Temp2, #Pgm_Motor_Gain
  349. store_multi_func_5:
  350. cjne Temp4, #5, store_multi_func_6
  351. mov Temp2, #Pgm_Startup_Pwr
  352. store_multi_func_6:
  353. cjne Temp4, #6, store_multi_func_7
  354. mov Temp2, #Pgm_Comm_Timing
  355. store_multi_func_7:
  356. cjne Temp4, #7, store_multi_func_8
  357. mov Temp2, #Pgm_Pwm_Freq
  358. store_multi_func_8:
  359. cjne Temp4, #8, store_multi_func_9
  360. mov Temp2, #Pgm_Pwm_Dither
  361. store_multi_func_9:
  362. cjne Temp4, #9, store_multi_func_10
  363. mov Temp2, #Pgm_Demag_Comp
  364. store_multi_func_10:
  365. cjne Temp4, #10, store_multi_func_11
  366. mov Temp2, #Pgm_Direction
  367. store_multi_func_11:
  368. cjne Temp4, #11, store_in_ram_exit
  369. mov Temp2, #Pgm_Input_Pol
  370. ENDIF
  371. store_in_ram_exit:
  372. mov A, Temp1
  373. mov @Temp2, A
  374. ret
  375. ;**;**** **** **** **** **** **** **** **** **** **** **** **** ****
  376. ;
  377. ; Wait 1 second routine
  378. ;
  379. ; No assumptions
  380. ;
  381. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  382. wait1s:
  383. mov Temp5, #5
  384. wait1s_loop:
  385. call wait200ms
  386. djnz Temp5, wait1s_loop
  387. ret
  388. ;**;**** **** **** **** **** **** **** **** **** **** **** **** ****
  389. ;
  390. ; Success beep routine
  391. ;
  392. ; No assumptions
  393. ;
  394. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  395. success_beep:
  396. clr EA ; Disable all interrupts
  397. call beep_f1
  398. call beep_f2
  399. call beep_f3
  400. call beep_f4
  401. call wait10ms
  402. call beep_f1
  403. call beep_f2
  404. call beep_f3
  405. call beep_f4
  406. call wait10ms
  407. call beep_f1
  408. call beep_f2
  409. call beep_f3
  410. call beep_f4
  411. setb EA ; Enable all interrupts
  412. ret
  413. ;**;**** **** **** **** **** **** **** **** **** **** **** **** ****
  414. ;
  415. ; Success beep inverted routine
  416. ;
  417. ; No assumptions
  418. ;
  419. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  420. success_beep_inverted:
  421. clr EA ; Disable all interrupts
  422. call beep_f4
  423. call beep_f3
  424. call beep_f2
  425. call beep_f1
  426. call wait10ms
  427. call beep_f4
  428. call beep_f3
  429. call beep_f2
  430. call beep_f1
  431. call wait10ms
  432. call beep_f4
  433. call beep_f3
  434. call beep_f2
  435. call beep_f1
  436. setb EA ; Enable all interrupts
  437. ret
  438. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  439. ;
  440. ; Function and parameter value beep routine
  441. ;
  442. ; No assumptions
  443. ;
  444. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  445. function_paraval_beep:
  446. mov Temp7, Tx_Pgm_Func_No ; Function no
  447. mov Temp8, Tx_Pgm_Paraval_No ; Parameter value no
  448. clr EA ; Disable all interrupts
  449. function_beep:
  450. call beep_f1
  451. call beep_f1
  452. call beep_f1
  453. call wait10ms
  454. djnz Temp7, function_beep
  455. paraval_beep:
  456. call beep_f4
  457. call wait10ms
  458. djnz Temp8, paraval_beep
  459. setb EA ; Enable all interrupts
  460. ret
  461. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  462. ;
  463. ; Program by TX routine
  464. ;
  465. ; No assumptions
  466. ;
  467. ;**** **** **** **** **** **** **** **** **** **** **** **** ****
  468. program_by_tx:
  469. ; Programming mode entry beeps
  470. call success_beep
  471. call wait1s
  472. call wait1s
  473. ; Start at function 1, parameter value 1
  474. mov Tx_Pgm_Func_No, #1
  475. paraval_no_entry:
  476. mov Tx_Pgm_Paraval_No, #1
  477. beep_no_entry:
  478. mov Tx_Pgm_Beep_No, #0
  479. func_paraval:
  480. call function_paraval_beep
  481. mov Temp5, #5 ; Wait is 5x 200ms
  482. func_paraval_wait:
  483. mov Temp6, New_Rcp ; Load RC pulse
  484. call wait200ms
  485. clr C
  486. mov A, Temp6
  487. subb A, New_Rcp ; Is RC pulse stable? (Avoid issues from 3in1 interference)
  488. jnz func_paraval_wait ; No - branch
  489. clr C
  490. mov A, New_Rcp ; Load new RC pulse value
  491. subb A, #RCP_STOP ; Below stop?
  492. jc func_paraval_store ; Yes - branch
  493. clr C
  494. mov A, New_Rcp ; Load new RC pulse value
  495. subb A, #RCP_MAX ; Below max?
  496. jc function_next ; Yes - branch
  497. ljmp func_paraval_cont_wait ; No - branch
  498. func_paraval_store:
  499. call store_new_value_in_ram ; Yes - store new value in RAM
  500. call erase_and_store_all_in_eeprom ; Store all values in EEPROM
  501. call success_beep ; Beep success
  502. clr EA ; Disable all interrupts
  503. IF ONE_S_CAPABLE == 0
  504. mov RSTSRC, #12h ; Generate hardware reset and set VDD monitor
  505. ELSE
  506. mov RSTSRC, #10h ; Generate hardware reset and disable VDD monitor
  507. ENDIF
  508. call wait1s
  509. func_paraval_cont_wait:
  510. djnz Temp5, func_paraval_wait
  511. inc Tx_Pgm_Beep_No ; Check number of beeps
  512. clr C
  513. mov A, Tx_Pgm_Beep_No
  514. subb A, #3 ; Three beeps done?
  515. jnc paraval_next ; Yes - Next parameter value
  516. jmp func_paraval ; No - go back
  517. paraval_next:
  518. call wait1s
  519. inc Tx_Pgm_Paraval_No ; Parameter value no
  520. IF MODE == 0
  521. mov A, Tx_Pgm_Func_No ; Decode number of parameters
  522. dec A
  523. mov DPTR, #TX_PGM_PARAMS_MAIN
  524. movc A, @A+DPTR
  525. mov Temp1, A
  526. ENDIF
  527. IF MODE == 1
  528. mov A, Tx_Pgm_Func_No ; Decode number of parameters
  529. dec A
  530. mov DPTR, #TX_PGM_PARAMS_TAIL
  531. movc A, @A+DPTR
  532. mov Temp1, A
  533. ENDIF
  534. IF MODE == 2
  535. mov A, Tx_Pgm_Func_No ; Decode number of parameters
  536. dec A
  537. mov DPTR, #TX_PGM_PARAMS_MULTI
  538. movc A, @A+DPTR
  539. mov Temp1, A
  540. ENDIF
  541. inc Temp1
  542. clr C
  543. mov A, Tx_Pgm_Paraval_No
  544. subb A, Temp1
  545. jnc function_next ; Last parameter value?
  546. jmp beep_no_entry ; No - go back
  547. function_next: ; Yes - Next function value
  548. call wait1s
  549. call wait1s
  550. inc Tx_Pgm_Func_No ; Function value no
  551. IF MODE == 0
  552. clr C
  553. mov A, Tx_Pgm_Func_No
  554. subb A, #12 ; Main has 11 functions
  555. ENDIF
  556. IF MODE == 1
  557. clr C
  558. mov A, Tx_Pgm_Func_No
  559. subb A, #10 ; Tail has 9 functions
  560. ENDIF
  561. IF MODE == 2
  562. clr C
  563. mov A, Tx_Pgm_Func_No
  564. subb A, #12 ; Multi has 11 functions
  565. ENDIF
  566. jnc program_by_tx_exit ; Last function value?
  567. jmp paraval_no_entry ; No - go back
  568. program_by_tx_exit:
  569. call set_default_parameters ; Load all defaults
  570. call erase_and_store_all_in_eeprom ; Erase flash and program
  571. clr EA ; Disable all interrupts
  572. IF ONE_S_CAPABLE == 0
  573. mov RSTSRC, #12h ; Generate hardware reset and set VDD monitor
  574. ELSE
  575. mov RSTSRC, #10h ; Generate hardware reset and disable VDD monitor
  576. ENDIF
  577. call wait1s