You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

416 lines
9.4 KiB

  1. ;**** **** **** **** ****
  2. ;
  3. ; BLHeli program for controlling brushless motors in helicopters and multirotors
  4. ;
  5. ; Copyright 2011, 2012 Steffen Skaug
  6. ; This program is distributed under the terms of the GNU General Public License
  7. ;
  8. ; This file is part of BLHeli.
  9. ;
  10. ; BLHeli is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; BLHeli is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
  22. ;
  23. ;**** **** **** **** ****
  24. ;
  25. ; Mystery 40A hardware definition file
  26. ;
  27. ; Notes:
  28. ; - Low side is slow to go on (~10us) in damped mode but fast to go off. Damped mode is safe but works poorly
  29. ;
  30. ;**** **** **** **** ****
  31. ;*********************
  32. ; Device Atmega8A
  33. ;*********************
  34. .INCLUDE "m8Adef.inc"
  35. ;**** **** **** **** ****
  36. ; Fuses must be set to external oscillator = 16Mhz
  37. ;**** **** **** **** ****
  38. ;**** **** **** **** ****
  39. ; Constant definitions
  40. ;**** **** **** **** ****
  41. .ESEG ; EEprom segment
  42. .ORG 0x40
  43. Eep_ESC_Layout: .DB "#Mystery_40A# " ; ESC layout tag
  44. .ORG 0x50
  45. Eep_ESC_MCU: .DB "#BLHELI#Am8A# " ; Project and MCU tag (16 Bytes)
  46. .EQU HIGH_BEC_VOLTAGE = 0 ; Set to 1 or more if high BEC voltage is supported
  47. .EQU DAMPED_MODE_ENABLE = 1 ; Set to 1 if fully damped mode is supported
  48. .EQU NFETON_DELAY = 7 ; Wait delay from pfets off to nfets on
  49. .EQU PFETON_DELAY = 9 ; Wait delay from nfets off to pfets on
  50. .EQU ADC_LIMIT_L = 116 ; 51k/220k divider. Power supply measurement ADC value for which motor power is limited (low byte)
  51. .EQU ADC_LIMIT_H = 0 ; 51k/220k divider. Power supply measurement ADC value for which motor power is limited (2 MSBs)
  52. .EQU TEMP_LIMIT = 161 ; 1k8/10kNTC. Temperature measurement ADC value for which main motor power is limited
  53. .EQU TEMP_LIMIT_STEP = 13 ; 1k8/10kNTC. Temperature measurement ADC value increment for which main motor power is further limited
  54. ;**** **** **** **** ****
  55. ; ESC specific defaults
  56. ;**** **** **** **** ****
  57. .EQU DEFAULT_PGM_MAIN_SPOOLUP_TIME = 10 ; Main motor spoolup time
  58. .EQU DEFAULT_PGM_MAIN_STARTUP_PWR = 9 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  59. .EQU DEFAULT_PGM_TAIL_STARTUP_PWR = 9 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  60. .EQU DEFAULT_PGM_MULTI_STARTUP_PWR = 9 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  61. ;*********************
  62. ; PORT D definitions *
  63. ;*********************
  64. ;.EQU = 7 ;i
  65. ;.EQU = 6 ;i
  66. .EQU CnFET = 5 ;o
  67. .EQU CpFET = 4 ;o
  68. ;.EQU = 3 ;i
  69. .EQU Rcp_In = 2 ;i
  70. ;.EQU = 1 ;i
  71. ;.EQU = 0 ;i
  72. .equ INIT_PD = 0x00
  73. .equ DIR_PD = (1<<CnFET)+(1<<CpFET)
  74. .MACRO Get_Rcp_Capture_Values
  75. in @0, TCNT1L
  76. in @1, TCNT1H
  77. .ENDMACRO
  78. .MACRO Read_Rcp_Int
  79. in @0, PIND
  80. sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity negative?
  81. com @0 ; Yes - invert
  82. .ENDMACRO
  83. .MACRO Get_Rcp_Int_Enable_State
  84. in @0, GICR ; Get int0 enable state (giving 0 is off, anything else is on)
  85. andi @0, (1<<INT0)
  86. .ENDMACRO
  87. .MACRO Rcp_Int_Enable
  88. ldi @0, (1<<INT0) ; Enable int0
  89. out GICR, @0
  90. .ENDMACRO
  91. .MACRO Rcp_Int_Disable
  92. ldi @0, 0 ; Disable int0
  93. out GICR, @0
  94. .ENDMACRO
  95. .MACRO Rcp_Int_First
  96. ldi @0, (1<<ISC01)+(1<<ISC00); Default - set next int0 to rising
  97. sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity negative?
  98. ldi @0, (1<<ISC01) ; Yes - set next int0 to falling
  99. out MCUCR, @0
  100. .ENDMACRO
  101. .MACRO Rcp_Int_Second
  102. ldi @0, (1<<ISC01) ; Default - set next int0 to falling
  103. sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity negative?
  104. ldi @0, (1<<ISC01)+(1<<ISC00); Yes - set next int0 to rising
  105. out MCUCR, @0
  106. .ENDMACRO
  107. .MACRO Rcp_Clear_Int_Flag
  108. clr @0
  109. sbr @0, (1<<INTF0) ; Clear ext0int flag
  110. out GIFR, @0
  111. .ENDMACRO
  112. .MACRO T0_Int_Disable
  113. in @0, TIMSK ; Disable timer0 interrupts
  114. cbr @0, (1<<TOIE0)
  115. out TIMSK, @0
  116. .ENDMACRO
  117. .MACRO T0_Int_Enable
  118. in @0, TIMSK ; Enable timer0 interrupts
  119. sbr @0, (1<<TOIE0)
  120. out TIMSK, @0
  121. .ENDMACRO
  122. .MACRO T1oca_Clear_Int_Flag
  123. ldi @0, (1<<OCF1A) ; Clear oc1a flag
  124. out TIFR, @0
  125. .ENDMACRO
  126. .MACRO T1oca_Int_Disable
  127. in @0, TIMSK ; Disable oc1a interrupts
  128. cbr @0, (1<<OCIE1A)
  129. out TIMSK, @0
  130. .ENDMACRO
  131. .MACRO T1oca_Int_Enable
  132. in @0, TIMSK ; Enable oc1a interrupts
  133. sbr @0, (1<<OCIE1A)
  134. out TIMSK, @0
  135. .ENDMACRO
  136. .MACRO T2_Clear_Int_Flag
  137. clr @0
  138. sbr @0, (1<<TOV2) ; Clear tov2 flag
  139. out TIFR, @0
  140. .ENDMACRO
  141. ;*********************
  142. ; PORT C definitions *
  143. ;*********************
  144. .EQU Mux_B = 7 ; i
  145. .EQU Mux_C = 6 ; i
  146. .EQU BpFET = 5 ; i
  147. .EQU BnFET = 4 ; i
  148. .EQU ApFET = 3 ; i
  149. .EQU Volt_Ip = 2 ; i
  150. .EQU Temp_Ip = 1 ; i
  151. .EQU Mux_A = 0 ; i
  152. .equ INIT_PC = 0x00
  153. .equ DIR_PC = (1<<BnFET)+(1<<BpFET)+(1<<ApFET)
  154. .MACRO AnFET_on
  155. sbi PORTB, AnFET
  156. .ENDMACRO
  157. .MACRO AnFET_off
  158. cbi PORTB, AnFET
  159. .ENDMACRO
  160. .MACRO BnFET_on
  161. sbi PORTC, BnFET
  162. .ENDMACRO
  163. .MACRO BnFET_off
  164. cbi PORTC, BnFET
  165. .ENDMACRO
  166. .MACRO CnFET_on
  167. sbi PORTD, CnFET
  168. .ENDMACRO
  169. .MACRO CnFET_off
  170. cbi PORTD, CnFET
  171. .ENDMACRO
  172. .MACRO All_nFETs_Off
  173. cbi PORTB, AnFET
  174. cbi PORTC, BnFET
  175. cbi PORTD, CnFET
  176. .ENDMACRO
  177. .MACRO ApFET_on
  178. sbi PORTC, ApFET
  179. .ENDMACRO
  180. .MACRO ApFET_off
  181. cbi PORTC, ApFET
  182. .ENDMACRO
  183. .MACRO BpFET_on
  184. sbi PORTC, BpFET
  185. .ENDMACRO
  186. .MACRO BpFET_off
  187. cbi PORTC, BpFET
  188. .ENDMACRO
  189. .MACRO CpFET_on
  190. sbi PORTD, CpFET
  191. .ENDMACRO
  192. .MACRO CpFET_off
  193. cbi PORTD, CpFET
  194. .ENDMACRO
  195. .MACRO All_pFETs_Off
  196. cbi PORTC, ApFET
  197. cbi PORTC, BpFET
  198. cbi PORTD, CpFET
  199. .ENDMACRO
  200. .MACRO Brake_FETs_On
  201. AnFET_on
  202. BnFET_on
  203. CnFET_on
  204. .ENDMACRO
  205. .MACRO Damping_FET_On
  206. lds @0, DampingFET
  207. sbrc @0, 0
  208. sbi PORTC, ApFET
  209. sbrc @0, 1
  210. sbi PORTC, BpFET
  211. sbrc @0, 2
  212. sbi PORTD, CpFET
  213. .ENDMACRO
  214. .MACRO Comp_Init
  215. in @0, SFIOR ; Toggle Analog Comparator Multiplexer Enable
  216. cbr @0, (1<<ACME)
  217. out SFIOR, @0
  218. Read_Comp_Out @0
  219. in @0, SFIOR
  220. sbr @0, (1<<ACME)
  221. out SFIOR, @0
  222. .ENDMACRO
  223. .MACRO Set_Comp_Phase_A
  224. ldi @0, Mux_A ; Set comparator multiplexer to phase A
  225. out ADMUX, @0
  226. .ENDMACRO
  227. .MACRO Set_Comp_Phase_B
  228. ldi @0, Mux_B ; Set comparator multiplexer to phase B
  229. out ADMUX, @0
  230. .ENDMACRO
  231. .MACRO Set_Comp_Phase_C
  232. ldi @0, Mux_C ; Set comparator multiplexer to phase C
  233. out ADMUX, @0
  234. .ENDMACRO
  235. .MACRO Read_Comp_Out
  236. in @0, ACSR ; Read comparator output
  237. .ENDMACRO
  238. ;*********************
  239. ; PORT B definitions *
  240. ;*********************
  241. ;.EQU = 7 ; i
  242. ;.EQU = 6 ; i
  243. ;.EQU = 5 ; i
  244. .EQU DebugPin = 4 ; o
  245. ;.EQU = 3 ; i
  246. ;.EQU = 2 ; i
  247. ;.EQU = 1 ; i
  248. .EQU AnFET = 0 ; o
  249. .EQU INIT_PB = 0x00
  250. .EQU DIR_PB = (1<<AnFET)+(1<<DebugPin)
  251. ;**********************
  252. ; MCU specific macros *
  253. ;**********************
  254. .MACRO Interrupt_Table_Definition
  255. rjmp reset
  256. rjmp rcp_int ; ext_int0
  257. nop ; ext_int1
  258. nop ; t2oc_int
  259. rjmp t2_int ; t2ovfl_int
  260. nop ; icp1_int
  261. rjmp t1oca_int ; t1oca_int
  262. nop ; t1ocb_int
  263. nop ; t1ovfl_int
  264. rjmp t0_int ; t0ovfl_int
  265. nop ; spi_int
  266. nop ; urxc
  267. nop ; udre
  268. nop ; utxc
  269. ; nop ; adc_int
  270. ; nop ; eep_int
  271. ; nop ; aci_int
  272. ; nop ; wire2_int
  273. ; nop ; spmc_int
  274. .ENDMACRO
  275. .MACRO Disable_Watchdog
  276. cli ; Disable interrupts
  277. wdr ; Reset watchdog timer
  278. in @0, WDTCR ; Write logical one to WDCE and WDE
  279. ori @0, (1<<WDCE)|(1<<WDE)
  280. out WDTCR, @0
  281. ldi @0, (0<<WDE) ; Turn off WDT
  282. out WDTCR, @0
  283. .ENDMACRO
  284. .MACRO Enable_Watchdog
  285. ldi @0, (1<<WDE) ; Turn on WDT
  286. out WDTCR, @0
  287. .ENDMACRO
  288. .MACRO Initialize_MCU
  289. .ENDMACRO
  290. .MACRO Initialize_Interrupts
  291. ldi @0, (1<<TOIE0)+(1<<OCIE1A)+(1<<TOIE2)
  292. out TIFR, @0 ; Clear interrupts
  293. out TIMSK, @0 ; Enable interrupts
  294. .ENDMACRO
  295. .MACRO Initialize_Adc
  296. in @0, ADCSRA ; Set ADCSRA register (1MHz clock)
  297. sbr @0, (1<<ADPS2)
  298. out ADCSRA, @0
  299. .ENDMACRO
  300. .MACRO Set_Adc_Ip_Volt
  301. cbr Flags1, (1<<ADC_READ_TEMP)
  302. .ENDMACRO
  303. .MACRO Set_Adc_Ip_Temp
  304. sbr Flags1, (1<<ADC_READ_TEMP)
  305. .ENDMACRO
  306. .MACRO Start_Adc
  307. ldi @0, Volt_Ip
  308. sbrc Flags1, ADC_READ_TEMP
  309. ldi @0, Temp_Ip
  310. out ADMUX, @0 ; Set ADMUX register (5V reference, selected input)
  311. in @0, ADCSRA
  312. sbr @0, (1<<ADEN) ; Enable ADC
  313. sbr @0, (1<<ADSC) ; Start ADC conversion
  314. out ADCSRA, @0
  315. .ENDMACRO
  316. .MACRO Get_Adc_Status
  317. in @0, ADCSRA
  318. .ENDMACRO
  319. .MACRO Read_Adc_Result
  320. in @0, ADCL
  321. in @1, ADCH
  322. .ENDMACRO
  323. .MACRO Stop_Adc
  324. in @0, ADCSRA
  325. cbr @0, (1<<ADEN) ; Disable ADC
  326. out ADCSRA, @0
  327. .ENDMACRO
  328. .MACRO Set_Timer0_CS0
  329. out TCCR0, @0
  330. .ENDMACRO
  331. .MACRO Set_Timer1_CS1
  332. out TCCR1B, @0
  333. .ENDMACRO
  334. .MACRO Set_Timer2_CS2
  335. out TCCR2, @0
  336. .ENDMACRO
  337. .MACRO Read_TCNT1L
  338. in @0, TCNT1L
  339. .ENDMACRO
  340. .MACRO Read_TCNT1H
  341. in @0, TCNT1H
  342. .ENDMACRO
  343. .MACRO Set_OCR1AL
  344. out OCR1AL, @0
  345. .ENDMACRO
  346. .MACRO Set_OCR1AH
  347. out OCR1AH, @0
  348. .ENDMACRO
  349. .MACRO Read_TCNT2
  350. in @0, TCNT2
  351. .ENDMACRO
  352. .MACRO Set_TCNT2
  353. out TCNT2, @0
  354. .ENDMACRO
  355. .MACRO Check_Eeprom_Ready
  356. sbic EECR, EEWE
  357. .ENDMACRO
  358. .MACRO Set_Eeprom_Address
  359. out EEARL, @0
  360. out EEARH, @1
  361. .ENDMACRO
  362. .MACRO Start_Eeprom_Write
  363. sbi EECR, EEMWE
  364. sbi EECR, EEWE
  365. .ENDMACRO
  366. .MACRO Prepare_Lock_Or_Fuse_Read
  367. ldi @0, ((1<<BLBSET)+(1<<SPMEN))
  368. out SPMCR, @0
  369. .ENDMACRO
  370. .MACRO xcall
  371. rcall @0
  372. .ENDMACRO
  373. .MACRO Set_RPM_Out
  374. sbi PORTB, DebugPin
  375. .ENDMACRO
  376. .MACRO Clear_RPM_Out
  377. cbi PORTB, DebugPin
  378. .ENDMACRO