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  1. ;**** **** **** **** ****
  2. ;
  3. ; BLHeli program for controlling brushless motors in helicopters and multirotors
  4. ;
  5. ; Copyright 2011, 2012 Steffen Skaug
  6. ; This program is distributed under the terms of the GNU General Public License
  7. ;
  8. ; This file is part of BLHeli.
  9. ;
  10. ; BLHeli is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; BLHeli is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
  22. ;
  23. ;**** **** **** **** ****
  24. ;
  25. ; Multistar 40Av2 hardware definition file
  26. ;
  27. ; Notes: None
  28. ;
  29. ;**** **** **** **** ****
  30. ;*********************
  31. ; Device Atmega8A
  32. ;*********************
  33. .INCLUDE "m8Adef.inc"
  34. ;**** **** **** **** ****
  35. ; Fuses must be set to external oscillator = 16Mhz
  36. ;**** **** **** **** ****
  37. ;**** **** **** **** ****
  38. ; Constant definitions
  39. ;**** **** **** **** ****
  40. .ESEG ; EEprom segment
  41. .ORG 0x40
  42. Eep_ESC_Layout: .DB "#MStar_40Av2# " ; ESC layout tag
  43. .ORG 0x50
  44. Eep_ESC_MCU: .DB "#BLHELI#Am8A# " ; Project and MCU tag (16 Bytes)
  45. .EQU HIGH_BEC_VOLTAGE = 0 ; Set to 1 or more if high BEC voltage is supported
  46. .EQU DAMPED_MODE_ENABLE = 1 ; Set to 1 if fully damped mode is supported
  47. .EQU NFETON_DELAY = 7 ; Wait delay from pfets off to nfets on
  48. .EQU PFETON_DELAY = 9 ; Wait delay from nfets off to pfets on
  49. .EQU ADC_LIMIT_L = 52 ; 2k/47k divider with empirical correction. Power supply measurement ADC value for which motor power is limited (low byte)
  50. .EQU ADC_LIMIT_H = 0 ; 2k/47k divider with empirical correction. Power supply measurement ADC value for which motor power is limited (2 MSBs)
  51. .EQU TEMP_LIMIT = 0 ; No sensor. Temperature measurement ADC value for which main motor power is limited
  52. .EQU TEMP_LIMIT_STEP = 0 ; No sensor. Temperature measurement ADC value increment for which main motor power is further limited
  53. ;**** **** **** **** ****
  54. ; ESC specific defaults
  55. ;**** **** **** **** ****
  56. .EQU DEFAULT_PGM_MAIN_SPOOLUP_TIME = 10 ; Main motor spoolup time
  57. .EQU DEFAULT_PGM_MAIN_STARTUP_PWR = 9 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  58. .EQU DEFAULT_PGM_TAIL_STARTUP_PWR = 9 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  59. .EQU DEFAULT_PGM_MULTI_STARTUP_PWR = 9 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  60. ;*********************
  61. ; PORT D definitions *
  62. ;*********************
  63. .EQU CpFET = 7 ;o
  64. ;.EQU = 6 ;i
  65. .EQU CnFET = 5 ;o
  66. .EQU BnFET = 4 ;o
  67. .EQU BpFET = 3 ;o
  68. .EQU Rcp_In = 2 ;i
  69. .EQU ApFET = 1 ;o
  70. .EQU AnFET = 0 ;o
  71. .equ INIT_PD = (1<<AnFET)+(1<<BnFET)+(1<<CnFET)
  72. .equ DIR_PD = (1<<AnFET)+(1<<BnFET)+(1<<CnFET)+(1<<ApFET)+(1<<BpFET)+(1<<CpFET)
  73. .MACRO Get_Rcp_Capture_Values
  74. in @0, TCNT1L
  75. in @1, TCNT1H
  76. .ENDMACRO
  77. .MACRO Read_Rcp_Int
  78. in @0, PIND
  79. sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity positive?
  80. com @0 ; Yes - invert
  81. .ENDMACRO
  82. .MACRO Get_Rcp_Int_Enable_State
  83. in @0, GICR ; Get int0 enable state (giving 0 is off, anything else is on)
  84. andi @0, (1<<INT0)
  85. .ENDMACRO
  86. .MACRO Rcp_Int_Enable
  87. ldi @0, (1<<INT0) ; Enable int0
  88. out GICR, @0
  89. .ENDMACRO
  90. .MACRO Rcp_Int_Disable
  91. ldi @0, 0 ; Disable int0
  92. out GICR, @0
  93. .ENDMACRO
  94. .MACRO Rcp_Int_First
  95. ldi @0, (1<<ISC01)+(1<<ISC00); Default - set next int0 to rising
  96. sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity positive?
  97. ldi @0, (1<<ISC01) ; Yes - set next int0 to falling
  98. out MCUCR, @0
  99. .ENDMACRO
  100. .MACRO Rcp_Int_Second
  101. ldi @0, (1<<ISC01) ; Default - set next int0 to falling
  102. sbrc Flags3, PGM_RCP_PWM_POL ; Is pwm polarity positive?
  103. ldi @0, (1<<ISC01)+(1<<ISC00); Yes - set next int0 to rising
  104. out MCUCR, @0
  105. .ENDMACRO
  106. .MACRO Rcp_Clear_Int_Flag
  107. clr @0
  108. sbr @0, (1<<INTF0) ; Clear ext0int flag
  109. out GIFR, @0
  110. .ENDMACRO
  111. .MACRO T0_Int_Disable
  112. in @0, TIMSK ; Disable timer0 interrupts
  113. cbr @0, (1<<TOIE0)
  114. out TIMSK, @0
  115. .ENDMACRO
  116. .MACRO T0_Int_Enable
  117. in @0, TIMSK ; Enable timer0 interrupts
  118. sbr @0, (1<<TOIE0)
  119. out TIMSK, @0
  120. .ENDMACRO
  121. .MACRO T1oca_Clear_Int_Flag
  122. ldi @0, (1<<OCF1A) ; Clear oc1a flag
  123. out TIFR, @0
  124. .ENDMACRO
  125. .MACRO T1oca_Int_Disable
  126. in @0, TIMSK ; Disable oc1a interrupts
  127. cbr @0, (1<<OCIE1A)
  128. out TIMSK, @0
  129. .ENDMACRO
  130. .MACRO T1oca_Int_Enable
  131. in @0, TIMSK ; Enable oc1a interrupts
  132. sbr @0, (1<<OCIE1A)
  133. out TIMSK, @0
  134. .ENDMACRO
  135. .MACRO T2_Clear_Int_Flag
  136. clr @0
  137. sbr @0, (1<<TOV2) ; Clear tov2 flag
  138. out TIFR, @0
  139. .ENDMACRO
  140. ;*********************
  141. ; PORT C definitions *
  142. ;*********************
  143. .EQU Volt_Ip = 7 ; i
  144. ;.EQU = 6 ; i
  145. ;.EQU = 5 ; i
  146. .EQU Mux_A = 4 ; i
  147. .EQU Mux_B = 3 ; i
  148. .EQU Mux_C = 2 ; i
  149. ;.EQU = 1 ; i
  150. ;.EQU = 0 ; i
  151. .equ INIT_PC = 0x00
  152. .equ DIR_PC = 0x00
  153. .MACRO AnFET_on
  154. cbi PORTD, AnFET
  155. .ENDMACRO
  156. .MACRO AnFET_off
  157. sbi PORTD, AnFET
  158. .ENDMACRO
  159. .MACRO BnFET_on
  160. cbi PORTD, BnFET
  161. .ENDMACRO
  162. .MACRO BnFET_off
  163. sbi PORTD, BnFET
  164. .ENDMACRO
  165. .MACRO CnFET_on
  166. cbi PORTD, CnFET
  167. .ENDMACRO
  168. .MACRO CnFET_off
  169. sbi PORTD, CnFET
  170. .ENDMACRO
  171. .MACRO All_nFETs_Off
  172. sbi PORTD, AnFET
  173. sbi PORTD, BnFET
  174. sbi PORTD, CnFET
  175. .ENDMACRO
  176. .MACRO ApFET_on
  177. sbi PORTD, ApFET
  178. .ENDMACRO
  179. .MACRO ApFET_off
  180. cbi PORTD, ApFET
  181. .ENDMACRO
  182. .MACRO BpFET_on
  183. sbi PORTD, BpFET
  184. .ENDMACRO
  185. .MACRO BpFET_off
  186. cbi PORTD, BpFET
  187. .ENDMACRO
  188. .MACRO CpFET_on
  189. sbi PORTD, CpFET
  190. .ENDMACRO
  191. .MACRO CpFET_off
  192. cbi PORTD, CpFET
  193. .ENDMACRO
  194. .MACRO All_pFETs_Off
  195. cbi PORTD, ApFET
  196. cbi PORTD, BpFET
  197. cbi PORTD, CpFET
  198. .ENDMACRO
  199. .MACRO Brake_FETs_On
  200. AnFET_on
  201. BnFET_on
  202. CnFET_on
  203. .ENDMACRO
  204. .MACRO Damping_FET_On
  205. lds @0, DampingFET
  206. sbrc @0, 0
  207. sbi PORTD, ApFET
  208. sbrc @0, 1
  209. sbi PORTD, BpFET
  210. sbrc @0, 2
  211. sbi PORTD, CpFET
  212. .ENDMACRO
  213. .MACRO Comp_Init
  214. in @0, SFIOR ; Toggle Analog Comparator Multiplexer Enable
  215. cbr @0, (1<<ACME)
  216. out SFIOR, @0
  217. Read_Comp_Out @0
  218. in @0, SFIOR
  219. sbr @0, (1<<ACME)
  220. out SFIOR, @0
  221. .ENDMACRO
  222. .MACRO Set_Comp_Phase_A
  223. ldi @0, Mux_A ; Set comparator multiplexer to phase A
  224. ori @0, (1<<REFS1)+(1<<REFS0)
  225. out ADMUX, @0
  226. .ENDMACRO
  227. .MACRO Set_Comp_Phase_B
  228. ldi @0, Mux_B ; Set comparator multiplexer to phase B
  229. ori @0, (1<<REFS1)+(1<<REFS0)
  230. out ADMUX, @0
  231. .ENDMACRO
  232. .MACRO Set_Comp_Phase_C
  233. ldi @0, Mux_C ; Set comparator multiplexer to phase C
  234. ori @0, (1<<REFS1)+(1<<REFS0)
  235. out ADMUX, @0
  236. .ENDMACRO
  237. .MACRO Read_Comp_Out
  238. in @0, ACSR ; Read comparator output
  239. .ENDMACRO
  240. ;*********************
  241. ; PORT B definitions *
  242. ;*********************
  243. ;.EQU = 7 ; i
  244. ;.EQU = 6 ; i
  245. ;.EQU = 5 ; i
  246. .EQU DebugPin = 4 ; o
  247. ;.EQU = 3 ; i
  248. .EQU NfetPullup = 2 ; 0
  249. ;.EQU = 1 ; i
  250. ;.EQU = 0 ; i
  251. .EQU INIT_PB = (1<<NfetPullup)
  252. .EQU DIR_PB = (1<<DebugPin)+(1<<NfetPullup)
  253. ;**********************
  254. ; MCU specific macros *
  255. ;**********************
  256. .MACRO Interrupt_Table_Definition
  257. rjmp reset
  258. rjmp rcp_int ; ext_int0
  259. nop ; ext_int1
  260. nop ; t2oc_int
  261. rjmp t2_int ; t2ovfl_int
  262. nop ; icp1_int
  263. rjmp t1oca_int ; t1oca_int
  264. nop ; t1ocb_int
  265. nop ; t1ovfl_int
  266. rjmp t0_int ; t0ovfl_int
  267. nop ; spi_int
  268. nop ; urxc
  269. nop ; udre
  270. nop ; utxc
  271. ; nop ; adc_int
  272. ; nop ; eep_int
  273. ; nop ; aci_int
  274. ; nop ; wire2_int
  275. ; nop ; spmc_int
  276. .ENDMACRO
  277. .MACRO Disable_Watchdog
  278. cli ; Disable interrupts
  279. wdr ; Reset watchdog timer
  280. in @0, WDTCR ; Write logical one to WDCE and WDE
  281. ori @0, (1<<WDCE)|(1<<WDE)
  282. out WDTCR, @0
  283. ldi @0, (0<<WDE) ; Turn off WDT
  284. out WDTCR, @0
  285. .ENDMACRO
  286. .MACRO Enable_Watchdog
  287. ldi @0, (1<<WDE) ; Turn on WDT
  288. out WDTCR, @0
  289. .ENDMACRO
  290. .MACRO Initialize_MCU
  291. .ENDMACRO
  292. .MACRO Initialize_Interrupts
  293. ldi @0, (1<<TOIE0)+(1<<OCIE1A)+(1<<TOIE2)
  294. out TIFR, @0 ; Clear interrupts
  295. out TIMSK, @0 ; Enable interrupts
  296. .ENDMACRO
  297. .MACRO Initialize_Adc
  298. ldi @0, Volt_Ip
  299. ori @0, (1<<REFS1)+(1<<REFS0)
  300. out ADMUX, @0 ; Set ADMUX register
  301. in @0, ADCSRA ; Set ADCSRA register (1MHz clock)
  302. sbr @0, (1<<ADPS2)
  303. sbr @0, (1<<ADEN) ; Enable ADC
  304. out ADCSRA, @0
  305. .ENDMACRO
  306. .MACRO Set_Adc_Ip_Volt
  307. cbr Flags1, (1<<ADC_READ_TEMP)
  308. .ENDMACRO
  309. .MACRO Set_Adc_Ip_Temp
  310. sbr Flags1, (1<<ADC_READ_TEMP)
  311. .ENDMACRO
  312. .MACRO Start_Adc
  313. ldi @0, Volt_Ip
  314. sbrc Flags1, ADC_READ_TEMP
  315. ldi @0, Volt_Ip ; No temp sensor
  316. ori @0, (1<<REFS1)+(1<<REFS0)
  317. out ADMUX, @0 ; Set ADMUX register (2.56V reference, selected input)
  318. in @0, ADCSRA
  319. sbr @0, (1<<ADEN) ; Enable ADC
  320. sbr @0, (1<<ADSC) ; Start ADC conversion
  321. out ADCSRA, @0
  322. .ENDMACRO
  323. .MACRO Get_Adc_Status
  324. in @0, ADCSRA
  325. .ENDMACRO
  326. .MACRO Read_Adc_Result
  327. in @0, ADCL
  328. in @1, ADCH
  329. .ENDMACRO
  330. .MACRO Stop_Adc
  331. in @0, ADCSRA
  332. cbr @0, (1<<ADEN) ; Disable ADC
  333. out ADCSRA, @0
  334. .ENDMACRO
  335. .MACRO Set_Timer0_CS0
  336. out TCCR0, @0
  337. .ENDMACRO
  338. .MACRO Set_Timer1_CS1
  339. out TCCR1B, @0
  340. .ENDMACRO
  341. .MACRO Set_Timer2_CS2
  342. out TCCR2, @0
  343. .ENDMACRO
  344. .MACRO Read_TCNT1L
  345. in @0, TCNT1L
  346. .ENDMACRO
  347. .MACRO Read_TCNT1H
  348. in @0, TCNT1H
  349. .ENDMACRO
  350. .MACRO Set_OCR1AL
  351. out OCR1AL, @0
  352. .ENDMACRO
  353. .MACRO Set_OCR1AH
  354. out OCR1AH, @0
  355. .ENDMACRO
  356. .MACRO Read_TCNT2
  357. in @0, TCNT2
  358. .ENDMACRO
  359. .MACRO Set_TCNT2
  360. out TCNT2, @0
  361. .ENDMACRO
  362. .MACRO Check_Eeprom_Ready
  363. sbic EECR, EEWE
  364. .ENDMACRO
  365. .MACRO Set_Eeprom_Address
  366. out EEARL, @0
  367. out EEARH, @1
  368. .ENDMACRO
  369. .MACRO Start_Eeprom_Write
  370. sbi EECR, EEMWE
  371. sbi EECR, EEWE
  372. .ENDMACRO
  373. .MACRO Prepare_Lock_Or_Fuse_Read
  374. ldi @0, ((1<<BLBSET)+(1<<SPMEN))
  375. out SPMCR, @0
  376. .ENDMACRO
  377. .MACRO xcall
  378. rcall @0
  379. .ENDMACRO
  380. .MACRO Set_RPM_Out
  381. .ENDMACRO
  382. .MACRO Clear_RPM_Out
  383. .ENDMACRO