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  1. ;**** **** **** **** ****
  2. ;
  3. ; BLHeli program for controlling brushless motors in helicopters and multirotors
  4. ;
  5. ; Copyright 2011, 2012 Steffen Skaug
  6. ; This program is distributed under the terms of the GNU General Public License
  7. ;
  8. ; This file is part of BLHeli.
  9. ;
  10. ; BLHeli is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; BLHeli is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
  22. ;
  23. ;**** **** **** **** ****
  24. ;
  25. ; EAZY 3A v2 hardware definition file
  26. ; Layout is similar to XP 3A but different voltage divider at Adc_Ip
  27. ; XP3A.inc file mod by 4712
  28. ;
  29. ;**** **** **** **** ****
  30. ;*********************
  31. ; Device SiLabs F330
  32. ;*********************
  33. $include (c8051f330.inc)
  34. ;**** **** **** **** ****
  35. ; Uses internal calibrated oscillator set to 24Mhz
  36. ;**** **** **** **** ****
  37. ;**** **** **** **** ****
  38. ; Constant definitions
  39. ;**** **** **** **** ****
  40. CSEG AT 1A40h
  41. Eep_ESC_Layout: DB "#EAZY3Av2# " ; ESC layout tag
  42. CSEG AT 1A50h
  43. Eep_ESC_MCU: DB "#BLHELI#F330# " ; Project and MCU tag (16 Bytes)
  44. MCU_48MHZ EQU 0 ; Set to 1 if MCU can run at 48MHz
  45. ONE_S_CAPABLE EQU 1 ; Set to 1 if ESC can operate at 1S
  46. PORT3_EXIST EQU 0 ; Set to 1 if MCU has port3
  47. COMP1_USED EQU 0 ; Set to 1 if MCU has comparator 1 and it is being used
  48. LOCK_BYTE_ADDRESS_16K EQU 3FFFh ; Address of lock byte if 16k flash size
  49. LOCK_BYTE_ADDRESS_8K EQU 1DFFh ; Address of lock byte if 8k flash size
  50. HIGH_BEC_VOLTAGE EQU 0 ; Set to 1 or more if high BEC voltage is supported
  51. DAMPED_MODE_ENABLE EQU 1 ; Damped mode enabled
  52. NFETON_DELAY EQU 5 ; Wait delay from pfets off to nfets on
  53. PFETON_DELAY EQU 1 ; Wait delay from nfets off to pfets on
  54. ADC_LIMIT_L EQU 236 ; Power supply measurement ADC value for which main motor power is limited (low byte)
  55. ADC_LIMIT_H EQU 1 ; Power supply measurement ADC value for which main motor power is limited (2 MSBs)
  56. TEMP_LIMIT EQU 246 ; Temperature measurement ADC value for which main motor power is limited (low byte, assuming high byte is 1)
  57. TEMP_LIMIT_STEP EQU 6 ; Temperature measurement ADC value increment for which main motor power is further limited
  58. ;**** **** **** **** ****
  59. ; ESC specific defaults
  60. ;**** **** **** **** ****
  61. DEFAULT_PGM_MAIN_SPOOLUP_TIME EQU 7 ; Main motor spoolup time
  62. DEFAULT_PGM_MAIN_STARTUP_PWR EQU 11 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  63. DEFAULT_PGM_TAIL_STARTUP_PWR EQU 11 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  64. DEFAULT_PGM_MULTI_STARTUP_PWR EQU 11 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  65. ;**** **** **** **** ****
  66. ; Bootloader definitions
  67. ;**** **** **** **** ****
  68. RTX_PORT EQU P0 ; Receive/Transmit port
  69. RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL
  70. RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL
  71. RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP
  72. RTX_PIN EQU 7 ; RTX pin
  73. SIGNATURE_001 EQU 0f3h ; Device signature
  74. SIGNATURE_002 EQU 030h
  75. ;*********************
  76. ; PORT 0 definitions *
  77. ;*********************
  78. Rcp_In EQU 7 ;i
  79. Adc_Ip EQU 6 ;i
  80. Mux_A EQU 5 ;i
  81. ; EQU 4 ;i
  82. Mux_B EQU 3 ;i
  83. Comp_Com EQU 2 ;i
  84. Mux_C EQU 1 ;i
  85. Vref EQU 0 ;i
  86. P0_DIGITAL EQU NOT((1 SHL Mux_A)+(1 SHL Mux_B)+(1 SHL Mux_C)+(1 SHL Comp_Com)+(1 SHL Adc_Ip)+(1 SHL Vref))
  87. P0_INIT EQU 0FFh
  88. P0_PUSHPULL EQU 0
  89. P0_SKIP EQU NOT(1 SHL Rcp_In) AND 0FFh
  90. MACRO Get_Rcp_Capture_Values
  91. mov Temp1, PCA0CPL0 ; Get PCA capture values
  92. mov Temp2, PCA0CPH0
  93. ENDM
  94. MACRO Read_Rcp_Int
  95. mov A, P0
  96. jnb Flags3.PGM_RCP_PWM_POL, ($+4) ; Is pwm polarity negative?
  97. cpl A ; Yes - invert
  98. ENDM
  99. MACRO Rcp_Int_Enable
  100. orl PCA0CPM0, #01h ; Interrupt enabled
  101. ENDM
  102. MACRO Rcp_Int_Disable
  103. anl PCA0CPM0, #0FEh ; Interrupt disabled
  104. ENDM
  105. MACRO Rcp_Int_First
  106. anl PCA0CPM0, #0CFh
  107. jb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity positive?
  108. orl PCA0CPM0, #20h ; Capture rising edge
  109. jnb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity negative?
  110. orl PCA0CPM0, #10h ; Capture falling edge
  111. ENDM
  112. MACRO Rcp_Int_Second
  113. anl PCA0CPM0, #0CFh
  114. jb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity positive?
  115. orl PCA0CPM0, #10h ; Capture falling edge
  116. jnb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity negative?
  117. orl PCA0CPM0, #20h ; Capture rising edge
  118. ENDM
  119. MACRO Rcp_Clear_Int_Flag
  120. clr CCF0 ; Clear interrupt flag
  121. ENDM
  122. ;*********************
  123. ; PORT 1 definitions *
  124. ;*********************
  125. ; EQU 7 ;i
  126. ; EQU 6 ;i
  127. CpFET EQU 5 ;o
  128. BpFET EQU 4 ;o
  129. ApFET EQU 3 ;o
  130. CnFET EQU 2 ;o
  131. BnFET EQU 1 ;o
  132. AnFET EQU 0 ;o
  133. P1_DIGITAL EQU (1 SHL AnFET)+(1 SHL BnFET)+(1 SHL CnFET)+(1 SHL ApFET)+(1 SHL BpFET)+(1 SHL CpFET)
  134. P1_INIT EQU (1 SHL ApFET)+(1 SHL BpFET)+(1 SHL CpFET) ; Setting pFET outputs turn them off
  135. P1_PUSHPULL EQU (1 SHL AnFET)+(1 SHL BnFET)+(1 SHL CnFET)+(1 SHL ApFET)+(1 SHL BpFET)+(1 SHL CpFET)
  136. P1_SKIP EQU 0
  137. MACRO AnFET_on
  138. setb P1.AnFET
  139. ENDM
  140. MACRO AnFET_off
  141. clr P1.AnFET
  142. ENDM
  143. MACRO BnFET_on
  144. setb P1.BnFET
  145. ENDM
  146. MACRO BnFET_off
  147. clr P1.BnFET
  148. ENDM
  149. MACRO CnFET_on
  150. setb P1.CnFET
  151. ENDM
  152. MACRO CnFET_off
  153. clr P1.CnFET
  154. ENDM
  155. MACRO All_nFETs_Off
  156. clr P1.AnFET
  157. clr P1.BnFET
  158. clr P1.CnFET
  159. ENDM
  160. MACRO ApFET_on
  161. clr P1.ApFET
  162. ENDM
  163. MACRO ApFET_off
  164. setb P1.ApFET
  165. ENDM
  166. MACRO BpFET_on
  167. clr P1.BpFET
  168. ENDM
  169. MACRO BpFET_off
  170. setb P1.BpFET
  171. ENDM
  172. MACRO CpFET_on
  173. clr P1.CpFET
  174. ENDM
  175. MACRO CpFET_off
  176. setb P1.CpFET
  177. ENDM
  178. MACRO All_pFETs_Off
  179. setb P1.ApFET
  180. setb P1.BpFET
  181. setb P1.CpFET
  182. ENDM
  183. MACRO Brake_FETs_On
  184. AnFET_on
  185. BnFET_on
  186. CnFET_on
  187. ENDM
  188. MACRO Damping_FET_On
  189. mov A, DampingFET
  190. cpl A
  191. anl P1, A
  192. ENDM
  193. MACRO Set_Comp_Phase_A
  194. mov CPT0MX, #21h ; Set comparator multiplexer to phase A
  195. ENDM
  196. MACRO Set_Comp_Phase_B
  197. mov CPT0MX, #11h ; Set comparator multiplexer to phase B
  198. ENDM
  199. MACRO Set_Comp_Phase_C
  200. mov CPT0MX, #01h ; Set comparator multiplexer to phase C
  201. ENDM
  202. MACRO Read_Comp_Out
  203. mov A, CPT0CN ; Read comparator output
  204. cpl A ; Invert output
  205. ENDM
  206. ;*********************
  207. ; PORT 2 definitions *
  208. ;*********************
  209. DebugPin EQU 0 ;o
  210. P2_PUSHPULL EQU (1 SHL DebugPin)
  211. ;**********************
  212. ; MCU specific macros *
  213. ;**********************
  214. MACRO Interrupt_Table_Definition
  215. CSEG AT 0 ; Code segment start
  216. jmp reset
  217. CSEG AT 0Bh ; Timer0 interrupt
  218. jmp t0_int
  219. CSEG AT 2Bh ; Timer2 interrupt
  220. jmp t2_int
  221. CSEG AT 5Bh ; PCA interrupt
  222. jmp pca_int
  223. CSEG AT 73h ; Timer3 interrupt
  224. jmp t3_int
  225. ENDM
  226. MACRO Initialize_Xbar
  227. mov XBR1, #41h ; Xbar enabled, CEX0 routed to pin Rcp_In
  228. ENDM
  229. MACRO Initialize_Adc
  230. mov REF0CN, #07h ; Enable temp sensor, bias and reference buffer
  231. mov ADC0CF, #58h ; ADC clock 2MHz
  232. mov AMX0P, #Adc_Ip ; Select positive input
  233. mov AMX0N, #11h ; Select negative input as ground
  234. mov ADC0CN, #80h ; ADC enabled
  235. ENDM
  236. MACRO Set_Adc_Ip_Volt
  237. mov AMX0P, #Adc_Ip ; Select positive input
  238. ENDM
  239. MACRO Set_Adc_Ip_Temp
  240. mov AMX0P, #10h ; Select temp sensor input
  241. ENDM
  242. MACRO Start_Adc
  243. mov ADC0CN, #90h ; ADC start
  244. ENDM
  245. MACRO Read_Adc_Result
  246. mov Temp1, ADC0L
  247. mov Temp2, ADC0H
  248. ENDM
  249. MACRO Stop_Adc
  250. ENDM
  251. MACRO Set_RPM_Out
  252. ENDM
  253. MACRO Clear_RPM_Out
  254. ENDM
  255. MACRO Set_MCU_Clk_24MHz
  256. ENDM
  257. MACRO Set_MCU_Clk_48MHz
  258. ENDM