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9 years ago
  1. ;**** **** **** **** ****
  2. ;
  3. ; BLHeli program for controlling brushless motors in helicopters and multirotors
  4. ;
  5. ; Copyright 2011, 2012 Steffen Skaug
  6. ; This program is distributed under the terms of the GNU General Public License
  7. ;
  8. ; This file is part of BLHeli.
  9. ;
  10. ; BLHeli is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; BLHeli is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with BLHeli. If not, see <http://www.gnu.org/licenses/>.
  22. ;
  23. ;**** **** **** **** ****
  24. ;
  25. ; Graupner Ultra 20A hardware definition file
  26. ;
  27. ;**** **** **** **** ****
  28. ;*********************
  29. ; Device SiLabs F390
  30. ;*********************
  31. $include (c8051f390.inc)
  32. ;**** **** **** **** ****
  33. ; Uses internal calibrated oscillator set to 24/48Mhz
  34. ;**** **** **** **** ****
  35. ;**** **** **** **** ****
  36. ; Constant definitions
  37. ;**** **** **** **** ****
  38. CSEG AT 1A40h
  39. Eep_ESC_Layout: DB "#G_Ultra20A# " ; ESC layout tag
  40. CSEG AT 1A50h
  41. Eep_ESC_MCU: DB "#BLHELI#F390# " ; Project and MCU tag (16 Bytes)
  42. MCU_48MHZ EQU 1 ; Set to 1 if MCU can run at 48MHz
  43. ONE_S_CAPABLE EQU 0 ; Set to 1 if ESC can operate at 1S
  44. PORT3_EXIST EQU 0 ; Set to 1 if MCU has port3
  45. COMP1_USED EQU 0 ; Set to 1 if MCU has comparator 1 and it is being used
  46. LOCK_BYTE_ADDRESS_16K EQU 3FFFh ; Address of lock byte if 16k flash size
  47. LOCK_BYTE_ADDRESS_8K EQU 1FFFh ; Address of lock byte if 8k flash size
  48. HIGH_BEC_VOLTAGE EQU 0 ; Set to 1 or more if high BEC voltage is supported
  49. DAMPED_MODE_ENABLE EQU 1 ; Damped mode enabled
  50. NFETON_DELAY EQU 16 ; Wait delay from pfets off to nfets on
  51. PFETON_DELAY EQU 14 ; Wait delay from nfets off to pfets on
  52. ADC_LIMIT_L EQU 0 ; No divider. Power supply measurement ADC value for which main motor power is limited (low byte)
  53. ADC_LIMIT_H EQU 0 ; No divider. Power supply measurement ADC value for which main motor power is limited (2 MSBs)
  54. TEMP_LIMIT EQU 114 ; Temperature measurement ADC value for which main motor power is limited (low byte, assuming high byte is 1)
  55. TEMP_LIMIT_STEP EQU 4 ; Temperature measurement ADC value increment for which main motor power is further limited
  56. ;**** **** **** **** ****
  57. ; ESC specific defaults
  58. ;**** **** **** **** ****
  59. DEFAULT_PGM_MAIN_SPOOLUP_TIME EQU 10 ; Main motor spoolup time
  60. DEFAULT_PGM_MAIN_STARTUP_PWR EQU 10 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  61. DEFAULT_PGM_TAIL_STARTUP_PWR EQU 10 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  62. DEFAULT_PGM_MULTI_STARTUP_PWR EQU 10 ; 1=0.031 2=0.047 3=0.063 4=0.094 5=0.125 6=0.188 7=0.25 8=0.38 9=0.50 10=0.75 11=1.00 12=1.25 13=1.50
  63. ;**** **** **** **** ****
  64. ; Bootloader definitions
  65. ;**** **** **** **** ****
  66. RTX_PORT EQU P0 ; Receive/Transmit port
  67. RTX_MDOUT EQU P0MDOUT ; Set to 1 for PUSHPULL
  68. RTX_MDIN EQU P0MDIN ; Set to 1 for DIGITAL
  69. RTX_SKIP EQU P0SKIP ; Set to 1 for SKIP
  70. RTX_PIN EQU 5 ; RTX pin
  71. SIGNATURE_001 EQU 0f3h ; Device signature
  72. SIGNATURE_002 EQU 090h
  73. ;*********************
  74. ; PORT 0 definitions *
  75. ;*********************
  76. Mux_A2 EQU 7 ;i
  77. Mux_A1 EQU 6 ;i
  78. Rcp_In EQU 5 ;i
  79. ; EQU 4 ;i
  80. Mux_C2 EQU 3 ;i
  81. Mux_C1 EQU 2 ;i
  82. Mux_B2 EQU 1 ;i
  83. Mux_B1 EQU 0 ;i
  84. P0_DIGITAL EQU NOT((1 SHL Mux_A1)+(1 SHL Mux_A2)+(1 SHL Mux_B1)+(1 SHL Mux_B2)+(1 SHL Mux_C1)+(1 SHL Mux_C2))
  85. P0_INIT EQU 0FFh
  86. P0_PUSHPULL EQU 0
  87. P0_SKIP EQU NOT(1 SHL Rcp_In)
  88. MACRO Get_Rcp_Capture_Values
  89. mov Temp1, PCA0CPL0 ; Get PCA capture values
  90. mov Temp2, PCA0CPH0
  91. IF MCU_48MHZ == 1
  92. mov A, Clock_Set_At_48MHz
  93. jz Get_Rcp_End
  94. clr C
  95. mov A, Temp2
  96. rrc A
  97. mov Temp2, A
  98. mov A, Temp1
  99. rrc A
  100. mov Temp1, A
  101. Get_Rcp_End:
  102. ENDIF
  103. ENDM
  104. MACRO Read_Rcp_Int
  105. mov A, P0
  106. jnb Flags3.PGM_RCP_PWM_POL, ($+4) ; Is pwm polarity negative?
  107. cpl A ; Yes - invert
  108. ENDM
  109. MACRO Rcp_Int_Enable
  110. orl PCA0CPM0, #01h ; Interrupt enabled
  111. ENDM
  112. MACRO Rcp_Int_Disable
  113. anl PCA0CPM0, #0FEh ; Interrupt disabled
  114. ENDM
  115. MACRO Rcp_Int_First
  116. anl PCA0CPM0, #0CFh
  117. jb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity positive?
  118. orl PCA0CPM0, #20h ; Capture rising edge
  119. jnb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity negative?
  120. orl PCA0CPM0, #10h ; Capture falling edge
  121. ENDM
  122. MACRO Rcp_Int_Second
  123. anl PCA0CPM0, #0CFh
  124. jb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity positive?
  125. orl PCA0CPM0, #10h ; Capture falling edge
  126. jnb Flags3.PGM_RCP_PWM_POL, ($+6) ; Is pwm polarity negative?
  127. orl PCA0CPM0, #20h ; Capture rising edge
  128. ENDM
  129. MACRO Rcp_Clear_Int_Flag
  130. clr CCF0 ; Clear interrupt flag
  131. ENDM
  132. ;*********************
  133. ; PORT 1 definitions *
  134. ;*********************
  135. CpFET EQU 7 ;o
  136. CnFET EQU 6 ;o (High side PWM)
  137. BpFET EQU 5 ;o
  138. BnFET EQU 4 ;o (High side PWM)
  139. ApFET EQU 3 ;o
  140. AnFET EQU 2 ;o (High side PWM)
  141. Comp_Comm EQU 1 ;i
  142. Adc_Ip EQU 0 ;i (Components not mounted)
  143. P1_DIGITAL EQU NOT((1 SHL Adc_Ip)+(1 SHL Comp_Comm))
  144. P1_INIT EQU (1 SHL Adc_Ip)+(1 SHL Comp_Comm)
  145. P1_PUSHPULL EQU (1 SHL AnFET)+(1 SHL BnFET)+(1 SHL CnFET)+(1 SHL ApFET)+(1 SHL BpFET)+(1 SHL CpFET)
  146. P1_SKIP EQU (1 SHL Adc_Ip)
  147. MACRO AnFET_on
  148. setb P1.AnFET
  149. ENDM
  150. MACRO AnFET_off
  151. clr P1.AnFET
  152. ENDM
  153. MACRO BnFET_on
  154. setb P1.BnFET
  155. ENDM
  156. MACRO BnFET_off
  157. clr P1.BnFET
  158. ENDM
  159. MACRO CnFET_on
  160. setb P1.CnFET
  161. ENDM
  162. MACRO CnFET_off
  163. clr P1.CnFET
  164. ENDM
  165. MACRO All_nFETs_Off
  166. clr P1.AnFET
  167. clr P1.CnFET
  168. clr P1.BnFET
  169. ENDM
  170. MACRO ApFET_on
  171. setb P1.ApFET
  172. ENDM
  173. MACRO ApFET_off
  174. clr P1.ApFET
  175. ENDM
  176. MACRO BpFET_on
  177. setb P1.BpFET
  178. ENDM
  179. MACRO BpFET_off
  180. clr P1.BpFET
  181. ENDM
  182. MACRO CpFET_on
  183. setb P1.CpFET
  184. ENDM
  185. MACRO CpFET_off
  186. clr P1.CpFET
  187. ENDM
  188. MACRO All_pFETs_On
  189. setb P1.ApFET
  190. setb P1.CpFET
  191. setb P1.BpFET
  192. ENDM
  193. MACRO All_pFETs_Off
  194. clr P1.ApFET
  195. clr P1.CpFET
  196. clr P1.BpFET
  197. ENDM
  198. MACRO Brake_FETs_On
  199. ApFET_on
  200. BpFET_on
  201. CpFET_on
  202. ENDM
  203. MACRO Damping_FET_On
  204. mov A, DampingFET
  205. orl P1, A
  206. ENDM
  207. MACRO Set_Comp_Phase_A
  208. mov CPT0MX, #43h ; Set comparator multiplexer to phase A
  209. ENDM
  210. MACRO Set_Comp_Phase_B
  211. mov CPT0MX, #40h ; Set comparator multiplexer to phase B
  212. ENDM
  213. MACRO Set_Comp_Phase_C
  214. mov CPT0MX, #41h ; Set comparator multiplexer to phase C
  215. ENDM
  216. MACRO Read_Comp_Out
  217. mov A, CPT0CN ; Read comparator output
  218. cpl A
  219. ENDM
  220. ;*********************
  221. ; PORT 2 definitions *
  222. ;*********************
  223. DebugPin EQU 0 ;o
  224. P2_PUSHPULL EQU (1 SHL DebugPin)
  225. ;**********************
  226. ; MCU specific macros *
  227. ;**********************
  228. MACRO Interrupt_Table_Definition
  229. CSEG AT 0 ; Code segment start
  230. jmp reset
  231. CSEG AT 0Bh ; Timer0 interrupt
  232. jmp t0_int
  233. CSEG AT 2Bh ; Timer2 interrupt
  234. jmp t2_int
  235. CSEG AT 5Bh ; PCA interrupt
  236. jmp pca_int
  237. CSEG AT 73h ; Timer3 interrupt
  238. jmp t3_int
  239. ENDM
  240. MACRO Initialize_Xbar
  241. mov XBR1, #41h ; Xbar enabled, CEX0 routed to pin Rcp_In
  242. All_nFETs_off ; For unlocking of HIP2103/4 driver circuits
  243. call wait100ms
  244. All_pFETs_on
  245. call wait1ms
  246. All_pFETs_off
  247. ENDM
  248. MACRO Initialize_Adc
  249. mov REF0CN, #0Eh ; Set vdd (3.3V) as reference. Enable temp sensor and bias
  250. IF MCU_48MHZ == 0
  251. mov ADC0CF, #58h ; ADC clock 2MHz
  252. ELSE
  253. mov ADC0CF, #0C0h ; ADC clock 2MHz
  254. ENDIF
  255. mov AMX0P, #(8+Adc_Ip) ; Select positive input
  256. mov AMX0N, #11h ; Select negative input as ground
  257. mov ADC0CN, #80h ; ADC enabled
  258. ENDM
  259. MACRO Set_Adc_Ip_Volt
  260. mov AMX0P, #(8+Adc_Ip) ; Select positive input
  261. ENDM
  262. MACRO Set_Adc_Ip_Temp
  263. mov AMX0P, #10h ; Select temp sensor input
  264. ENDM
  265. MACRO Start_Adc
  266. mov ADC0CN, #90h ; ADC start
  267. ENDM
  268. MACRO Read_Adc_Result
  269. mov Temp1, ADC0L
  270. mov Temp2, ADC0H
  271. ENDM
  272. MACRO Stop_Adc
  273. ENDM
  274. MACRO Set_RPM_Out
  275. ENDM
  276. MACRO Clear_RPM_Out
  277. ENDM
  278. MACRO Set_MCU_Clk_24MHz
  279. mov CLKSEL, #0 ; Set clock to 24MHz
  280. mov FLSCL, #80h ; Set flash timing for 24MHz
  281. mov Clock_Set_At_48MHz, #0
  282. ENDM
  283. MACRO Set_MCU_Clk_48MHz
  284. mov FLSCL, #90h ; Set flash timing for 48MHz
  285. mov CLKSEL, #3 ; Set clock to 48MHz
  286. mov Clock_Set_At_48MHz, #1
  287. ENDM